Atmel ATF1508AS Fitter Version 1.8.7.8 ,running Mon Nov 09 14:22:33 2015 fit1508 C:\USERS\VINCE\DOCUMENTS\WEBSVN\TRUNK\EAGLE\PROJECTS\DEC\TSC8-75\CPLD-SRC\CPLD.tt2 -CUPL -dev P1508Q100 -JTAG ON ****** Initial fitting strategy and property ****** Pla_in_file = CPLD.tt2 Pla_out_file = CPLD.tt3 Jedec_file = CPLD.jed Vector_file = CPLD.tmv verilog_file = CPLD.vt Time_file = Log_file = CPLD.fit err_file = Device_name = PQFP100 Module_name = Package_type = PQFP Preassign_file = Property_file = Sleep_mode = Preassignment = Security_mode = OFF Pin_keep_mode = ON Dedicated_input_clock = Dedicated_input_reset = Dedicated_input_oe = supporter = CUPL optimize = ON Soft_buffer = Xor_synthesis = OFF Foldback_logic = on Expander = Cascade_logic = OFF Dedicated_input = Output_fast = OFF ******************************* Power down pin 1 = OFF Power down pin 2 = OFF power_reset = OFF JTAG = ON TDI pullup = OFF TMS pullup = OFF MC_power = OFF Open_collector = OFF ITD0 = ON ITD1 = ON ITD2 = ON Fast_inlatch = off ******************************* --------------------------------------------------------- Fitter_Pass 1, Preassign = KEEP, LOGIC_DOUBLING : OFF ... Performing global Output Enable pin assignments ... Performing global pin assignments ... -------------------------------------- Final global control pins assignment (if applicable)... ------------------------------------------------------- Performing input pin pre-assignments ... ------------------------------------ n_t_30x.AP equation needs patching. irq.AR equation needs patching. n_t_516x.AR equation needs patching. 3 control equtions need patching Attempt to place floating signals ... ------------------------------------ data08_low is placed at pin 4 (MC 1) Com_Ctrl_297 is placed at feedback node 602 (MC 2) data11_low is placed at pin 3 (MC 3) n_t_30x.AP is placed at feedback node 604 (MC 4) data09_low is placed at pin 2 (MC 5) data10_low is placed at pin 1 (MC 6) n_t_31x is placed at feedback node 607 (MC 7) n_t_35x is placed at feedback node 610 (MC 10) n_t_36x is placed at feedback node 612 (MC 12) n_t_25x is placed at feedback node 615 (MC 15) irq.AR is placed at feedback node 616 (MC 16) ma10_low is placed at pin 16 (MC 17) riot00 is placed at feedback node 617 (MC 17) rtb01 is placed at feedback node 618 (MC 18) ma11_low is placed at pin 15 (MC 19) rtb02 is placed at feedback node 619 (MC 19) rtb00 is placed at feedback node 620 (MC 20) f_low is placed at pin 14 (MC 21) riot11 is placed at feedback node 621 (MC 21) e_low is placed at pin 12 (MC 22) riot10 is placed at feedback node 622 (MC 22) riot09 is placed at feedback node 623 (MC 23) user_mode is placed at pin 11 (MC 24) riot08 is placed at feedback node 624 (MC 24) md08_low is placed at pin 10 (MC 25) riot07 is placed at feedback node 625 (MC 25) riot06 is placed at feedback node 626 (MC 26) md09_low is placed at pin 9 (MC 27) riot03 is placed at feedback node 627 (MC 27) riot05 is placed at feedback node 628 (MC 28) md10_low is placed at pin 8 (MC 29) riot04 is placed at feedback node 629 (MC 29) md11_low is placed at pin 7 (MC 30) ecdf_f is placed at feedback node 630 (MC 30) FB_298 is placed at foldback expander node 331 (MC 31) TDI is placed at pin 6 (MC 32) n_t_457x is placed at feedback node 632 (MC 32) initialize is placed at pin 27 (MC 33) skip_low is placed at pin 26 (MC 35) ir0_low is placed at pin 22 (MC 41) ir1_low is placed at pin 21 (MC 43) ma08_low is placed at pin 19 (MC 45) ma09_low is placed at pin 18 (MC 46) n_t_161x is placed at feedback node 646 (MC 46) n_t_34x is placed at feedback node 647 (MC 47) TMS is placed at pin 17 (MC 48) Com_Ctrl_296 is placed at feedback node 648 (MC 48) io_pause_low is placed at pin 38 (MC 51) tp1 is placed at pin 37 (MC 53) c0_low is placed at pin 35 (MC 54) riot01 is placed at feedback node 655 (MC 55) tp2 is placed at pin 34 (MC 56) rtb06 is placed at feedback node 656 (MC 56) c1_low is placed at pin 33 (MC 57) rtb08 is placed at feedback node 658 (MC 58) tp3 is placed at pin 32 (MC 59) rtb07 is placed at feedback node 659 (MC 59) rtb05 is placed at feedback node 660 (MC 60) tp4 is placed at pin 31 (MC 61) rtb04 is placed at feedback node 661 (MC 61) internal_io_low is placed at pin 30 (MC 62) rtb03 is placed at feedback node 663 (MC 63) int_rqst_low is placed at pin 29 (MC 64) data07_low is placed at pin 44 (MC 69) data06_low is placed at pin 46 (MC 70) data05_low is placed at pin 47 (MC 72) data04_low is placed at pin 48 (MC 73) md07_low is placed at pin 49 (MC 75) md06_low is placed at pin 50 (MC 77) md05_low is placed at pin 51 (MC 78) n_t_32x is placed at feedback node 679 (MC 79) md04_low is placed at pin 52 (MC 80) n_t_30x is placed at feedback node 680 (MC 80) ma07_low is placed at pin 54 (MC 81) ma06_low is placed at pin 55 (MC 83) ma05_low is placed at pin 56 (MC 85) ma04_low is placed at pin 57 (MC 86) riot02 is placed at feedback node 687 (MC 87) irq is placed at feedback node 690 (MC 90) rtb11 is placed at feedback node 692 (MC 92) data03_low is placed at pin 62 (MC 93) data02_low is placed at pin 63 (MC 94) rtb09 is placed at feedback node 695 (MC 95) TCK is placed at pin 64 (MC 96) rtb10 is placed at feedback node 696 (MC 96) data01_low is placed at pin 65 (MC 97) data00_low is placed at pin 66 (MC 99) md03_low is placed at pin 67 (MC 101) md02_low is placed at pin 69 (MC 102) md01_low is placed at pin 70 (MC 104) md00_low is placed at pin 71 (MC 105) md_dir_low is placed at pin 72 (MC 107) ma03_low is placed at pin 73 (MC 109) ma02_low is placed at pin 74 (MC 110) n_t_516x is placed at feedback node 711 (MC 111) TDO is placed at pin 75 (MC 112) n_t_33x is placed at feedback node 712 (MC 112) ma01_low is placed at pin 77 (MC 113) ma00_low is placed at pin 78 (MC 115) n_t_49x is placed at pin 82 (MC 121) n_t_63x is placed at pin 83 (MC 123) n_t_516x.AR is placed at feedback node 727 (MC 127) n n _ _ t t _ _ G V G G G V 6 4 N C N N N C 3 9 D C D D D C x x -------------------------------------------- / 100 98 96 94 92 90 88 86 84 82 \ / 99 97 95 93 91 89 87 85 83 81 \ data10_low | 1 (*) 80 | data09_low | 2 79 | data11_low | 3 78 | ma00_low data08_low | 4 77 | ma01_low VCC | 5 76 | GND TDI | 6 75 | TDO md11_low | 7 74 | ma02_low md10_low | 8 73 | ma03_low md09_low | 9 72 | md_dir_low md08_low | 10 71 | md00_low user_mode | 11 70 | md01_low e_low | 12 69 | md02_low GND | 13 68 | VCC f_low | 14 67 | md03_low ma11_low | 15 66 | data00_low ma10_low | 16 ATF1508 65 | data01_low TMS | 17 100-Lead PQFP 64 | TCK ma09_low | 18 63 | data02_low ma08_low | 19 62 | data03_low VCC | 20 61 | GND ir1_low | 21 60 | ir0_low | 22 59 | | 23 58 | | 24 57 | ma04_low | 25 56 | ma05_low skip_low | 26 55 | ma06_low initialize | 27 54 | ma07_low GND | 28 53 | VCC int_rqst_low | 29 52 | md04_low internal_io_low | 30 51 | md05_low \ 32 34 36 38 40 42 44 46 48 50 / \ 31 33 35 37 39 41 43 45 47 49 / -------------------------------------------- t t c t c V t i G V d G d d d m m p p 1 p 0 C p o N C a N a a a d d 4 3 _ 2 _ C 1 _ D C t D t t t 0 0 l l p a a a a 7 6 o o a 0 0 0 0 _ _ w w u 7 6 5 4 l l s _ _ _ _ o o e l l l l w w _ o o o o l w w w w o w VCC = Supply Voltage pin which must be connected to (5.0V or 3.0V) GND = GND pin which must be connected to ground TMS,TDI,TDO,TDI = JTAG pins which must reserved for the JTAG interface NC = Unused I/O pins which must be unconnected on the board Universal-Interconnect-Multiplexer assignments ------------------------------------------------ FanIn assignment for block A [28] { Com_Ctrl_296, data09_low,data11_low,data10_low,data08_low, initialize,io_pause_low, md06_low,md04_low,md05_low,md03_low,md07_low,md08_low,md11_low,md09_low,md10_low, n_t_35x, riot08,rtb08,rtb11,riot06,rtb10,riot10,riot07,riot11,rtb09,riot09, tp3, } Multiplexer assignment for block A md06_low (MC21 P) : MUX 0 Ref (E77p) data09_low (MC3 P) : MUX 1 Ref (A5p) riot08 (MC9 FB) : MUX 2 Ref (B24fb) md04_low (MC19 P) : MUX 4 Ref (E80p) initialize (MC27 P) : MUX 5 Ref (C33p) data11_low (MC2 P) : MUX 7 Ref (A3p) md05_low (MC20 P) : MUX 8 Ref (E78p) md03_low (MC18 P) : MUX 9 Ref (G101p) md07_low (MC22 P) : MUX 10 Ref (E75p) rtb08 (MC13 FB) : MUX 11 Ref (D58fb) tp3 (MC28 P) : MUX 12 Ref (D59p) md08_low (MC23 P) : MUX 14 Ref (B25p) data10_low (MC4 P) : MUX 15 Ref (A6p) rtb11 (MC14 FB) : MUX 17 Ref (F92fb) Com_Ctrl_296 (MC12 FB) : MUX 21 Ref (C48fb) md11_low (MC26 P) : MUX 22 Ref (B30p) riot06 (MC11 FB) : MUX 23 Ref (B26fb) md09_low (MC24 P) : MUX 24 Ref (B27p) rtb10 (MC16 FB) : MUX 25 Ref (F96fb) n_t_35x (MC5 FB) : MUX 29 Ref (A10fb) io_pause_low (MC17 P) : MUX 31 Ref (D51p) md10_low (MC25 P) : MUX 32 Ref (B29p) data08_low (MC1 P) : MUX 33 Ref (A1p) riot10 (MC7 FB) : MUX 34 Ref (B22fb) riot07 (MC10 FB) : MUX 35 Ref (B25fb) riot11 (MC6 FB) : MUX 36 Ref (B21fb) rtb09 (MC15 FB) : MUX 37 Ref (F95fb) riot09 (MC8 FB) : MUX 38 Ref (B23fb) FanIn assignment for block B [28] { f_low, initialize,io_pause_low, md09_low,md04_low,md07_low,md03_low,md00_low,md05_low,ma00_low,md10_low,md06_low,md11_low,ma01_low,ma02_low,md08_low,md01_low, n_t_32x,n_t_33x,n_t_31x,n_t_30x,n_t_25x,n_t_35x,n_t_34x,n_t_36x,n_t_161x, tp2, user_mode, } Multiplexer assignment for block B md09_low (MC17 P) : MUX 0 Ref (B27p) initialize (MC20 P) : MUX 1 Ref (C33p) user_mode (MC21 P) : MUX 3 Ref (B24p) md04_low (MC12 P) : MUX 4 Ref (E80p) n_t_32x (MC7 FB) : MUX 5 Ref (E79fb) md07_low (MC15 P) : MUX 6 Ref (E75p) md03_low (MC11 P) : MUX 7 Ref (G101p) md00_low (MC24 P) : MUX 8 Ref (G105p) io_pause_low (MC10 P) : MUX 9 Ref (D51p) n_t_33x (MC9 FB) : MUX 11 Ref (G112fb) md05_low (MC13 P) : MUX 12 Ref (E78p) ma00_low (MC26 P) : MUX 13 Ref (H115p) md10_low (MC18 P) : MUX 14 Ref (B29p) tp2 (MC23 P) : MUX 15 Ref (D56p) md06_low (MC14 P) : MUX 16 Ref (E77p) f_low (MC22 P) : MUX 17 Ref (B21p) md11_low (MC19 P) : MUX 18 Ref (B30p) ma01_low (MC28 P) : MUX 19 Ref (H113p) n_t_31x (MC1 FB) : MUX 20 Ref (A7fb) n_t_30x (MC8 FB) : MUX 23 Ref (E80fb) n_t_25x (MC4 FB) : MUX 25 Ref (A15fb) ma02_low (MC27 P) : MUX 26 Ref (G110p) n_t_35x (MC2 FB) : MUX 27 Ref (A10fb) n_t_34x (MC6 FB) : MUX 29 Ref (C47fb) md08_low (MC16 P) : MUX 30 Ref (B25p) md01_low (MC25 P) : MUX 31 Ref (G104p) n_t_36x (MC3 FB) : MUX 37 Ref (A12fb) n_t_161x (MC5 FB) : MUX 39 Ref (C46fb) FanIn assignment for block C [28] { Com_Ctrl_296,Com_Ctrl_297, ecdf_f, f_low, io_pause_low,irq, md06_low,md09_low,md04_low,md07_low,md03_low,md05_low,md11_low,md08_low,md10_low, n_t_63x, riot03,riot00,riot02,riot10,riot01,riot11,riot05,riot09,riot04, skip_low, tp3, user_mode, } Multiplexer assignment for block C md06_low (MC20 P) : MUX 0 Ref (E77p) md09_low (MC23 P) : MUX 2 Ref (B27p) user_mode (MC26 P) : MUX 3 Ref (B24p) md04_low (MC18 P) : MUX 4 Ref (E80p) riot03 (MC6 FB) : MUX 5 Ref (B27fb) md07_low (MC21 P) : MUX 6 Ref (E75p) md03_low (MC17 P) : MUX 7 Ref (G101p) n_t_63x (MC15 P) : MUX 8 Ref (H123p) io_pause_low (MC16 P) : MUX 9 Ref (D51p) riot00 (MC2 FB) : MUX 10 Ref (B17fb) md05_low (MC19 P) : MUX 12 Ref (E78p) riot02 (MC13 FB) : MUX 14 Ref (F87fb) irq (MC14 FB) : MUX 15 Ref (F90fb) tp3 (MC28 P) : MUX 16 Ref (D59p) ecdf_f (MC9 FB) : MUX 19 Ref (B30fb) Com_Ctrl_296 (MC11 FB) : MUX 21 Ref (C48fb) md11_low (MC25 P) : MUX 22 Ref (B30p) skip_low (MC10 P) : MUX 23 Ref (C35p) riot10 (MC4 FB) : MUX 26 Ref (B22fb) Com_Ctrl_297 (MC1 FB) : MUX 28 Ref (A2fb) md08_low (MC22 P) : MUX 30 Ref (B25p) md10_low (MC24 P) : MUX 32 Ref (B29p) f_low (MC27 P) : MUX 33 Ref (B21p) riot01 (MC12 FB) : MUX 34 Ref (D55fb) riot11 (MC3 FB) : MUX 36 Ref (B21fb) riot05 (MC7 FB) : MUX 37 Ref (B28fb) riot09 (MC5 FB) : MUX 38 Ref (B23fb) riot04 (MC8 FB) : MUX 39 Ref (B29fb) FanIn assignment for block D [28] { c1_low,c0_low, f_low, initialize,internal_io_low,io_pause_low,irq,int_rqst_low, md06_low,md09_low,ma05_low,md07_low,md00_low,md03_low,md05_low,ma06_low,md04_low,md01_low,ma08_low,md11_low,ma03_low,ma07_low,ma04_low,md08_low,md10_low, n_t_161x, tp2, user_mode, } Multiplexer assignment for block D md06_low (MC11 P) : MUX 0 Ref (E77p) md09_low (MC14 P) : MUX 2 Ref (B27p) c1_low (MC3 P) : MUX 4 Ref (D57p) ma05_low (MC25 P) : MUX 5 Ref (F85p) md07_low (MC12 P) : MUX 6 Ref (E75p) c0_low (MC2 P) : MUX 7 Ref (D54p) md00_low (MC21 P) : MUX 8 Ref (G105p) md03_low (MC8 P) : MUX 9 Ref (G101p) f_low (MC19 P) : MUX 11 Ref (B21p) md05_low (MC10 P) : MUX 12 Ref (E78p) ma06_low (MC28 P) : MUX 13 Ref (F83p) md04_low (MC9 P) : MUX 14 Ref (E80p) tp2 (MC20 P) : MUX 15 Ref (D56p) md01_low (MC22 P) : MUX 17 Ref (G104p) ma08_low (MC27 P) : MUX 18 Ref (C45p) initialize (MC17 P) : MUX 19 Ref (C33p) md11_low (MC16 P) : MUX 22 Ref (B30p) user_mode (MC18 P) : MUX 23 Ref (B24p) ma03_low (MC23 P) : MUX 24 Ref (G109p) ma07_low (MC26 P) : MUX 25 Ref (F81p) internal_io_low (MC4 P) : MUX 28 Ref (D62p) ma04_low (MC24 P) : MUX 29 Ref (F86p) md08_low (MC13 P) : MUX 30 Ref (B25p) io_pause_low (MC7 P) : MUX 31 Ref (D51p) md10_low (MC15 P) : MUX 32 Ref (B29p) irq (MC6 FB) : MUX 37 Ref (F90fb) int_rqst_low (MC5 P) : MUX 38 Ref (D64p) n_t_161x (MC1 FB) : MUX 39 Ref (C46fb) FanIn assignment for block E [28] { Com_Ctrl_296, data05_low,data07_low,data04_low,data06_low, initialize,io_pause_low, md06_low,md09_low,md04_low,md05_low,md07_low,md10_low,md11_low,md03_low,md08_low, n_t_49x,n_t_34x,n_t_36x,n_t_30x.AP, rtb05,rtb07,riot06,riot07,riot05,rtb04,rtb06,riot04, } Multiplexer assignment for block E md06_low (MC21 P) : MUX 0 Ref (E77p) initialize (MC27 P) : MUX 1 Ref (C33p) md09_low (MC24 P) : MUX 2 Ref (B27p) Com_Ctrl_296 (MC8 FB) : MUX 3 Ref (C48fb) md04_low (MC19 P) : MUX 4 Ref (E80p) data05_low (MC15 P) : MUX 5 Ref (E72p) n_t_49x (MC28 P) : MUX 6 Ref (H121p) rtb05 (MC11 FB) : MUX 7 Ref (D60fb) md05_low (MC20 P) : MUX 8 Ref (E78p) data07_low (MC13 P) : MUX 9 Ref (E69p) md07_low (MC22 P) : MUX 10 Ref (E75p) io_pause_low (MC17 P) : MUX 13 Ref (D51p) md10_low (MC25 P) : MUX 14 Ref (B29p) n_t_34x (MC7 FB) : MUX 15 Ref (C47fb) rtb07 (MC10 FB) : MUX 17 Ref (D59fb) data04_low (MC16 P) : MUX 20 Ref (E73p) riot06 (MC4 FB) : MUX 21 Ref (B26fb) md11_low (MC26 P) : MUX 22 Ref (B30p) md03_low (MC18 P) : MUX 23 Ref (G101p) riot07 (MC3 FB) : MUX 25 Ref (B25fb) riot05 (MC5 FB) : MUX 27 Ref (B28fb) md08_low (MC23 P) : MUX 30 Ref (B25p) data06_low (MC14 P) : MUX 31 Ref (E70p) rtb04 (MC12 FB) : MUX 33 Ref (D61fb) rtb06 (MC9 FB) : MUX 36 Ref (D56fb) n_t_36x (MC2 FB) : MUX 37 Ref (A12fb) n_t_30x.AP (MC1 FB) : MUX 38 Ref (A4fb) riot04 (MC6 FB) : MUX 39 Ref (B29fb) FanIn assignment for block F [28] { data03_low,data02_low, f_low, io_pause_low,irq.AR,initialize, md11_low,md02_low,md07_low,md05_low,ma10_low,md04_low,md08_low,md09_low,md00_low,ma09_low,ma11_low,md03_low,md01_low,md10_low,md06_low, n_t_161x, rtb03,riot02,rtb02,riot03, tp2, user_mode, } Multiplexer assignment for block F md11_low (MC18 P) : MUX 0 Ref (B30p) tp2 (MC22 P) : MUX 1 Ref (D56p) md02_low (MC28 P) : MUX 3 Ref (G102p) data03_low (MC7 P) : MUX 4 Ref (F93p) rtb03 (MC5 FB) : MUX 5 Ref (D63fb) md07_low (MC14 P) : MUX 6 Ref (E75p) n_t_161x (MC4 FB) : MUX 7 Ref (C46fb) data02_low (MC8 P) : MUX 8 Ref (F94p) io_pause_low (MC9 P) : MUX 9 Ref (D51p) riot02 (MC6 FB) : MUX 10 Ref (F87fb) irq.AR (MC1 FB) : MUX 11 Ref (A16fb) md05_low (MC12 P) : MUX 12 Ref (E78p) ma10_low (MC25 P) : MUX 13 Ref (B17p) md04_low (MC11 P) : MUX 14 Ref (E80p) md08_low (MC15 P) : MUX 16 Ref (B25p) initialize (MC19 P) : MUX 19 Ref (C33p) md09_low (MC16 P) : MUX 20 Ref (B27p) md00_low (MC23 P) : MUX 22 Ref (G105p) user_mode (MC20 P) : MUX 23 Ref (B24p) ma09_low (MC26 P) : MUX 26 Ref (C46p) ma11_low (MC27 P) : MUX 27 Ref (B19p) md03_low (MC10 P) : MUX 29 Ref (G101p) rtb02 (MC2 FB) : MUX 30 Ref (B19fb) md01_low (MC24 P) : MUX 31 Ref (G104p) md10_low (MC17 P) : MUX 32 Ref (B29p) f_low (MC21 P) : MUX 33 Ref (B21p) md06_low (MC13 P) : MUX 34 Ref (E77p) riot03 (MC3 FB) : MUX 39 Ref (B27fb) FanIn assignment for block G [28] { Com_Ctrl_296, data01_low,data00_low, e_low, initialize,io_pause_low,ir1_low,ir0_low, md06_low,md04_low,md05_low,md03_low,md07_low,md_dir_low,md11_low,md09_low,md08_low,md10_low, n_t_516x,n_t_161x,n_t_516x.AR,n_t_25x, rtb00,rtb01,riot00,riot01, tp1, user_mode, } Multiplexer assignment for block G md06_low (MC17 P) : MUX 0 Ref (E77p) rtb00 (MC4 FB) : MUX 2 Ref (B20fb) md04_low (MC15 P) : MUX 4 Ref (E80p) initialize (MC23 P) : MUX 5 Ref (C33p) rtb01 (MC3 FB) : MUX 6 Ref (B18fb) data01_low (MC8 P) : MUX 7 Ref (G97p) md05_low (MC16 P) : MUX 8 Ref (E78p) md03_low (MC14 P) : MUX 9 Ref (G101p) md07_low (MC18 P) : MUX 10 Ref (E75p) md_dir_low (MC10 P) : MUX 12 Ref (G107p) io_pause_low (MC13 P) : MUX 13 Ref (D51p) n_t_516x (MC11 FB) : MUX 15 Ref (G111fb) tp1 (MC28 P) : MUX 17 Ref (D53p) ir1_low (MC26 P) : MUX 18 Ref (C43p) ir0_low (MC27 P) : MUX 20 Ref (C41p) md11_low (MC22 P) : MUX 22 Ref (B30p) data00_low (MC9 P) : MUX 23 Ref (G99p) md09_low (MC20 P) : MUX 24 Ref (B27p) user_mode (MC24 P) : MUX 25 Ref (B24p) e_low (MC25 P) : MUX 29 Ref (B22p) md08_low (MC19 P) : MUX 30 Ref (B25p) n_t_161x (MC5 FB) : MUX 31 Ref (C46fb) md10_low (MC21 P) : MUX 32 Ref (B29p) n_t_516x.AR (MC12 FB) : MUX 35 Ref (H127fb) riot00 (MC2 FB) : MUX 36 Ref (B17fb) n_t_25x (MC1 FB) : MUX 37 Ref (A15fb) riot01 (MC7 FB) : MUX 38 Ref (D55fb) Com_Ctrl_296 (MC6 FB) : MUX 39 Ref (C48fb) FanIn assignment for block H [14] { e_low, initialize,io_pause_low, md06_low,md09_low,md04_low,md07_low,md03_low,md05_low,md10_low,md11_low,md08_low, n_t_457x, tp4, } Multiplexer assignment for block H md06_low (MC6 P) : MUX 0 Ref (E77p) initialize (MC12 P) : MUX 1 Ref (C33p) md09_low (MC9 P) : MUX 2 Ref (B27p) md04_low (MC4 P) : MUX 4 Ref (E80p) md07_low (MC7 P) : MUX 6 Ref (E75p) e_low (MC13 P) : MUX 7 Ref (B22p) tp4 (MC14 P) : MUX 8 Ref (D61p) md03_low (MC3 P) : MUX 9 Ref (G101p) n_t_457x (MC1 FB) : MUX 11 Ref (B32fb) md05_low (MC5 P) : MUX 12 Ref (E78p) md10_low (MC10 P) : MUX 14 Ref (B29p) md11_low (MC11 P) : MUX 22 Ref (B30p) md08_low (MC8 P) : MUX 30 Ref (B25p) io_pause_low (MC2 P) : MUX 31 Ref (D51p) Creating JEDEC file C:\USERS\VINCE\DOCUMENTS\WEBSVN\TRUNK\EAGLE\PROJECTS\DEC\TSC8-75\CPLD-SRC\CPLD.jed ... PQFP100 programmed logic: ----------------------------------- !c1_low = ((!io_pause_low & md03_low & !md04_low & !md05_low & !md06_low & !md07_low & md08_low & md09_low & !md11_low & !md10_low) # (!io_pause_low & md03_low & !md04_low & !md05_low & !md06_low & !md07_low & md08_low & !md09_low & md11_low)); !c0_low = (!io_pause_low & md03_low & !md04_low & !md05_low & !md06_low & !md07_low & md08_low & !md09_low & md11_low); !data00_low = ((!io_pause_low & md03_low & !md04_low & !md05_low & !md06_low & !md07_low & md08_low & !md09_low & !md10_low & md11_low & riot00.Q) # (!io_pause_low & md03_low & !md04_low & !md05_low & !md06_low & !md07_low & md08_low & !md09_low & md10_low & md11_low & rtb00.Q)); !data01_low = ((!io_pause_low & md03_low & !md04_low & !md05_low & !md06_low & !md07_low & md08_low & !md09_low & !md10_low & md11_low & riot01.Q) # (!io_pause_low & md03_low & !md04_low & !md05_low & !md06_low & !md07_low & md08_low & !md09_low & md10_low & md11_low & rtb01.Q)); !data02_low = ((!io_pause_low & md03_low & !md04_low & !md05_low & !md06_low & !md07_low & md08_low & !md09_low & !md10_low & md11_low & riot02.Q) # (!io_pause_low & md03_low & !md04_low & !md05_low & !md06_low & !md07_low & md08_low & !md09_low & md10_low & md11_low & rtb02.Q)); !data04_low = ((!io_pause_low & md03_low & !md04_low & !md05_low & !md06_low & !md07_low & md08_low & !md09_low & !md10_low & md11_low & riot04.Q) # (!io_pause_low & md03_low & !md04_low & !md05_low & !md06_low & !md07_low & md08_low & !md09_low & md10_low & md11_low & rtb04.Q)); !data03_low = ((!io_pause_low & md03_low & !md04_low & !md05_low & !md06_low & !md07_low & md08_low & !md09_low & !md10_low & md11_low & riot03.Q) # (!io_pause_low & md03_low & !md04_low & !md05_low & !md06_low & !md07_low & md08_low & !md09_low & md10_low & md11_low & rtb03.Q)); !data05_low = ((!io_pause_low & md03_low & !md04_low & !md05_low & !md06_low & !md07_low & md08_low & !md09_low & !md10_low & md11_low & riot05.Q) # (!io_pause_low & md03_low & !md04_low & !md05_low & !md06_low & !md07_low & md08_low & !md09_low & md10_low & md11_low & rtb05.Q)); !data06_low = ((!io_pause_low & md03_low & !md04_low & !md05_low & !md06_low & !md07_low & md08_low & !md09_low & !md10_low & md11_low & riot06.Q) # (!io_pause_low & md03_low & !md04_low & !md05_low & !md06_low & !md07_low & md08_low & !md09_low & md10_low & md11_low & rtb06.Q)); !data07_low = ((!io_pause_low & md03_low & !md04_low & !md05_low & !md06_low & !md07_low & md08_low & !md09_low & !md10_low & md11_low & riot07.Q) # (!io_pause_low & md03_low & !md04_low & !md05_low & !md06_low & !md07_low & md08_low & !md09_low & md10_low & md11_low & rtb07.Q)); !data09_low = ((!io_pause_low & md03_low & !md04_low & !md05_low & !md06_low & !md07_low & md08_low & !md09_low & md10_low & md11_low & rtb09.Q) # (!io_pause_low & md03_low & !md04_low & !md05_low & !md06_low & !md07_low & md08_low & md09_low & !md10_low & !md11_low & riot06.Q) # (!io_pause_low & md03_low & !md04_low & !md05_low & !md06_low & !md07_low & md08_low & !md09_low & !md10_low & md11_low & riot09.Q)); !data08_low = ((!io_pause_low & md03_low & !md04_low & !md05_low & !md06_low & !md07_low & md08_low & !md09_low & !md10_low & md11_low & riot08.Q) # (!io_pause_low & md03_low & !md04_low & !md05_low & !md06_low & !md07_low & md08_low & !md09_low & md10_low & md11_low & rtb08.Q)); !data11_low = ((!io_pause_low & md03_low & !md04_low & !md05_low & !md06_low & !md07_low & md08_low & !md09_low & md10_low & md11_low & rtb11.Q) # (!io_pause_low & md03_low & !md04_low & !md05_low & !md06_low & !md07_low & md08_low & md09_low & !md10_low & !md11_low & riot08.Q) # (!io_pause_low & md03_low & !md04_low & !md05_low & !md06_low & !md07_low & md08_low & !md09_low & !md10_low & md11_low & riot11.Q)); !data10_low = ((!io_pause_low & md03_low & !md04_low & !md05_low & !md06_low & !md07_low & md08_low & !md09_low & md10_low & md11_low & rtb10.Q) # (!io_pause_low & md03_low & !md04_low & !md05_low & !md06_low & !md07_low & md08_low & md09_low & !md10_low & !md11_low & riot07.Q) # (!io_pause_low & md03_low & !md04_low & !md05_low & !md06_low & !md07_low & md08_low & !md09_low & !md10_low & md11_low & riot10.Q)); ecdf_f.D = 0; !internal_io_low = (!io_pause_low & md03_low & !md04_low & !md05_low & !md06_low & !md07_low & md08_low); int_rqst_low = !irq.Q; irq.D = 1; md_dir_low = !n_t_516x.Q; n_t_161x.D = 1; n_t_25x.D = riot08.Q; n_t_30x.D = n_t_34x.Q; n_t_31x.D = n_t_35x.Q; n_t_32x.D = n_t_36x.Q; n_t_33x.D = n_t_25x.Q; n_t_34x.D = 1; n_t_35x.D = riot06.Q; n_t_36x.D = riot07.Q; n_t_516x.D = (!user_mode & !n_t_161x.Q & ir1_low & !ir0_low); !n_t_457x.D = ((!n_t_31x.Q & n_t_35x.Q) # (n_t_31x.Q & !n_t_35x.Q) # (!n_t_30x.Q & n_t_34x.Q) # (n_t_30x.Q & !n_t_34x.Q) # (!n_t_25x.Q & n_t_33x.Q) # (n_t_25x.Q & !n_t_33x.Q) # (!n_t_32x.Q & n_t_36x.Q) # (n_t_32x.Q & !n_t_36x.Q)); !n_t_63x = (!io_pause_low & md03_low & !md04_low & !md05_low & !md06_low & !md07_low & md08_low & !md09_low & md10_low & !md11_low & n_t_457x.Q); riot00.D = (!user_mode & !md00_low & !f_low); riot01.D = (!user_mode & !f_low & !md01_low); riot02.D = (!user_mode & !f_low & !md02_low); riot03.D = (!user_mode & !f_low & !md03_low); riot04.D = (!md04_low & !user_mode & !f_low); riot05.D = (!md05_low & !user_mode & !f_low); riot06.D = (!md06_low & !user_mode & !f_low); riot07.D = (!md07_low & !user_mode & !f_low); riot08.D = (!user_mode & !f_low & !md08_low); riot09.D = (!md09_low & !user_mode & !f_low); riot10.D = (!md10_low & !user_mode & !f_low); riot11.D = (!md11_low & !user_mode & !f_low); rtb00.D = (!user_mode & !n_t_161x.Q & !md00_low & md01_low & !ma00_low); rtb01.D = (!user_mode & !n_t_161x.Q & !md00_low & md01_low & !ma01_low); rtb02.D = (!user_mode & !n_t_161x.Q & !md00_low & md01_low & !ma02_low); rtb03.D = (!user_mode & !n_t_161x.Q & !md00_low & md01_low & !ma03_low); rtb04.D = (!user_mode & !n_t_161x.Q & !md00_low & md01_low & !ma04_low); rtb06.D = (!user_mode & !n_t_161x.Q & !md00_low & md01_low & !ma06_low); rtb05.D = (!user_mode & !n_t_161x.Q & !md00_low & md01_low & !ma05_low); rtb07.D = (!user_mode & !n_t_161x.Q & !md00_low & md01_low & !ma07_low); rtb08.D = (!user_mode & !n_t_161x.Q & !md00_low & md01_low & !ma08_low); rtb09.D = (!user_mode & !n_t_161x.Q & !md00_low & md01_low & !ma09_low); rtb10.D = (!user_mode & !n_t_161x.Q & !md00_low & md01_low & !ma10_low); rtb11.D = (!user_mode & !n_t_161x.Q & !md00_low & md01_low & !ma11_low); !skip_low = ((ecdf_f.Q & !io_pause_low & md03_low & !md04_low & !md05_low & !md06_low & !md07_low & md08_low & md09_low & !md10_low & !md11_low & riot11.Q & riot02.Q) # (ecdf_f.Q & !io_pause_low & md03_low & !md04_low & !md05_low & !md06_low & !md07_low & md08_low & md09_low & !md10_low & !md11_low & riot11.Q & riot03.Q) # (ecdf_f.Q & !io_pause_low & md03_low & !md04_low & !md05_low & !md06_low & !md07_low & md08_low & md09_low & !md10_low & !md11_low & riot11.Q & riot04.Q & !riot05.Q & !riot09.Q & !riot10.Q) # (!io_pause_low & md03_low & !md04_low & !md05_low & !md06_low & !md07_low & md08_low & md09_low & md10_low & !md11_low & irq.Q) # !n_t_63x # (ecdf_f.Q & !io_pause_low & md03_low & !md04_low & !md05_low & !md06_low & !md07_low & md08_low & md09_low & !md10_low & !md11_low & riot11.Q & !riot00.Q) # (ecdf_f.Q & !io_pause_low & md03_low & !md04_low & !md05_low & !md06_low & !md07_low & md08_low & md09_low & !md10_low & !md11_low & riot11.Q & !riot01.Q)); Com_Ctrl_296 = ((!f_low & riot11.Q & tp3 & !user_mode & riot02.Q) # (!f_low & riot11.Q & tp3 & !user_mode & !riot00.Q) # (!f_low & riot11.Q & tp3 & !user_mode & !riot01.Q) # (!f_low & riot11.Q & tp3 & !user_mode & riot04.Q & !riot05.Q & !riot09.Q & !riot10.Q) # (!f_low & riot11.Q & tp3 & !user_mode & riot03.Q)); Com_Ctrl_297 = (initialize # (!io_pause_low & md03_low & !md04_low & !md05_low & !md06_low & !md07_low & md08_low & md09_low & md10_low & md11_low)); !FB_298 = (!md05_low & !md04_low & !io_pause_low & md03_low & md08_low & md09_low & !md10_low & !md11_low & !md07_low & !md06_low); c1_low.OE = !c1_low.PIN; c0_low.OE = !c0_low.PIN; data00_low.OE = !data00_low.PIN; data01_low.OE = !data01_low.PIN; data02_low.OE = !data02_low.PIN; data04_low.OE = !data04_low.PIN; data03_low.OE = !data03_low.PIN; data05_low.OE = !data05_low.PIN; data06_low.OE = !data06_low.PIN; data07_low.OE = !data07_low.PIN; data09_low.OE = !data09_low.PIN; data08_low.OE = !data08_low.PIN; data11_low.OE = !data11_low.PIN; data10_low.OE = !data10_low.PIN; ecdf_f.C = FB_298; ecdf_f.AP = (!f_low & !user_mode); internal_io_low.OE = !internal_io_low.PIN; int_rqst_low.OE = !int_rqst_low.PIN; irq.C = (!f_low & !md00_low & md01_low & !n_t_161x.Q & tp2 & !user_mode); irq.AR = (initialize # (!io_pause_low & md03_low & !md04_low & !md05_low & !md06_low & !md07_low & md08_low & md09_low & md11_low & tp3)); md_dir_low.OE = !md_dir_low.PIN; n_t_161x.C = 1; n_t_161x.AR = Com_Ctrl_297; n_t_25x.C = Com_Ctrl_296; n_t_25x.AR = initialize; n_t_30x.C = Com_Ctrl_296; n_t_30x.AR = !n_t_49x; n_t_30x.AP = (initialize # (!io_pause_low & md03_low & !md04_low & !md05_low & !md06_low & !md07_low & md08_low & md09_low & md10_low & md11_low)); n_t_31x.C = Com_Ctrl_296; n_t_31x.AR = initialize; n_t_32x.C = Com_Ctrl_296; n_t_32x.AR = initialize; n_t_33x.C = Com_Ctrl_296; n_t_33x.AR = initialize; n_t_34x.C = Com_Ctrl_296; n_t_34x.AR = Com_Ctrl_297; n_t_35x.C = Com_Ctrl_296; n_t_35x.AR = initialize; n_t_36x.C = Com_Ctrl_296; n_t_36x.AR = initialize; n_t_516x.C = (!e_low & tp1); n_t_516x.AR = (initialize # (!e_low & tp4)); n_t_457x.C = (!io_pause_low & md03_low & !md04_low & !md05_low & !md06_low & !md07_low & md08_low & !md09_low & md10_low & !md11_low); riot00.C = (!f_low & tp2 & !user_mode); riot00.AR = initialize; riot01.C = (!f_low & tp2 & !user_mode); riot01.AR = initialize; riot02.C = (!f_low & tp2 & !user_mode); riot02.AR = initialize; riot03.C = (!f_low & tp2 & !user_mode); riot03.AR = initialize; riot04.C = (!f_low & tp2 & !user_mode); riot04.AR = initialize; riot05.C = (!f_low & tp2 & !user_mode); riot05.AR = initialize; riot06.C = (!f_low & tp2 & !user_mode); riot06.AR = initialize; riot07.C = (!f_low & tp2 & !user_mode); riot07.AR = initialize; riot08.C = (!f_low & tp2 & !user_mode); riot08.AR = initialize; riot09.C = (!f_low & tp2 & !user_mode); riot09.AR = initialize; riot10.C = (!f_low & tp2 & !user_mode); riot10.AR = initialize; riot11.C = (!f_low & tp2 & !user_mode); riot11.AR = initialize; rtb00.C = (!f_low & !md00_low & md01_low & !n_t_161x.Q & tp2 & !user_mode); rtb00.AR = initialize; rtb01.C = (!f_low & !md00_low & md01_low & !n_t_161x.Q & tp2 & !user_mode); rtb01.AR = initialize; rtb02.C = (!f_low & !md00_low & md01_low & !n_t_161x.Q & tp2 & !user_mode); rtb02.AR = initialize; rtb03.C = (!f_low & !md00_low & md01_low & !n_t_161x.Q & tp2 & !user_mode); rtb03.AR = initialize; rtb04.C = (!f_low & !md00_low & md01_low & !n_t_161x.Q & tp2 & !user_mode); rtb04.AR = initialize; rtb06.C = (!f_low & !md00_low & md01_low & !n_t_161x.Q & tp2 & !user_mode); rtb06.AR = initialize; rtb05.C = (!f_low & !md00_low & md01_low & !n_t_161x.Q & tp2 & !user_mode); rtb05.AR = initialize; rtb07.C = (!f_low & !md00_low & md01_low & !n_t_161x.Q & tp2 & !user_mode); rtb07.AR = initialize; rtb08.C = (!f_low & !md00_low & md01_low & !n_t_161x.Q & tp2 & !user_mode); rtb08.AR = initialize; rtb09.C = (!f_low & !md00_low & md01_low & !n_t_161x.Q & tp2 & !user_mode); rtb09.AR = initialize; rtb10.C = (!f_low & !md00_low & md01_low & !n_t_161x.Q & tp2 & !user_mode); rtb10.AR = initialize; rtb11.C = (!f_low & !md00_low & md01_low & !n_t_161x.Q & tp2 & !user_mode); rtb11.AR = initialize; skip_low.OE = !skip_low.PIN; PQFP100 Pin/Node Placement: ------------------------------------ Pin 1 = data10_low; /* MC 6 */ Pin 2 = data09_low; /* MC 5 */ Pin 3 = data11_low; /* MC 3 */ Pin 4 = data08_low; /* MC 1 */ Pin 6 = TDI; /* MC 32 */ Pin 7 = md11_low; /* MC 30 */ Pin 8 = md10_low; /* MC 29 */ Pin 9 = md09_low; /* MC 27 */ Pin 10 = md08_low; /* MC 25 */ Pin 11 = user_mode; /* MC 24 */ Pin 12 = e_low; /* MC 22 */ Pin 14 = f_low; /* MC 21 */ Pin 15 = ma11_low; /* MC 19 */ Pin 16 = ma10_low; /* MC 17 */ Pin 17 = TMS; /* MC 48 */ Pin 18 = ma09_low; /* MC 46 */ Pin 19 = ma08_low; /* MC 45 */ Pin 21 = ir1_low; /* MC 43 */ Pin 22 = ir0_low; /* MC 41 */ Pin 26 = skip_low; /* MC 35 */ Pin 27 = initialize; /* MC 33 */ Pin 29 = int_rqst_low; /* MC 64 */ Pin 30 = internal_io_low; /* MC 62 */ Pin 31 = tp4; /* MC 61 */ Pin 32 = tp3; /* MC 59 */ Pin 33 = c1_low; /* MC 57 */ Pin 34 = tp2; /* MC 56 */ Pin 35 = c0_low; /* MC 54 */ Pin 37 = tp1; /* MC 53 */ Pin 38 = io_pause_low; /* MC 51 */ Pin 44 = data07_low; /* MC 69 */ Pin 46 = data06_low; /* MC 70 */ Pin 47 = data05_low; /* MC 72 */ Pin 48 = data04_low; /* MC 73 */ Pin 49 = md07_low; /* MC 75 */ Pin 50 = md06_low; /* MC 77 */ Pin 51 = md05_low; /* MC 78 */ Pin 52 = md04_low; /* MC 80 */ Pin 54 = ma07_low; /* MC 81 */ Pin 55 = ma06_low; /* MC 83 */ Pin 56 = ma05_low; /* MC 85 */ Pin 57 = ma04_low; /* MC 86 */ Pin 62 = data03_low; /* MC 93 */ Pin 63 = data02_low; /* MC 94 */ Pin 64 = TCK; /* MC 96 */ Pin 65 = data01_low; /* MC 97 */ Pin 66 = data00_low; /* MC 99 */ Pin 67 = md03_low; /* MC 101 */ Pin 69 = md02_low; /* MC 102 */ Pin 70 = md01_low; /* MC 104 */ Pin 71 = md00_low; /* MC 105 */ Pin 72 = md_dir_low; /* MC 107 */ Pin 73 = ma03_low; /* MC 109 */ Pin 74 = ma02_low; /* MC 110 */ Pin 75 = TDO; /* MC 112 */ Pin 77 = ma01_low; /* MC 113 */ Pin 78 = ma00_low; /* MC 115 */ Pin 82 = n_t_49x; /* MC 121 */ Pin 83 = n_t_63x; /* MC 123 */ PINNODE 331 = FB_298; /* MC 31 Foldback */ PINNODE 602 = Com_Ctrl_297; /* MC 2 Feedback */ PINNODE 604 = n_t_30x.AP; /* MC 4 Feedback */ PINNODE 607 = n_t_31x; /* MC 7 Feedback */ PINNODE 610 = n_t_35x; /* MC 10 Feedback */ PINNODE 612 = n_t_36x; /* MC 12 Feedback */ PINNODE 615 = n_t_25x; /* MC 15 Feedback */ PINNODE 616 = irq.AR; /* MC 16 Feedback */ PINNODE 617 = riot00; /* MC 17 Feedback */ PINNODE 618 = rtb01; /* MC 18 Feedback */ PINNODE 619 = rtb02; /* MC 19 Feedback */ PINNODE 620 = rtb00; /* MC 20 Feedback */ PINNODE 621 = riot11; /* MC 21 Feedback */ PINNODE 622 = riot10; /* MC 22 Feedback */ PINNODE 623 = riot09; /* MC 23 Feedback */ PINNODE 624 = riot08; /* MC 24 Feedback */ PINNODE 625 = riot07; /* MC 25 Feedback */ PINNODE 626 = riot06; /* MC 26 Feedback */ PINNODE 627 = riot03; /* MC 27 Feedback */ PINNODE 628 = riot05; /* MC 28 Feedback */ PINNODE 629 = riot04; /* MC 29 Feedback */ PINNODE 630 = ecdf_f; /* MC 30 Feedback */ PINNODE 632 = n_t_457x; /* MC 32 Feedback */ PINNODE 646 = n_t_161x; /* MC 46 Feedback */ PINNODE 647 = n_t_34x; /* MC 47 Feedback */ PINNODE 648 = Com_Ctrl_296; /* MC 48 Feedback */ PINNODE 655 = riot01; /* MC 55 Feedback */ PINNODE 656 = rtb06; /* MC 56 Feedback */ PINNODE 658 = rtb08; /* MC 58 Feedback */ PINNODE 659 = rtb07; /* MC 59 Feedback */ PINNODE 660 = rtb05; /* MC 60 Feedback */ PINNODE 661 = rtb04; /* MC 61 Feedback */ PINNODE 663 = rtb03; /* MC 63 Feedback */ PINNODE 679 = n_t_32x; /* MC 79 Feedback */ PINNODE 680 = n_t_30x; /* MC 80 Feedback */ PINNODE 687 = riot02; /* MC 87 Feedback */ PINNODE 690 = irq; /* MC 90 Feedback */ PINNODE 692 = rtb11; /* MC 92 Feedback */ PINNODE 695 = rtb09; /* MC 95 Feedback */ PINNODE 696 = rtb10; /* MC 96 Feedback */ PINNODE 711 = n_t_516x; /* MC 111 Feedback */ PINNODE 712 = n_t_33x; /* MC 112 Feedback */ PINNODE 727 = n_t_516x.AR; /* MC 127 Feedback */ ** Resource Usage ** DCERP Field = Summary of Allocations. ||||| |||||_Preset [p,-] == p = PT preset, - No Preset. |||| ||||__Reset [g,r,-] == g= Global AR, r = PT reset, - No reset. ||| |||___Clock Enable [e,-] == e = Product Term, - always enabled, - none. || ||____Clock [c,g,-], == c = Product term, g = Global term, - No Clock. | |_____Type [C,D,L,T], == Register type C= combin, D=dff, L=latch, T=tff. For input only = INPUT. MCell Pin# Oe PinDrive DCERP FBDrive DCERP Foldback CascadeOut TotPT output_slew MC1 4 PT data08_low C---- -- -- -- 3 slow MC2 0 -- Com_Ctrl_297 C---- -- -- 2 slow MC3 3 PT data11_low C---- -- -- -- 4 slow MC4 0 -- n_t_30x.AP C---- -- -- 2 slow MC5 2 PT data09_low C---- -- -- -- 4 slow MC6 1 PT data10_low C---- -- -- -- 4 slow MC7 0 -- n_t_31x Dc-r- -- -- 3 slow MC8 100 -- -- -- -- 0 slow MC9 99 -- -- -- -- 0 slow MC10 0 -- n_t_35x Dc-r- -- -- 3 slow MC11 98 -- -- -- -- 0 slow MC12 0 -- n_t_36x Dc-r- -- -- 3 slow MC13 96 -- -- -- -- 0 slow MC14 95 -- -- -- -- 0 slow MC15 0 -- n_t_25x Dc-r- -- -- 3 slow MC16 94 -- irq.AR C---- -- -- 2 slow MC17 16 -- ma10_low INPUT riot00 Dc-r- -- -- 3 slow MC18 0 -- rtb01 Dc-r- -- -- 3 slow MC19 15 -- ma11_low INPUT rtb02 Dc-r- -- -- 3 slow MC20 0 -- rtb00 Dc-r- -- -- 3 slow MC21 14 -- f_low INPUT riot11 Dc-r- -- -- 3 slow MC22 12 -- e_low INPUT riot10 Dc-r- -- -- 3 slow MC23 0 -- riot09 Dc-r- -- -- 3 slow MC24 11 -- user_mode INPUT riot08 Dc-r- -- -- 3 slow MC25 10 -- md08_low INPUT riot07 Dc-r- -- -- 3 slow MC26 0 -- riot06 Dc-r- -- -- 3 slow MC27 9 -- md09_low INPUT riot03 Dc-r- -- -- 3 slow MC28 0 -- riot05 Dc-r- -- -- 3 slow MC29 8 -- md10_low INPUT riot04 Dc-r- -- -- 3 slow MC30 7 -- md11_low INPUT ecdf_f Dc--p -- -- 2 slow MC31 0 -- -- FB_298 -> n_t_457x 5 slow MC32 6 -- TDI INPUT n_t_457x Dc--- NA -- 5 slow MC33 27 -- initialize INPUT -- -- -- 0 slow MC34 0 -- -- -- -> skip_low 5 slow MC35 26 PT skip_low C---- -- -- -- 3 slow MC36 0 -- -- -- -- 0 slow MC37 25 -- -- -- -- 0 slow MC38 24 -- -- -- -- 0 slow MC39 0 -- -- -- -- 0 slow MC40 23 -- -- -- -- 0 slow MC41 22 -- ir0_low INPUT -- -- -- 0 slow MC42 0 -- -- -- -- 0 slow MC43 21 -- ir1_low INPUT -- -- -- 0 slow MC44 0 -- -- -- -- 0 slow MC45 19 -- ma08_low INPUT -- -- -- 0 slow MC46 18 -- ma09_low INPUT n_t_161x D--r- -- -- 1 slow MC47 0 -- n_t_34x Dc-r- -- -- 2 slow MC48 17 -- TMS INPUT Com_Ctrl_296 C---- NA -- 5 slow MC49 39 -- -- -- -- 0 slow MC50 0 -- -- -- -- 0 slow MC51 38 -- io_pause_low INPUT -- -- -- 0 slow MC52 0 -- -- -- -- 0 slow MC53 37 -- tp1 INPUT -- -- -- 0 slow MC54 35 PT c0_low C---- -- -- -- 2 slow MC55 0 -- riot01 Dc-r- -- -- 3 slow MC56 34 -- tp2 INPUT rtb06 Dc-r- -- -- 3 slow MC57 33 PT c1_low C---- -- -- -- 3 slow MC58 0 -- rtb08 Dc-r- -- -- 3 slow MC59 32 -- tp3 INPUT rtb07 Dc-r- -- -- 3 slow MC60 0 -- rtb05 Dc-r- -- -- 3 slow MC61 31 -- tp4 INPUT rtb04 Dc-r- -- -- 3 slow MC62 30 PT internal_io_low C---- -- -- -- 2 slow MC63 0 -- rtb03 Dc-r- -- -- 3 slow MC64 29 PT int_rqst_low C---- -- -- -- 2 slow MC65 42 -- -- -- -- 0 slow MC66 0 -- -- -- -- 0 slow MC67 43 -- -- -- -- 0 slow MC68 0 -- -- -- -- 0 slow MC69 44 PT data07_low C---- -- -- -- 3 slow MC70 46 PT data06_low C---- -- -- -- 3 slow MC71 0 -- -- -- -- 0 slow MC72 47 PT data05_low C---- -- -- -- 3 slow MC73 48 PT data04_low C---- -- -- -- 3 slow MC74 0 -- -- -- -- 0 slow MC75 49 -- md07_low INPUT -- -- -- 0 slow MC76 0 -- -- -- -- 0 slow MC77 50 -- md06_low INPUT -- -- -- 0 slow MC78 51 -- md05_low INPUT -- -- -- 0 slow MC79 0 -- n_t_32x Dc-r- -- -- 3 slow MC80 52 -- md04_low INPUT n_t_30x Dc-rp -- -- 4 slow MC81 54 -- ma07_low INPUT -- -- -- 0 slow MC82 0 -- -- -- -- 0 slow MC83 55 -- ma06_low INPUT -- -- -- 0 slow MC84 0 -- -- -- -- 0 slow MC85 56 -- ma05_low INPUT -- -- -- 0 slow MC86 57 -- ma04_low INPUT -- -- -- 0 slow MC87 0 -- riot02 Dc-r- -- -- 3 slow MC88 58 -- -- -- -- 0 slow MC89 59 -- -- -- -- 0 slow MC90 0 -- irq Dc-r- -- -- 2 slow MC91 60 -- -- -- -- 0 slow MC92 0 -- rtb11 Dc-r- -- -- 3 slow MC93 62 PT data03_low C---- -- -- -- 3 slow MC94 63 PT data02_low C---- -- -- -- 3 slow MC95 0 -- rtb09 Dc-r- -- -- 3 slow MC96 64 -- TCK INPUT rtb10 Dc-r- -- -- 3 slow MC97 65 PT data01_low C---- -- -- -- 3 slow MC98 0 -- -- -- -- 0 slow MC99 66 PT data00_low C---- -- -- -- 3 slow MC100 0 -- -- -- -- 0 slow MC101 67 -- md03_low INPUT -- -- -- 0 slow MC102 69 -- md02_low INPUT -- -- -- 0 slow MC103 0 -- -- -- -- 0 slow MC104 70 -- md01_low INPUT -- -- -- 0 slow MC105 71 -- md00_low INPUT -- -- -- 0 slow MC106 0 -- -- -- -- 0 slow MC107 72 PT md_dir_low C---- -- -- -- 2 slow MC108 0 -- -- -- -- 0 slow MC109 73 -- ma03_low INPUT -- -- -- 0 slow MC110 74 -- ma02_low INPUT -- -- -- 0 slow MC111 0 -- n_t_516x Dc-r- -- -- 3 slow MC112 75 -- TDO INPUT n_t_33x Dc-r- -- -- 3 slow MC113 77 -- ma01_low INPUT -- -- -- 0 slow MC114 0 -- -- -- -- 0 slow MC115 78 -- ma00_low INPUT -- -- -- 0 slow MC116 0 -- -- -- -- 0 slow MC117 79 -- -- -- -- 0 slow MC118 80 -- -- -- -- 0 slow MC119 0 -- -- -- -- 0 slow MC120 81 -- -- -- -- 0 slow MC121 82 -- n_t_49x INPUT -- -- -- 0 slow MC122 0 -- -- -- -- 0 slow MC123 83 on n_t_63x C---- -- -- -- 1 slow MC124 0 -- -- -- -- 0 slow MC125 85 -- -- -- -- 0 slow MC126 86 -- -- -- -- 0 slow MC127 0 -- n_t_516x.AR C---- -- -- 2 slow MC128 87 -- -- -- -- 0 slow MC0 92 -- -- -- -- 0 slow MC0 91 -- -- -- -- 0 slow MC0 90 -- -- -- -- 0 slow MC0 89 -- -- -- -- 0 slow Logic Array Block Logic Cells I/O Pins Foldbacks TotalPT FanIN Cascades A: LC1 - LC16 11/16(68%) 4/16(25%) 0/16(0%) 33/80(41%) (28) 0 B: LC17 - LC32 15/16(93%) 10/16(62%) 1/16(6%) 51/80(63%) (28) 1 C: LC33 - LC48 4/16(25%) 7/16(43%) 0/16(0%) 16/80(20%) (28) 1 D: LC49 - LC64 11/16(68%) 9/16(56%) 0/16(0%) 30/80(37%) (28) 0 E: LC65 - LC80 6/16(37%) 8/16(50%) 0/16(0%) 19/80(23%) (28) 0 F: LC81 - LC96 7/16(43%) 7/16(43%) 0/16(0%) 20/80(25%) (28) 0 G: LC97 - LC112 5/16(31%) 10/16(62%) 0/16(0%) 14/80(17%) (28) 0 H: LC113- LC128 2/16(12%) 4/16(25%) 0/16(0%) 3/80(3%) (14) 0 Total dedicated input used: 0/4 (0%) Total I/O pins used 59/80 (73%) Total Logic cells used 63/128 (49%) Total Flip-Flop used 37/128 (28%) Total Foldback logic used 1/128 (0%) Total Nodes+FB/MCells 62/128 (48%) Total cascade used 2 Total input pins 40 Total output pins 19 Total Pts 186 Creating pla file C:\USERS\VINCE\DOCUMENTS\WEBSVN\TRUNK\EAGLE\PROJECTS\DEC\TSC8-75\CPLD-SRC\CPLD.tt3 with 0 inputs 0 outputs, 0 pins 0 nodes and 0 pterms... ---------------- End fitter, Design FITS $Device PQFP100 fits FIT1508 completed in 0.00 seconds