Atmel ATF1508AS Fitter Version 1.8.7.8 ,running Sun Sep 06 22:18:53 2015 fit1508 C:\CYGWIN\HOME\VINCE\TTL2PLD\M868\M868.tt2 -CUPL -dev P1508Q100 -JTAG ON ****** Initial fitting strategy and property ****** Pla_in_file = M868.tt2 Pla_out_file = M868.tt3 Jedec_file = M868.jed Vector_file = M868.tmv verilog_file = M868.vt Time_file = Log_file = M868.fit err_file = Device_name = PQFP100 Module_name = Package_type = PQFP Preassign_file = Property_file = Sleep_mode = Preassignment = Security_mode = OFF Pin_keep_mode = ON Dedicated_input_clock = Dedicated_input_reset = Dedicated_input_oe = supporter = CUPL optimize = ON Soft_buffer = Xor_synthesis = OFF Foldback_logic = on Expander = Cascade_logic = OFF Dedicated_input = Output_fast = OFF ******************************* Power down pin 1 = OFF Power down pin 2 = OFF power_reset = OFF JTAG = ON TDI pullup = OFF TMS pullup = OFF MC_power = OFF Open_collector = OFF ITD0 = ON ITD1 = ON ITD2 = ON Fast_inlatch = off ******************************* --------------------------------------------------------- Fitter_Pass 1, Preassign = KEEP, LOGIC_DOUBLING : OFF ... Info: C:\CYGWIN\HOME\VINCE\TTL2PLD\M868\M868 uses 90% of the logic resources in device PQFP100 If you wish to have more pins available for future logic change Atmel recommends using a larger device. ## Warning : Placement fail --------------------------------------------------------- Fitter_Pass 2, Preassign = KEEP, CASCADE_LOGIC : (TRY) ... If you wish to have more pins available for future logic change Atmel recommends using a larger device. Performing global Output Enable pin assignments ... Performing global pin assignments ... -------------------------------------- Final global control pins assignment (if applicable)... ------------------------------------------------------- n_t_96x assigned to pin 87 cc_tpg_clk assigned to pin 89 Performing input pin pre-assignments ... ------------------------------------ n_t_17x assigned to pin 92 cc_tpg_clk assigned to pin 89 n_t_80x assigned to pin 91 df_time_er.AR equation needs patching. cc_r_w.AR equation needs patching. gdollar_0.AP equation needs patching. gdollar_3.AR equation needs patching. gdollar_2.AR equation needs patching. gdollar_2.AP equation needs patching. gdollar_0.AR equation needs patching. gdollar_3.AP equation needs patching. n_t_86x.AR equation needs patching. df_comp_wd.AR equation needs patching. df_time_er.AP equation needs patching. 11 control equtions need patching Attempt to place floating signals ... ------------------------------------ data08 is placed at pin 4 (MC 1) data09 is placed at pin 3 (MC 3) data10 is placed at pin 2 (MC 5) data11 is placed at pin 1 (MC 6) f_r_low is placed at pin 100 (MC 8) con_all_halt is placed at pin 99 (MC 9) t_m_enable is placed at pin 98 (MC 11) unith is placed at pin 96 (MC 13) s_g_low is placed at pin 95 (MC 14) n_t_65x is placed at pin 16 (MC 17) int_rqst_low_PIN is placed at feedback node 618 (MC 18) cc_setdly is placed at pin 15 (MC 19) df_time_er.AR is placed at feedback node 620 (MC 20) int_rqst_low is placed at pin 14 (MC 21) initialize is placed at pin 12 (MC 22) n_t_20x is placed at feedback node 622 (MC 22) FB_378 is placed at foldback expander node 322 (MC 22) Com_Ctrl_375 is placed at feedback node 623 (MC 23) skip_low is placed at pin 11 (MC 24) md08 is placed at pin 10 (MC 25) cc_uts is placed at feedback node 625 (MC 25) Com_Ctrl_376 is placed at feedback node 626 (MC 26) md09 is placed at pin 9 (MC 27) Com_Ctrl_373 is placed at feedback node 627 (MC 27) cc_unit is placed at feedback node 628 (MC 28) md10 is placed at pin 8 (MC 29) cc_s_g is placed at feedback node 629 (MC 29) FB_380 is placed at foldback expander node 329 (MC 29) md11 is placed at pin 7 (MC 30) cc_r_w.AR is placed at feedback node 630 (MC 30) XXL_385 is placed at feedback node 631 (MC 31) TDI is placed at pin 6 (MC 32) XXL_386 is placed at feedback node 632 (MC 32) run is placed at pin 27 (MC 33) cc_r_w is placed at feedback node 633 (MC 33) cc_setdly_low is placed at feedback node 634 (MC 34) data07 is placed at pin 26 (MC 35) XXL_391 is placed at feedback node 636 (MC 36) power_ok_low is placed at pin 25 (MC 37) XXL_403 is placed at feedback node 637 (MC 37) io_pause is placed at pin 24 (MC 38) XXL_389 is placed at feedback node 638 (MC 38) XXL_397 is placed at feedback node 639 (MC 39) c0 is placed at pin 23 (MC 40) c1 is placed at pin 22 (MC 41) XXL_384 is placed at foldback expander node 341 (MC 41) XXL_395 is placed at feedback node 642 (MC 42) tp3 is placed at pin 21 (MC 43) XXL_401 is placed at feedback node 643 (MC 43) XXL_404 is placed at feedback node 644 (MC 44) tp4 is placed at pin 19 (MC 45) XXL_396 is placed at feedback node 645 (MC 45) internal_io is placed at pin 18 (MC 46) FB_379 is placed at foldback expander node 346 (MC 46) XXL_392 is placed at feedback node 647 (MC 47) TMS is placed at pin 17 (MC 48) XXL_402 is placed at feedback node 648 (MC 48) data01 is placed at pin 39 (MC 49) XXL_393 is placed at feedback node 650 (MC 50) data02 is placed at pin 38 (MC 51) XXL_387 is placed at feedback node 652 (MC 52) data03 is placed at pin 37 (MC 53) md04 is placed at pin 35 (MC 54) XXL_382 is placed at feedback node 654 (MC 54) XXL_381 is placed at feedback node 655 (MC 55) md05 is placed at pin 34 (MC 56) XXL_383 is placed at feedback node 656 (MC 56) md06 is placed at pin 33 (MC 57) XXL_388 is placed at feedback node 657 (MC 57) XXL_400 is placed at feedback node 658 (MC 58) md07 is placed at pin 32 (MC 59) XXL_398 is placed at feedback node 659 (MC 59) XXL_390 is placed at feedback node 660 (MC 60) data04 is placed at pin 31 (MC 61) data05 is placed at pin 30 (MC 62) XXL_394 is placed at feedback node 663 (MC 63) data06 is placed at pin 29 (MC 64) data00 is placed at pin 42 (MC 65) gdollar_0.AP is placed at feedback node 666 (MC 66) gdollar_3.AR is placed at feedback node 667 (MC 67) gdollar_2.AR is placed at feedback node 668 (MC 68) md03 is placed at pin 44 (MC 69) gdollar_2.AP is placed at feedback node 669 (MC 69) n_t_61x is placed at pin 46 (MC 70) XXL_409 is placed at feedback node 670 (MC 70) XXL_399 is placed at feedback node 671 (MC 71) cc_dtp is placed at pin 47 (MC 72) XXL_407 is placed at feedback node 672 (MC 72) n_t_62x is placed at pin 48 (MC 73) XXL_405 is placed at feedback node 673 (MC 73) XXL_408 is placed at feedback node 674 (MC 74) gdollar_0.AR is placed at feedback node 675 (MC 75) XXL_406 is placed at feedback node 676 (MC 76) gdollar_3.AP is placed at feedback node 677 (MC 77) n_t_67x is placed at pin 51 (MC 78) XXL_410 is placed at feedback node 679 (MC 79) cc_tt_en is placed at pin 52 (MC 80) sync is placed at feedback node 682 (MC 82) sr08 is placed at feedback node 684 (MC 84) Com_Ctrl_377 is placed at feedback node 685 (MC 85) cc_t_m_en is placed at pin 57 (MC 86) sr03 is placed at feedback node 686 (MC 86) sr00 is placed at feedback node 687 (MC 87) sr01 is placed at feedback node 688 (MC 88) n_t_86x.AR is placed at feedback node 689 (MC 89) sr02 is placed at feedback node 690 (MC 90) df_comp_wd.AR is placed at feedback node 691 (MC 91) Com_Ctrl_374 is placed at feedback node 692 (MC 92) cc_tpg1 is placed at feedback node 693 (MC 93) sr04 is placed at feedback node 694 (MC 94) sr06 is placed at feedback node 695 (MC 95) TCK is placed at pin 64 (MC 96) df_time_er.AP is placed at feedback node 696 (MC 96) mtr5_low is placed at feedback node 697 (MC 97) mtr3_low is placed at feedback node 698 (MC 98) mtr4_low is placed at feedback node 699 (MC 99) mtr0_low is placed at feedback node 700 (MC 100) gdollar_5 is placed at feedback node 701 (MC 101) sr11 is placed at feedback node 702 (MC 102) mtr2_low is placed at feedback node 703 (MC 103) rd00 is placed at pin 70 (MC 104) sr09 is placed at feedback node 704 (MC 104) rmt is placed at pin 71 (MC 105) n_t_86x is placed at feedback node 705 (MC 105) tpg0 is placed at feedback node 706 (MC 106) rtt_low is placed at pin 72 (MC 107) mtr1_low is placed at feedback node 707 (MC 107) n_t_101x is placed at feedback node 708 (MC 108) rd01 is placed at pin 73 (MC 109) gdollar_4 is placed at feedback node 709 (MC 109) df_sel_er_low is placed at pin 74 (MC 110) sr05 is placed at feedback node 710 (MC 110) sr10 is placed at feedback node 711 (MC 111) TDO is placed at pin 75 (MC 112) sr07 is placed at feedback node 712 (MC 112) n_t_53x is placed at pin 77 (MC 113) gdollar_1 is placed at feedback node 713 (MC 113) n_t_36x is placed at feedback node 714 (MC 114) rd02 is placed at pin 78 (MC 115) n_t_25x is placed at feedback node 715 (MC 115) gdollar_7 is placed at feedback node 716 (MC 116) nd2 is placed at pin 79 (MC 117) wd_enab is placed at pin 80 (MC 118) gdollar_6 is placed at feedback node 719 (MC 119) wpt is placed at pin 81 (MC 120) nd1 is placed at pin 82 (MC 121) gdollar_3 is placed at feedback node 722 (MC 122) nd0 is placed at pin 83 (MC 123) gdollar_2 is placed at feedback node 724 (MC 124) n_t_92x is placed at pin 85 (MC 125) gdollar_0 is placed at feedback node 725 (MC 125) df_comp_wd is placed at feedback node 727 (MC 127) n_t_96x is placed at pin 87 (MC 128) df_time_er is placed at feedback node 728 (MC 128) c o n t c _ _ c a m _ f l _ s n n t n n _ l e _ _ _ p _ _ r _ n u g t t g t t _ h a n _ _ _ _ _ _ l a b G i l V 1 8 c G 9 9 V n n w o l l N t o C 7 0 l N 6 2 C d d p w t e D h w C x x k D x x C 0 1 t -------------------------------------------- / 100 98 96 94 92 90 88 86 84 82 \ / 99 97 95 93 91 89 87 85 83 81 \ data11 | 1 (*) 80 | wd_enab data10 | 2 79 | nd2 data09 | 3 78 | rd02 data08 | 4 77 | n_t_53x VCC | 5 76 | GND TDI | 6 75 | TDO md11 | 7 74 | df_sel_er_low md10 | 8 73 | rd01 md09 | 9 72 | rtt_low md08 | 10 71 | rmt skip_low | 11 70 | rd00 initialize | 12 69 | GND | 13 68 | VCC int_rqst_low | 14 67 | cc_setdly | 15 66 | n_t_65x | 16 ATF1508 65 | TMS | 17 100-Lead PQFP 64 | TCK internal_io | 18 63 | tp4 | 19 62 | VCC | 20 61 | GND tp3 | 21 60 | c1 | 22 59 | c0 | 23 58 | io_pause | 24 57 | cc_t_m_en power_ok_low | 25 56 | data07 | 26 55 | run | 27 54 | GND | 28 53 | VCC data06 | 29 52 | cc_tt_en data05 | 30 51 | n_t_67x \ 32 34 36 38 40 42 44 46 48 50 / \ 31 33 35 37 39 41 43 45 47 49 / -------------------------------------------- d m m m m V d d d G V d m G n c n a d d d d C a a a N C a d N _ c _ t 0 0 0 0 C t t t D C t 0 D t _ t a 7 6 5 4 a a a a 3 _ d _ 0 0 0 0 0 6 t 6 4 3 2 1 0 1 p 2 x x VCC = Supply Voltage pin which must be connected to (5.0V or 3.0V) GND = GND pin which must be connected to ground TMS,TDI,TDO,TDI = JTAG pins which must reserved for the JTAG interface NC = Unused I/O pins which must be unconnected on the board Universal-Interconnect-Multiplexer assignments ------------------------------------------------ FanIn assignment for block A [38] { con_all_halt,cc_t_m_en,cc_unit, data08,df_sel_er_low,data11,data10,data01,data09,df_time_er, f_r_low, initialize,io_pause, mtr2_low,md11,md10,md09,md05,md03,md06,md04,mtr5_low,mtr4_low,mtr3_low, n_t_20x,n_t_61x,n_t_53x,n_t_62x, power_ok_low, run, s_g_low,sr08,sr11,sr09,sr10, t_m_enable,tp3, unith, } Multiplexer assignment for block A con_all_halt (MC6 P) : MUX 0 Ref (A9p) data08 (MC1 P) : MUX 1 Ref (A1p) mtr2_low (MC18 FB) : MUX 2 Ref (G103fb) f_r_low (MC5 P) : MUX 3 Ref (A8p) md11 (MC25 P) : MUX 4 Ref (B30p) run (MC26 P) : MUX 5 Ref (C33p) unith (MC8 P) : MUX 6 Ref (A13p) initialize (MC22 P) : MUX 7 Ref (B22p) df_sel_er_low (MC37 P) : MUX 8 Ref (G110p) data11 (MC4 P) : MUX 9 Ref (A6p) t_m_enable (MC7 P) : MUX 10 Ref (A11p) cc_t_m_en (MC36 P) : MUX 11 Ref (F86p) s_g_low (MC9 P) : MUX 12 Ref (A14p) data10 (MC3 P) : MUX 13 Ref (A5p) md10 (MC24 P) : MUX 14 Ref (B29p) data01 (MC12 P) : MUX 15 Ref (D49p) sr08 (MC13 FB) : MUX 16 Ref (F84fb) data09 (MC2 P) : MUX 17 Ref (A3p) tp3 (MC29 P) : MUX 18 Ref (C43p) power_ok_low (MC27 P) : MUX 19 Ref (C37p) md09 (MC23 P) : MUX 20 Ref (B27p) md05 (MC31 P) : MUX 21 Ref (D56p) sr11 (MC17 FB) : MUX 22 Ref (G102fb) md03 (MC33 P) : MUX 23 Ref (E69p) sr09 (MC19 FB) : MUX 24 Ref (G104fb) io_pause (MC28 P) : MUX 25 Ref (C38p) df_time_er (MC21 FB) : MUX 27 Ref (H128fb) md06 (MC32 P) : MUX 28 Ref (D57p) md04 (MC30 P) : MUX 29 Ref (D54p) n_t_20x (MC10 FB) : MUX 30 Ref (B22fb) n_t_61x (MC34 P) : MUX 31 Ref (E70p) mtr5_low (MC14 FB) : MUX 32 Ref (G97fb) n_t_53x (MC38 P) : MUX 33 Ref (H113p) n_t_62x (MC35 P) : MUX 34 Ref (E73p) sr10 (MC20 FB) : MUX 35 Ref (G111fb) mtr4_low (MC16 FB) : MUX 36 Ref (G99fb) cc_unit (MC11 FB) : MUX 37 Ref (B28fb) mtr3_low (MC15 FB) : MUX 38 Ref (G98fb) FanIn assignment for block B [34] { cc_t_m_en,cc_dtp,cc_setdly_low,cc_s_g,cc_uts,cc_r_w, data00,df_sel_er_low,df_time_er,data02, int_rqst_low_PIN,io_pause,initialize, md11,md09,md07,md10,md05,md03,md06,md04, n_t_61x,n_t_62x,n_t_36x,n_t_25x,n_t_101x,n_t_53x, power_ok_low, run, skip_low,sync, tp3,tp4,tpg0, } Multiplexer assignment for block B md11 (MC18 P) : MUX 0 Ref (B30p) power_ok_low (MC20 P) : MUX 1 Ref (C37p) md09 (MC16 P) : MUX 2 Ref (B27p) skip_low (MC2 P) : MUX 3 Ref (B24p) run (MC19 P) : MUX 5 Ref (C33p) int_rqst_low_PIN (MC1 FB) : MUX 6 Ref (B18fb) data00 (MC8 P) : MUX 7 Ref (E65p) df_sel_er_low (MC33 P) : MUX 8 Ref (G110p) df_time_er (MC14 FB) : MUX 9 Ref (H128fb) tp3 (MC22 P) : MUX 10 Ref (C43p) cc_t_m_en (MC32 P) : MUX 11 Ref (F86p) md07 (MC27 P) : MUX 12 Ref (D59p) data02 (MC7 P) : MUX 13 Ref (D51p) tp4 (MC23 P) : MUX 14 Ref (C45p) tpg0 (MC10 FB) : MUX 15 Ref (G106fb) md10 (MC17 P) : MUX 16 Ref (B29p) n_t_61x (MC29 P) : MUX 17 Ref (E70p) cc_dtp (MC30 P) : MUX 19 Ref (E72p) n_t_62x (MC31 P) : MUX 20 Ref (E73p) md05 (MC25 P) : MUX 21 Ref (D56p) cc_setdly_low (MC6 FB) : MUX 22 Ref (C34fb) md03 (MC28 P) : MUX 23 Ref (E69p) n_t_36x (MC12 FB) : MUX 24 Ref (H114fb) io_pause (MC21 P) : MUX 25 Ref (C38p) n_t_25x (MC13 FB) : MUX 26 Ref (H115fb) initialize (MC15 P) : MUX 27 Ref (B22p) md06 (MC26 P) : MUX 28 Ref (D57p) md04 (MC24 P) : MUX 29 Ref (D54p) n_t_101x (MC11 FB) : MUX 31 Ref (G108fb) sync (MC9 FB) : MUX 32 Ref (F82fb) n_t_53x (MC34 P) : MUX 33 Ref (H113p) cc_s_g (MC4 FB) : MUX 35 Ref (B29fb) cc_uts (MC3 FB) : MUX 37 Ref (B25fb) cc_r_w (MC5 FB) : MUX 38 Ref (C33fb) FanIn assignment for block C [34] { XXL_382,XXL_381,XXL_383, c1,cc_r_w.AR,c0, data08,data03,data07,data02,data04, internal_io,io_pause,initialize, md11,md10,md05,md03,md09,md06,md04,mtr1_low, n_t_92x,n_t_61x,n_t_62x, sr10,sr08,sr05,sr11,sr02,sr04,sr07, tp4,tp3, } Multiplexer assignment for block C md11 (MC24 P) : MUX 0 Ref (B30p) data08 (MC1 P) : MUX 1 Ref (A1p) c1 (MC5 P) : MUX 2 Ref (C41p) data03 (MC8 P) : MUX 3 Ref (D53p) tp4 (MC27 P) : MUX 4 Ref (C45p) cc_r_w.AR (MC2 FB) : MUX 5 Ref (B30fb) sr10 (MC19 FB) : MUX 7 Ref (G111fb) n_t_92x (MC34 P) : MUX 8 Ref (H125p) data07 (MC3 P) : MUX 9 Ref (C35p) tp3 (MC26 P) : MUX 10 Ref (C43p) c0 (MC4 P) : MUX 11 Ref (C40p) internal_io (MC6 P) : MUX 12 Ref (C46p) data02 (MC7 P) : MUX 13 Ref (D51p) md10 (MC23 P) : MUX 14 Ref (B29p) md05 (MC29 P) : MUX 15 Ref (D56p) sr08 (MC13 FB) : MUX 16 Ref (F84fb) n_t_61x (MC32 P) : MUX 17 Ref (E70p) n_t_62x (MC33 P) : MUX 20 Ref (E73p) sr05 (MC18 FB) : MUX 21 Ref (G110fb) sr11 (MC16 FB) : MUX 22 Ref (G102fb) md03 (MC31 P) : MUX 23 Ref (E69p) md09 (MC22 P) : MUX 24 Ref (B27p) io_pause (MC25 P) : MUX 25 Ref (C38p) data04 (MC12 P) : MUX 26 Ref (D61p) initialize (MC21 P) : MUX 27 Ref (B22p) md06 (MC30 P) : MUX 28 Ref (D57p) md04 (MC28 P) : MUX 29 Ref (D54p) XXL_382 (MC9 FB) : MUX 30 Ref (D54fb) mtr1_low (MC17 FB) : MUX 31 Ref (G107fb) XXL_381 (MC10 FB) : MUX 32 Ref (D55fb) sr02 (MC14 FB) : MUX 33 Ref (F90fb) sr04 (MC15 FB) : MUX 35 Ref (F94fb) XXL_383 (MC11 FB) : MUX 36 Ref (D56fb) sr07 (MC20 FB) : MUX 37 Ref (G112fb) FanIn assignment for block D [33] { cc_r_w,cc_unit,cc_s_g, df_time_er,data01,data00,data04,data02,data06,data03,data05, f_r_low, io_pause, md09,md11,md06,md05,md03,md10,md04,mtr0_low, n_t_62x,n_t_53x,n_t_61x, sr01,sr05,sr00,sr04,sr02,sr08,sr03,sr09,sr06, } Multiplexer assignment for block D sr01 (MC15 FB) : MUX 0 Ref (F88fb) sr05 (MC21 FB) : MUX 1 Ref (G110fb) md09 (MC23 P) : MUX 2 Ref (B27p) df_time_er (MC22 FB) : MUX 3 Ref (H128fb) md11 (MC25 P) : MUX 4 Ref (B30p) data01 (MC5 P) : MUX 5 Ref (D49p) md06 (MC29 P) : MUX 6 Ref (D57p) data00 (MC11 P) : MUX 7 Ref (E65p) data04 (MC8 P) : MUX 8 Ref (D61p) data02 (MC6 P) : MUX 9 Ref (D51p) sr00 (MC14 FB) : MUX 10 Ref (F87fb) data06 (MC10 P) : MUX 12 Ref (D64p) sr04 (MC17 FB) : MUX 13 Ref (F94fb) n_t_62x (MC32 P) : MUX 14 Ref (E73p) sr02 (MC16 FB) : MUX 15 Ref (F90fb) sr08 (MC12 FB) : MUX 16 Ref (F84fb) data03 (MC7 P) : MUX 17 Ref (D53p) n_t_53x (MC33 P) : MUX 19 Ref (H113p) md05 (MC28 P) : MUX 21 Ref (D56p) md03 (MC30 P) : MUX 23 Ref (E69p) cc_r_w (MC4 FB) : MUX 24 Ref (C33fb) io_pause (MC26 P) : MUX 25 Ref (C38p) sr03 (MC13 FB) : MUX 26 Ref (F86fb) n_t_61x (MC31 P) : MUX 27 Ref (E70p) data05 (MC9 P) : MUX 28 Ref (D62p) f_r_low (MC1 FB) : MUX 30 Ref (A8fb) cc_unit (MC2 FB) : MUX 31 Ref (B28fb) md10 (MC24 P) : MUX 32 Ref (B29p) md04 (MC27 P) : MUX 33 Ref (D54p) sr09 (MC20 FB) : MUX 36 Ref (G104fb) sr06 (MC18 FB) : MUX 37 Ref (F95fb) mtr0_low (MC19 FB) : MUX 38 Ref (G100fb) cc_s_g (MC3 FB) : MUX 39 Ref (B29fb) FanIn assignment for block E [33] { cc_dtp,cc_t_m_en,cc_tpg1,cc_unit, data10,data09,data11,data00, io_pause, md09,md06,md03,md05,md11,md04,md08,md10, n_t_62x,n_t_61x,n_t_80x,n_t_101x, rd02,rd01,rtt_low,rd00, sr01,sr00,sync,sr10,sr09,sr02,sr11, tpg0, } Multiplexer assignment for block E sr01 (MC8 FB) : MUX 0 Ref (F88fb) data10 (MC2 P) : MUX 1 Ref (A5p) md09 (MC17 P) : MUX 2 Ref (B27p) md06 (MC23 P) : MUX 4 Ref (D57p) cc_dtp (MC26 P) : MUX 5 Ref (E72p) data09 (MC1 P) : MUX 7 Ref (A3p) sr00 (MC7 FB) : MUX 8 Ref (F87fb) data11 (MC3 P) : MUX 9 Ref (A6p) sync (MC6 FB) : MUX 10 Ref (F82fb) md03 (MC24 P) : MUX 11 Ref (E69p) data00 (MC5 P) : MUX 13 Ref (E65p) n_t_62x (MC27 P) : MUX 14 Ref (E73p) sr10 (MC15 FB) : MUX 15 Ref (G111fb) sr09 (MC12 FB) : MUX 16 Ref (G104fb) n_t_61x (MC25 P) : MUX 17 Ref (E70p) cc_t_m_en (MC28 P) : MUX 19 Ref (F86p) md05 (MC22 P) : MUX 21 Ref (D56p) md11 (MC19 P) : MUX 22 Ref (B30p) rd02 (MC32 P) : MUX 23 Ref (H115p) rd01 (MC31 P) : MUX 24 Ref (G109p) io_pause (MC20 P) : MUX 25 Ref (C38p) cc_tpg1 (MC10 FB) : MUX 27 Ref (F93fb) rtt_low (MC30 P) : MUX 28 Ref (G107p) md04 (MC21 P) : MUX 29 Ref (D54p) md08 (MC16 P) : MUX 30 Ref (B25p) cc_unit (MC4 FB) : MUX 31 Ref (B28fb) md10 (MC18 P) : MUX 32 Ref (B29p) sr02 (MC9 FB) : MUX 33 Ref (F90fb) rd00 (MC29 P) : MUX 35 Ref (G104p) n_t_80x (MC33 FB) : MUX 36 Ref (GCLR) n_t_101x (MC14 FB) : MUX 37 Ref (G108fb) sr11 (MC11 FB) : MUX 38 Ref (G102fb) tpg0 (MC13 FB) : MUX 39 Ref (G106fb) FanIn assignment for block F [34] { Com_Ctrl_373, XXL_399,XXL_396,XXL_385,XXL_403,XXL_395,XXL_389,XXL_388,XXL_392,XXL_393,XXL_404,XXL_387,XXL_390,XXL_391,XXL_400,XXL_386,XXL_394, cc_dtp,cc_r_w,cc_t_m_en, io_pause, n_t_80x,n_t_36x,n_t_101x,n_t_17x, sr11,sr09,sr04,sr05,sr07,sr03,sync,sr06, tpg0, } Multiplexer assignment for block F XXL_399 (MC18 FB) : MUX 0 Ref (E71fb) XXL_396 (MC10 FB) : MUX 1 Ref (C45fb) n_t_80x (MC34 FB) : MUX 2 Ref (GCLR) XXL_385 (MC2 FB) : MUX 3 Ref (B31fb) cc_dtp (MC31 P) : MUX 5 Ref (E72p) cc_r_w (MC4 FB) : MUX 6 Ref (C33fb) io_pause (MC30 P) : MUX 7 Ref (C38p) XXL_403 (MC6 FB) : MUX 8 Ref (C37fb) XXL_395 (MC8 FB) : MUX 9 Ref (C42fb) cc_t_m_en (MC32 P) : MUX 11 Ref (F86p) XXL_389 (MC7 FB) : MUX 12 Ref (C38fb) XXL_388 (MC14 FB) : MUX 13 Ref (D57fb) sr11 (MC23 FB) : MUX 14 Ref (G102fb) XXL_392 (MC11 FB) : MUX 15 Ref (C47fb) sr09 (MC24 FB) : MUX 16 Ref (G104fb) sr04 (MC21 FB) : MUX 17 Ref (F94fb) XXL_393 (MC12 FB) : MUX 18 Ref (D50fb) XXL_404 (MC9 FB) : MUX 19 Ref (C44fb) XXL_387 (MC13 FB) : MUX 20 Ref (D52fb) sr05 (MC27 FB) : MUX 21 Ref (G110fb) Com_Ctrl_373 (MC1 FB) : MUX 23 Ref (B27fb) n_t_36x (MC29 FB) : MUX 24 Ref (H114fb) XXL_390 (MC16 FB) : MUX 25 Ref (D60fb) XXL_391 (MC5 FB) : MUX 26 Ref (C36fb) sr07 (MC28 FB) : MUX 27 Ref (G112fb) XXL_400 (MC15 FB) : MUX 29 Ref (D58fb) sr03 (MC20 FB) : MUX 30 Ref (F86fb) n_t_101x (MC26 FB) : MUX 31 Ref (G108fb) XXL_386 (MC3 FB) : MUX 33 Ref (B32fb) XXL_394 (MC17 FB) : MUX 35 Ref (D63fb) sync (MC19 FB) : MUX 36 Ref (F82fb) sr06 (MC22 FB) : MUX 37 Ref (F95fb) n_t_17x (MC33 FB) : MUX 38 Ref (OE2) tpg0 (MC25 FB) : MUX 39 Ref (G106fb) FanIn assignment for block G [33] { Com_Ctrl_373,Com_Ctrl_375, XXL_402,XXL_397,XXL_410,XXL_407,XXL_409,XXL_398,XXL_405,XXL_406,XXL_401,XXL_408, cc_t_m_en,cc_r_w,cc_uts,cc_tpg1, gdollar_4, io_pause, mtr0_low,mtr2_low,mtr4_low,mtr1_low,mtr5_low,mtr3_low, n_t_80x,n_t_17x,n_t_86x.AR, rmt,rd01,rd02,rd00, sr08,sr10, } Multiplexer assignment for block G sr08 (MC15 FB) : MUX 0 Ref (F84fb) cc_t_m_en (MC27 P) : MUX 1 Ref (F86p) rmt (MC29 P) : MUX 2 Ref (G105p) gdollar_4 (MC24 FB) : MUX 3 Ref (G109fb) Com_Ctrl_373 (MC3 FB) : MUX 5 Ref (B27fb) rd01 (MC30 P) : MUX 6 Ref (G109p) io_pause (MC26 P) : MUX 7 Ref (C38p) mtr0_low (MC21 FB) : MUX 8 Ref (G100fb) XXL_402 (MC7 FB) : MUX 9 Ref (C48fb) XXL_397 (MC5 FB) : MUX 10 Ref (C39fb) XXL_410 (MC14 FB) : MUX 11 Ref (E79fb) XXL_407 (MC10 FB) : MUX 12 Ref (E72fb) rd02 (MC31 P) : MUX 13 Ref (H115p) cc_r_w (MC4 FB) : MUX 14 Ref (C33fb) rd00 (MC28 P) : MUX 15 Ref (G104p) XXL_409 (MC9 FB) : MUX 16 Ref (E70fb) cc_uts (MC2 FB) : MUX 17 Ref (B25fb) Com_Ctrl_375 (MC1 FB) : MUX 18 Ref (B23fb) mtr2_low (MC22 FB) : MUX 20 Ref (G103fb) XXL_398 (MC8 FB) : MUX 21 Ref (D59fb) XXL_405 (MC11 FB) : MUX 23 Ref (E73fb) XXL_406 (MC13 FB) : MUX 25 Ref (E76fb) mtr4_low (MC20 FB) : MUX 26 Ref (G99fb) mtr1_low (MC23 FB) : MUX 27 Ref (G107fb) mtr5_low (MC18 FB) : MUX 28 Ref (G97fb) mtr3_low (MC19 FB) : MUX 30 Ref (G98fb) XXL_401 (MC6 FB) : MUX 31 Ref (C43fb) XXL_408 (MC12 FB) : MUX 33 Ref (E74fb) sr10 (MC25 FB) : MUX 35 Ref (G111fb) n_t_80x (MC33 FB) : MUX 36 Ref (GCLR) cc_tpg1 (MC17 FB) : MUX 37 Ref (F93fb) n_t_17x (MC32 FB) : MUX 38 Ref (OE2) n_t_86x.AR (MC16 FB) : MUX 39 Ref (F89fb) FanIn assignment for block H [27] { Com_Ctrl_376,Com_Ctrl_374,Com_Ctrl_377, cc_t_m_en, df_comp_wd, gdollar_0.AP,gdollar_0,gdollar_0.AP,gdollar_0.AP,gdollar_3,gdollar_0.AP,gdollar_6,gdollar_0.AP,gdollar_0.AP,gdollar_0.AP,gdollar_0.AP,gdollar_2,gdollar_0.AP,gdollar_7, nd1,n_t_86x,nd0,nd2, power_ok_low, tpg0, wd_enab,wpt, } Multiplexer assignment for block H gdollar_3.AR (MC4 FB) : MUX 0 Ref (E67fb) tpg0 (MC14 FB) : MUX 1 Ref (G106fb) nd1 (MC20 P) : MUX 2 Ref (H121p) gdollar_0 (MC24 FB) : MUX 3 Ref (H125fb) df_time_er.AR (MC1 FB) : MUX 4 Ref (B20fb) n_t_86x (MC13 FB) : MUX 5 Ref (G105fb) wd_enab (MC17 P) : MUX 7 Ref (H118p) gdollar_2.AP (MC6 FB) : MUX 8 Ref (E69fb) gdollar_3 (MC21 FB) : MUX 9 Ref (H122fb) gdollar_2.AR (MC5 FB) : MUX 10 Ref (E68fb) cc_t_m_en (MC27 P) : MUX 11 Ref (F86p) gdollar_6 (MC18 FB) : MUX 12 Ref (H119fb) df_comp_wd.AR (MC10 FB) : MUX 13 Ref (F91fb) nd0 (MC22 P) : MUX 14 Ref (H123p) df_time_er.AP (MC12 FB) : MUX 15 Ref (F96fb) gdollar_0.AR (MC7 FB) : MUX 17 Ref (E75fb) power_ok_low (MC26 P) : MUX 19 Ref (C37p) Com_Ctrl_376 (MC2 FB) : MUX 23 Ref (B26fb) gdollar_3.AP (MC8 FB) : MUX 25 Ref (E77fb) wpt (MC19 P) : MUX 27 Ref (H120p) gdollar_2 (MC23 FB) : MUX 29 Ref (H124fb) nd2 (MC16 P) : MUX 31 Ref (H117p) gdollar_0.AP (MC3 FB) : MUX 34 Ref (E66fb) df_comp_wd (MC25 FB) : MUX 35 Ref (H127fb) gdollar_7 (MC15 FB) : MUX 36 Ref (H116fb) Com_Ctrl_374 (MC11 FB) : MUX 37 Ref (F92fb) Com_Ctrl_377 (MC9 FB) : MUX 38 Ref (F85fb) Creating JEDEC file C:\CYGWIN\HOME\VINCE\TTL2PLD\M868\M868.jed ... PQFP100 programmed logic: ----------------------------------- !c1 = (!io_pause & !md03 & !md04 & !md05 & !md06 & !md09 & !md10 & !n_t_61x & !n_t_62x); !c0 = ((!io_pause & !md03 & !md04 & !md05 & !md06 & !md09 & !n_t_61x & !n_t_62x & md11) # (!io_pause & !md03 & !md04 & !md05 & !md06 & !md09 & !n_t_61x & !n_t_62x & !md10)); f_r_low.D = (!n_t_62x & !n_t_61x & !md06 & !md05 & !md04 & !md03 & !io_pause & !data01.PIN); cc_r_w.D = (!n_t_62x & !n_t_61x & !md06 & !md05 & !md04 & !md03 & !io_pause & !data03.PIN); cc_s_g.D = (!n_t_62x & !n_t_61x & !md06 & !md05 & !md04 & !md03 & !io_pause & !data02.PIN); cc_setdly = !cc_setdly_low.Q; cc_setdly_low.D = XXL_384; cc_tpg1.D = !tpg0.Q; !cc_tt_en = ((cc_t_m_en & n_t_80x & !sync.Q & cc_tpg1.Q) # (!cc_t_m_en & n_t_80x & !sync.Q & !rtt_low) # (!cc_t_m_en & n_t_80x & sync.Q & rtt_low) # (cc_t_m_en & n_t_80x & sync.Q & !cc_tpg1.Q)); cc_unit.D = (!n_t_62x & !n_t_61x & !md06 & !md05 & !md04 & !md03 & !io_pause & !data00.PIN); !data00 = ((!io_pause & !md03 & !md04 & !md05 & !md06 & !md09 & !md10 & md11 & !n_t_61x & !n_t_62x & cc_unit.Q) # (!io_pause & !md03 & !md04 & !md05 & !md06 & !md09 & !md10 & !md11 & !n_t_61x & !n_t_62x & sr00.Q)); con_all_halt = !run; !data01 = ((!io_pause & !md03 & !md04 & !md05 & !md06 & !md09 & !md10 & md11 & !n_t_61x & !n_t_62x & f_r_low.Q) # (!io_pause & !md03 & !md04 & !md05 & !md06 & !md09 & !md10 & !md11 & !n_t_61x & !n_t_62x & sr01.Q)); !data02 = ((!io_pause & !md03 & !md04 & !md05 & !md06 & !md09 & !md10 & md11 & !n_t_61x & !n_t_62x & cc_s_g.Q) # (!io_pause & !md03 & !md04 & !md05 & !md06 & !md09 & !md10 & !md11 & !n_t_61x & !n_t_62x & sr02.Q)); !data03 = ((!io_pause & !md03 & !md04 & !md05 & !md06 & !md09 & !md10 & md11 & !n_t_61x & !n_t_62x & cc_r_w.Q) # (!io_pause & !md03 & !md04 & !md05 & !md06 & !md09 & !md10 & !md11 & !n_t_61x & !n_t_62x & sr03.Q)); !data04 = ((!io_pause & !md03 & !md04 & !md05 & !md06 & !md09 & !md10 & md11 & !n_t_61x & !n_t_62x & n_t_53x) # (!io_pause & !md03 & !md04 & !md05 & !md06 & !md09 & !md10 & !md11 & !n_t_61x & !n_t_62x & sr04.Q)); !data05 = ((!io_pause & !md03 & !md04 & !md05 & !md06 & !md09 & !md10 & md11 & !n_t_61x & !n_t_62x & df_time_er.Q) # (!io_pause & !md03 & !md04 & !md05 & !md06 & !md09 & !md10 & !md11 & !n_t_61x & !n_t_62x & sr05.Q)); !data06 = ((!io_pause & !md03 & !md04 & !md05 & !md06 & !md09 & !md10 & md11 & !n_t_61x & !n_t_62x & !mtr0_low.Q) # (!io_pause & !md03 & !md04 & !md05 & !md06 & !md09 & !md10 & !md11 & !n_t_61x & !n_t_62x & sr06.Q)); !data07 = ((!io_pause & !md03 & !md04 & !md05 & !md06 & !md09 & !md10 & md11 & !n_t_61x & !n_t_62x & !mtr1_low.Q) # (!io_pause & !md03 & !md04 & !md05 & !md06 & !md09 & !md10 & !md11 & !n_t_61x & !n_t_62x & sr07.Q)); !data08 = ((!io_pause & !md03 & !md04 & !md05 & !md06 & !md09 & !md10 & md11 & !n_t_61x & !n_t_62x & !mtr2_low.Q) # (!io_pause & !md03 & !md04 & !md05 & !md06 & !md09 & !md10 & !md11 & !n_t_61x & !n_t_62x & sr08.Q)); !data09 = ((!io_pause & !md03 & !md04 & !md05 & !md06 & !md09 & !md10 & md11 & !n_t_61x & !n_t_62x & !mtr3_low.Q) # (!io_pause & !md03 & !md04 & !md05 & !md06 & !md09 & !md10 & !md11 & !n_t_61x & !n_t_62x & sr09.Q)); !data10 = ((!io_pause & !md03 & !md04 & !md05 & !md06 & !md09 & !md10 & md11 & !n_t_61x & !n_t_62x & !mtr4_low.Q) # (!io_pause & !md03 & !md04 & !md05 & !md06 & !md09 & !md10 & !md11 & !n_t_61x & !n_t_62x & sr10.Q)); !data11 = ((!io_pause & !md03 & !md04 & !md05 & !md06 & !md09 & !md10 & md11 & !n_t_61x & !n_t_62x & !mtr5_low.Q) # (!io_pause & !md03 & !md04 & !md05 & !md06 & !md09 & !md10 & !md11 & !n_t_61x & !n_t_62x & sr11.Q)); df_comp_wd.D = 0; df_time_er.D = 0; gdollar_0.D = 0; gdollar_1.D = 0; gdollar_2.D = 0; gdollar_3.D = 0; !gdollar_4.D = (cc_uts.Q & !mtr0_low.Q); !gdollar_5.D = (cc_uts.Q & !gdollar_4.Q); gdollar_6.T = 1; gdollar_7.T = 1; int_rqst_low_PIN.TH = 0; !internal_io = (!io_pause & !md03 & !md04 & !md05 & !md06 & !n_t_61x & !n_t_62x); !mtr0_low.D = (cc_uts.Q & !mtr1_low.Q); !mtr1_low.D = (cc_uts.Q & !mtr2_low.Q); !mtr2_low.D = (cc_uts.Q & !mtr3_low.Q); !mtr3_low.D = (cc_uts.Q & !mtr4_low.Q); !mtr4_low.D = (cc_uts.Q & !mtr5_low.Q); !mtr5_low.D = (cc_uts.Q & !rmt); n_t_101x.D = (!cc_t_m_en & cc_uts.Q); n_t_20x.D = 0; n_t_25x.T = 1; n_t_36x.T = 1; n_t_65x = (!io_pause & !md07); n_t_67x = (!io_pause & !md08); n_t_86x.D = 0; nd0 = ((!df_comp_wd.Q & gdollar_2.Q) # (df_comp_wd.Q & !gdollar_2.Q)); nd1 = ((!df_comp_wd.Q & gdollar_3.Q) # (df_comp_wd.Q & !gdollar_3.Q)); !s_g_low = (!n_t_20x.Q & power_ok_low); nd2 = ((!df_comp_wd.Q & gdollar_0.Q) # (df_comp_wd.Q & !gdollar_0.Q)); !skip_low = ((!io_pause & !md03 & !md04 & !md05 & !md06 & md09 & !md10 & !md11 & !n_t_61x & !n_t_62x & n_t_36x.Q) # (!io_pause & !md03 & !md04 & !md05 & !md06 & md09 & !md10 & md11 & !n_t_61x & !n_t_62x & df_time_er.Q) # (!io_pause & !md03 & !md04 & !md05 & !md06 & md09 & md10 & !md11 & !n_t_61x & !n_t_62x & n_t_25x.Q)); !sr00.D = (XXL_387 # XXL_388 # (io_pause & !sr03.Q)); !sr01.D = (XXL_389 # XXL_390 # (io_pause & !sr04.Q)); !sr02.D = (XXL_391 # XXL_392 # (io_pause & !sr05.Q)); !sr03.D = (XXL_393 # XXL_394 # (io_pause & !sr06.Q)); !sr04.D = (XXL_395 # XXL_396 # (io_pause & !sr07.Q)); !sr05.D = (XXL_397 # XXL_398 # (io_pause & !sr08.Q)); !sr06.D = (XXL_399 # XXL_400 # (io_pause & !sr09.Q)); !sr07.D = (XXL_401 # XXL_402 # (io_pause & !sr10.Q)); !sr08.D = (XXL_403 # XXL_404 # (io_pause & !sr11.Q)); !sr09.D = (XXL_405 # XXL_406 # (io_pause & !rd00)); !sr10.D = (XXL_407 # XXL_408 # (io_pause & !rd01)); !sr11.D = (XXL_409 # XXL_410 # (io_pause & !rd02)); sync.D = !sync.Q; !t_m_enable = (cc_t_m_en & df_sel_er_low & !df_time_er.Q & !initialize & !n_t_53x & power_ok_low & !run); tpg0.D = cc_tpg1.Q; unith = !cc_unit.Q; !wd_enab = (!cc_t_m_en & !n_t_86x.Q & power_ok_low); wpt = tpg0.Q; int_rqst_low = !int_rqst_low_PIN.PIN; cc_uts.D = cc_setdly_low.Q; Com_Ctrl_373 = ((cc_dtp & n_t_101x.Q & !sync.Q) # (cc_dtp & cc_t_m_en & tpg0.Q) # (!io_pause & !md03 & !md04 & !md05 & !md06 & !md09 & md10 & !md11 & !n_t_61x & !n_t_62x & tp3)); Com_Ctrl_374 = ((cc_dtp & cc_t_m_en & tpg0.Q) # (cc_dtp & n_t_101x.Q & !sync.Q)); Com_Ctrl_375 = ((cc_dtp & n_t_101x.Q & !sync.Q) # (cc_dtp & cc_t_m_en & tpg0.Q) # !cc_setdly_low.Q); Com_Ctrl_376 = (!cc_uts.Q # (!io_pause & !md03 & !md04 & !md05 & !md06 & !md09 & !n_t_61x & !n_t_62x & tp3 & !md10) # (!io_pause & !md03 & !md04 & !md05 & !md06 & !md09 & !n_t_61x & !n_t_62x & tp3 & !md11)); Com_Ctrl_377 = ((cc_dtp & cc_t_m_en & !tpg0.Q) # (cc_dtp & n_t_101x.Q & sync.Q)); !FB_378 = (!initialize & !tp4); !FB_379 = (!initialize & !tp4); !FB_380 = (!initialize & !run); XXL_381 = ((!f_r_low.Q & cc_s_g.Q & cc_unit.Q & data00.PIN & !data01.PIN & data02.PIN & !io_pause & !md03 & !md04 & !md05 & !md06 & !n_t_61x & !n_t_62x) # (f_r_low.Q & !cc_s_g.Q & !cc_unit.Q & !data00.PIN & data01.PIN & !data02.PIN & !io_pause & !md03 & !md04 & !md05 & !md06 & !n_t_61x & !n_t_62x) # (f_r_low.Q & !cc_s_g.Q & cc_unit.Q & data00.PIN & data01.PIN & !data02.PIN & !io_pause & !md03 & !md04 & !md05 & !md06 & !n_t_61x & !n_t_62x) # (f_r_low.Q & cc_s_g.Q & !cc_unit.Q & !data00.PIN & data01.PIN & data02.PIN & !io_pause & !md03 & !md04 & !md05 & !md06 & !n_t_61x & !n_t_62x) # (!f_r_low.Q & cc_s_g.Q & !cc_unit.Q & !data00.PIN & !data01.PIN & data02.PIN & !io_pause & !md03 & !md04 & !md05 & !md06 & !n_t_61x & !n_t_62x)); XXL_382 = ((f_r_low.Q & cc_s_g.Q & cc_unit.Q & io_pause) # (f_r_low.Q & cc_s_g.Q & cc_unit.Q & md03) # (f_r_low.Q & cc_s_g.Q & cc_unit.Q & md04) # (f_r_low.Q & cc_s_g.Q & cc_unit.Q & md05) # (f_r_low.Q & cc_s_g.Q & cc_unit.Q & data00.PIN & data01.PIN & data02.PIN)); XXL_383 = ((f_r_low.Q & cc_s_g.Q & cc_unit.Q & n_t_61x) # (f_r_low.Q & cc_s_g.Q & cc_unit.Q & n_t_62x) # (!f_r_low.Q & !cc_s_g.Q & !cc_unit.Q & !md06 & !n_t_61x & !n_t_62x & !data00.PIN & !data01.PIN & !data02.PIN & !io_pause & !md03 & !md04 & !md05) # (!f_r_low.Q & !cc_s_g.Q & cc_unit.Q & !md06 & !n_t_61x & !n_t_62x & data00.PIN & !data01.PIN & !data02.PIN & !io_pause & !md03 & !md04 & !md05) # (f_r_low.Q & cc_s_g.Q & cc_unit.Q & md06)); !XXL_384 = (!XXL_381 & !XXL_382 & !XXL_383); XXL_385 = ((cc_dtp & cc_r_w.Q & !io_pause & !md03 & !md04 & !md05 & !md06 & !md09 & !md10 & !n_t_61x & !n_t_62x & n_t_101x.Q & sync.Q) # (cc_dtp & cc_r_w.Q & cc_t_m_en & !tpg0.Q & !io_pause & !md03 & !md04 & !md05 & !md06 & !md09 & !n_t_61x & !n_t_62x & !md11) # (cc_dtp & cc_r_w.Q & !io_pause & !md03 & !md04 & !md05 & !md06 & !md09 & !n_t_61x & !n_t_62x & n_t_101x.Q & sync.Q & !md11) # (cc_dtp & !cc_r_w.Q & cc_t_m_en & tpg0.Q & n_t_36x.Q) # (cc_dtp & cc_r_w.Q & cc_t_m_en & !tpg0.Q & !io_pause & !md03 & !md04 & !md05 & !md06 & !md09 & !md10 & !n_t_61x & !n_t_62x)); XXL_386 = ((cc_dtp & !cc_r_w.Q & cc_t_m_en & tpg0.Q & !io_pause & !md03 & !md04 & !md05 & !md06 & !md09 & !md10 & !n_t_61x & !n_t_62x) # (cc_dtp & !cc_r_w.Q & n_t_101x.Q & !sync.Q & !io_pause & !md03 & !md04 & !md05 & !md06 & !md09 & !md10 & !n_t_61x & !n_t_62x) # (cc_dtp & !cc_r_w.Q & cc_t_m_en & tpg0.Q & !io_pause & !md03 & !md04 & !md05 & !md06 & !md09 & !n_t_61x & !n_t_62x & !md11) # (cc_dtp & !cc_r_w.Q & n_t_101x.Q & !sync.Q & !io_pause & !md03 & !md04 & !md05 & !md06 & !md09 & !n_t_61x & !n_t_62x & !md11) # (cc_dtp & !cc_r_w.Q & n_t_36x.Q & n_t_101x.Q & !sync.Q)); XXL_387 = ((!sr03.Q & md04) # (!sr03.Q & md05) # (!sr03.Q & md06) # (!sr03.Q & md09) # (!sr03.Q & md03)); XXL_388 = ((!sr03.Q & n_t_61x) # (!sr03.Q & n_t_62x) # (!sr03.Q & !md10) # (!md11 & !n_t_61x & !n_t_62x & md10 & !io_pause & !md03 & !md04 & !md05 & !md06 & !md09 & data00.PIN & !sr00.Q) # (!sr03.Q & md11)); XXL_389 = ((!sr04.Q & md04) # (!sr04.Q & md05) # (!sr04.Q & md06) # (!sr04.Q & md09) # (!sr04.Q & md03)); XXL_390 = ((!sr04.Q & n_t_61x) # (!sr04.Q & n_t_62x) # (!sr04.Q & !md10) # (!md11 & !n_t_61x & !n_t_62x & md10 & !io_pause & !md03 & !md04 & !md05 & !md06 & !md09 & data01.PIN & !sr01.Q) # (!sr04.Q & md11)); XXL_391 = ((!sr05.Q & md04) # (!sr05.Q & md05) # (!sr05.Q & md06) # (!sr05.Q & md09) # (!sr05.Q & md03)); XXL_392 = ((!sr05.Q & n_t_61x) # (!sr05.Q & n_t_62x) # (!sr05.Q & !md10) # (!md11 & !n_t_61x & !n_t_62x & md10 & !io_pause & !md03 & !md04 & !md05 & !md06 & !md09 & data02.PIN & !sr02.Q) # (!sr05.Q & md11)); XXL_393 = ((!sr06.Q & md04) # (!sr06.Q & md05) # (!sr06.Q & md06) # (!sr06.Q & md09) # (!sr06.Q & md03)); XXL_394 = ((!sr06.Q & n_t_61x) # (!sr06.Q & n_t_62x) # (!sr06.Q & !md10) # (!md11 & !n_t_61x & !n_t_62x & md10 & !io_pause & !md03 & !md04 & !md05 & !md06 & !md09 & data03.PIN & !sr03.Q) # (!sr06.Q & md11)); XXL_395 = ((!sr07.Q & md04) # (!sr07.Q & md05) # (!sr07.Q & md06) # (!sr07.Q & md09) # (!sr07.Q & md03)); XXL_396 = ((!sr07.Q & n_t_61x) # (!sr07.Q & n_t_62x) # (!sr07.Q & !md10) # (!md11 & !n_t_61x & !n_t_62x & md10 & !io_pause & !md03 & !md04 & !md05 & !md06 & !md09 & data04.PIN & !sr04.Q) # (!sr07.Q & md11)); XXL_397 = ((!sr08.Q & md04) # (!sr08.Q & md05) # (!sr08.Q & md06) # (!sr08.Q & md09) # (!sr08.Q & md03)); XXL_398 = ((!sr08.Q & n_t_61x) # (!sr08.Q & n_t_62x) # (!sr08.Q & !md10) # (!md11 & !n_t_61x & !n_t_62x & md10 & !io_pause & !md03 & !md04 & !md05 & !md06 & !md09 & data05.PIN & !sr05.Q) # (!sr08.Q & md11)); XXL_399 = ((!sr09.Q & md04) # (!sr09.Q & md05) # (!sr09.Q & md06) # (!sr09.Q & md09) # (!sr09.Q & md03)); XXL_400 = ((!sr09.Q & n_t_61x) # (!sr09.Q & n_t_62x) # (!sr09.Q & !md10) # (!md11 & !n_t_61x & !n_t_62x & md10 & !io_pause & !md03 & !md04 & !md05 & !md06 & !md09 & data06.PIN & !sr06.Q) # (!sr09.Q & md11)); XXL_401 = ((!sr10.Q & md04) # (!sr10.Q & md05) # (!sr10.Q & md06) # (!sr10.Q & md09) # (!sr10.Q & md03)); XXL_402 = ((!sr10.Q & n_t_61x) # (!sr10.Q & n_t_62x) # (!sr10.Q & !md10) # (!md11 & !n_t_61x & !n_t_62x & md10 & !io_pause & !md03 & !md04 & !md05 & !md06 & !md09 & data07.PIN & !sr07.Q) # (!sr10.Q & md11)); XXL_403 = ((!sr11.Q & md04) # (!sr11.Q & md05) # (!sr11.Q & md06) # (!sr11.Q & md09) # (!sr11.Q & md03)); XXL_404 = ((!sr11.Q & n_t_61x) # (!sr11.Q & n_t_62x) # (!sr11.Q & !md10) # (!md11 & !n_t_61x & !n_t_62x & md10 & !io_pause & !md03 & !md04 & !md05 & !md06 & !md09 & data08.PIN & !sr08.Q) # (!sr11.Q & md11)); XXL_405 = ((!rd00 & md04) # (!rd00 & md05) # (!rd00 & md06) # (!rd00 & md09) # (!rd00 & md03)); XXL_406 = ((!rd00 & n_t_61x) # (!rd00 & n_t_62x) # (!rd00 & !md10) # (!md11 & !n_t_61x & !n_t_62x & md10 & !io_pause & !md03 & !md04 & !md05 & !md06 & !md09 & data09.PIN & !sr09.Q) # (!rd00 & md11)); XXL_407 = ((!rd01 & md04) # (!rd01 & md05) # (!rd01 & md06) # (!rd01 & md09) # (!rd01 & md03)); XXL_408 = ((!rd01 & n_t_61x) # (!rd01 & n_t_62x) # (!rd01 & !md10) # (!md11 & !n_t_61x & !n_t_62x & md10 & !io_pause & !md03 & !md04 & !md05 & !md06 & !md09 & data10.PIN & !sr10.Q) # (!rd01 & md11)); XXL_409 = ((!rd02 & md04) # (!rd02 & md05) # (!rd02 & md06) # (!rd02 & md09) # (!rd02 & md03)); XXL_410 = ((!rd02 & n_t_61x) # (!rd02 & n_t_62x) # (!rd02 & !md10) # (!md11 & !n_t_61x & !n_t_62x & md10 & !io_pause & !md03 & !md04 & !md05 & !md06 & !md09 & data11.PIN & !sr11.Q) # (!rd02 & md11)); c1.OE = !c1.PIN; c0.OE = !c0.PIN; f_r_low.C = (!io_pause & !md03 & !md04 & !md05 & !md06 & !md09 & md10 & md11 & !n_t_61x & !n_t_62x & tp3); f_r_low.AR = initialize; f_r_low.OE = !f_r_low.PIN; cc_r_w.C = (!io_pause & !md03 & !md04 & !md05 & !md06 & !md09 & md10 & md11 & !n_t_61x & !n_t_62x & tp3); !cc_r_w.AR = ((!io_pause & !md03 & !md04 & !md05 & !md06 & !md09 & md10 & md11 & !n_t_61x & !n_t_62x) # (df_sel_er_low & !df_time_er.Q & !initialize & !n_t_53x & power_ok_low & !run)); cc_s_g.C = (!io_pause & !md03 & !md04 & !md05 & !md06 & !md09 & md10 & md11 & !n_t_61x & !n_t_62x & tp3); cc_s_g.AR = FB_380; cc_setdly_low.C = (!io_pause & !md03 & !md04 & !md05 & !md06 & !md09 & md10 & md11 & !n_t_61x & !n_t_62x & tp3); cc_setdly_low.AR = !n_t_92x; cc_setdly_low.AP = FB_379; cc_tpg1.C = cc_tpg_clk; cc_tpg1.AR = !n_t_17x; cc_tpg1.AP = !n_t_17x; cc_unit.C = (!io_pause & !md03 & !md04 & !md05 & !md06 & !md09 & md10 & md11 & !n_t_61x & !n_t_62x & tp3); cc_unit.AR = initialize; data00.OE = !data00.PIN; con_all_halt.OE = !con_all_halt.PIN; data01.OE = !data01.PIN; data02.OE = !data02.PIN; data03.OE = !data03.PIN; data04.OE = !data04.PIN; data05.OE = !data05.PIN; data06.OE = !data06.PIN; data07.OE = !data07.PIN; data08.OE = !data08.PIN; data09.OE = !data09.PIN; data10.OE = !data10.PIN; data11.OE = !data11.PIN; df_comp_wd.C = 0; df_comp_wd.AR = ((cc_dtp & cc_t_m_en & tpg0.Q) # (cc_dtp & n_t_101x.Q & !sync.Q)); df_comp_wd.AP = Com_Ctrl_377; df_time_er.C = 0; df_time_er.AR = ((!io_pause & !md03 & !md04 & !md05 & !md06 & !md09 & md10 & md11 & !n_t_61x & !n_t_62x & tp3) # initialize); df_time_er.AP = ((cc_dtp & cc_r_w.Q & n_t_36x.Q & n_t_101x.Q & sync.Q) # XXL_385 # XXL_386 # (cc_dtp & cc_r_w.Q & n_t_36x.Q & cc_t_m_en & !tpg0.Q)); gdollar_0.C = 0; gdollar_0.AR = ((cc_dtp & !sr02.Q & n_t_101x.Q & sync.Q) # (cc_dtp & !sr02.Q & cc_t_m_en & !tpg0.Q)); gdollar_0.AP = ((cc_dtp & sr02.Q & n_t_101x.Q & sync.Q) # (cc_dtp & sr02.Q & cc_t_m_en & !tpg0.Q)); gdollar_1.C = 0; gdollar_1.AP = Com_Ctrl_377; gdollar_2.C = 0; gdollar_2.AR = ((cc_dtp & !sr00.Q & n_t_101x.Q & sync.Q) # (cc_dtp & !sr00.Q & cc_t_m_en & !tpg0.Q)); gdollar_2.AP = ((cc_dtp & sr00.Q & n_t_101x.Q & sync.Q) # (cc_dtp & sr00.Q & cc_t_m_en & !tpg0.Q)); gdollar_3.C = 0; gdollar_3.AR = ((cc_dtp & !sr01.Q & n_t_101x.Q & sync.Q) # (cc_dtp & !sr01.Q & cc_t_m_en & !tpg0.Q)); gdollar_3.AP = ((cc_dtp & sr01.Q & n_t_101x.Q & sync.Q) # (cc_dtp & sr01.Q & cc_t_m_en & !tpg0.Q)); gdollar_4.C = Com_Ctrl_375; gdollar_5.C = Com_Ctrl_375; gdollar_6.C = Com_Ctrl_374; gdollar_6.AR = !Com_Ctrl_376; gdollar_7.C = gdollar_6.Q; gdollar_7.AR = !Com_Ctrl_376; int_rqst_low_PIN.OE = !int_rqst_low_PIN.PIN; internal_io.OE = !internal_io.PIN; mtr0_low.C = Com_Ctrl_375; mtr1_low.C = Com_Ctrl_375; mtr2_low.C = Com_Ctrl_375; mtr3_low.C = Com_Ctrl_375; mtr4_low.C = Com_Ctrl_375; mtr5_low.C = Com_Ctrl_375; n_t_101x.C = n_t_80x; n_t_101x.AR = !cc_uts.Q; n_t_101x.AP = !n_t_17x; n_t_20x.C = 0; n_t_20x.AR = FB_378; n_t_20x.AP = !cc_s_g.Q; n_t_25x.C = Com_Ctrl_374; n_t_25x.AR = !Com_Ctrl_376; n_t_36x.C = gdollar_7.Q; n_t_36x.AR = !Com_Ctrl_376; n_t_86x.C = 0; n_t_86x.AR = ((cc_dtp & cc_t_m_en & !tpg0.Q) # (cc_dtp & n_t_101x.Q & sync.Q)); n_t_86x.AP = !cc_r_w.Q; nd0.OE = !nd0.PIN; nd1.OE = !nd1.PIN; s_g_low.OE = !s_g_low.PIN; nd2.OE = !nd2.PIN; skip_low.OE = !skip_low.PIN; sr00.C = !Com_Ctrl_373; sr01.C = !Com_Ctrl_373; sr02.C = !Com_Ctrl_373; sr03.C = !Com_Ctrl_373; sr04.C = !Com_Ctrl_373; sr05.C = !Com_Ctrl_373; sr06.C = !Com_Ctrl_373; sr07.C = !Com_Ctrl_373; sr08.C = !Com_Ctrl_373; sr09.C = !Com_Ctrl_373; sr10.C = !Com_Ctrl_373; sr11.C = !Com_Ctrl_373; sync.C = n_t_80x; sync.AR = !n_t_17x; sync.AP = !n_t_17x; t_m_enable.OE = !t_m_enable.PIN; tpg0.C = cc_tpg_clk; tpg0.AR = !n_t_17x; tpg0.AP = !n_t_17x; unith.OE = !unith.PIN; wd_enab.OE = !wd_enab.PIN; wpt.OE = !wpt.PIN; cc_uts.C = n_t_96x; cc_uts.AR = !cc_setdly_low.Q; cc_uts.AP = cc_t_m_en; PQFP100 Pin/Node Placement: ------------------------------------ Pin 1 = data11; /* MC 6 */ Pin 2 = data10; /* MC 5 */ Pin 3 = data09; /* MC 3 */ Pin 4 = data08; /* MC 1 */ Pin 6 = TDI; /* MC 32 */ Pin 7 = md11; /* MC 30 */ Pin 8 = md10; /* MC 29 */ Pin 9 = md09; /* MC 27 */ Pin 10 = md08; /* MC 25 */ Pin 11 = skip_low; /* MC 24 */ Pin 12 = initialize; /* MC 22 */ Pin 14 = int_rqst_low; /* MC 21 */ Pin 15 = cc_setdly; /* MC 19 */ Pin 16 = n_t_65x; /* MC 17 */ Pin 17 = TMS; /* MC 48 */ Pin 18 = internal_io; /* MC 46 */ Pin 19 = tp4; /* MC 45 */ Pin 21 = tp3; /* MC 43 */ Pin 22 = c1; /* MC 41 */ Pin 23 = c0; /* MC 40 */ Pin 24 = io_pause; /* MC 38 */ Pin 25 = power_ok_low; /* MC 37 */ Pin 26 = data07; /* MC 35 */ Pin 27 = run; /* MC 33 */ Pin 29 = data06; /* MC 64 */ Pin 30 = data05; /* MC 62 */ Pin 31 = data04; /* MC 61 */ Pin 32 = md07; /* MC 59 */ Pin 33 = md06; /* MC 57 */ Pin 34 = md05; /* MC 56 */ Pin 35 = md04; /* MC 54 */ Pin 37 = data03; /* MC 53 */ Pin 38 = data02; /* MC 51 */ Pin 39 = data01; /* MC 49 */ Pin 42 = data00; /* MC 65 */ Pin 44 = md03; /* MC 69 */ Pin 46 = n_t_61x; /* MC 70 */ Pin 47 = cc_dtp; /* MC 72 */ Pin 48 = n_t_62x; /* MC 73 */ Pin 51 = n_t_67x; /* MC 78 */ Pin 52 = cc_tt_en; /* MC 80 */ Pin 57 = cc_t_m_en; /* MC 86 */ Pin 64 = TCK; /* MC 96 */ Pin 70 = rd00; /* MC 104 */ Pin 71 = rmt; /* MC 105 */ Pin 72 = rtt_low; /* MC 107 */ Pin 73 = rd01; /* MC 109 */ Pin 74 = df_sel_er_low; /* MC 110 */ Pin 75 = TDO; /* MC 112 */ Pin 77 = n_t_53x; /* MC 113 */ Pin 78 = rd02; /* MC 115 */ Pin 79 = nd2; /* MC 117 */ Pin 80 = wd_enab; /* MC 118 */ Pin 81 = wpt; /* MC 120 */ Pin 82 = nd1; /* MC 121 */ Pin 83 = nd0; /* MC 123 */ Pin 85 = n_t_92x; /* MC 125 */ Pin 87 = n_t_96x; /* MC 128 */ Pin 89 = cc_tpg_clk; Pin 91 = n_t_80x; Pin 92 = n_t_17x; Pin 95 = s_g_low; /* MC 14 */ Pin 96 = unith; /* MC 13 */ Pin 98 = t_m_enable; /* MC 11 */ Pin 99 = con_all_halt; /* MC 9 */ Pin 100 = f_r_low; /* MC 8 */ PINNODE 322 = FB_378; /* MC 22 Foldback */ PINNODE 329 = FB_380; /* MC 29 Foldback */ PINNODE 341 = XXL_384; /* MC 41 Foldback */ PINNODE 346 = FB_379; /* MC 46 Foldback */ PINNODE 618 = int_rqst_low_PIN; /* MC 18 Feedback */ PINNODE 620 = df_time_er.AR; /* MC 20 Feedback */ PINNODE 622 = n_t_20x; /* MC 22 Feedback */ PINNODE 623 = Com_Ctrl_375; /* MC 23 Feedback */ PINNODE 625 = cc_uts; /* MC 25 Feedback */ PINNODE 626 = Com_Ctrl_376; /* MC 26 Feedback */ PINNODE 627 = Com_Ctrl_373; /* MC 27 Feedback */ PINNODE 628 = cc_unit; /* MC 28 Feedback */ PINNODE 629 = cc_s_g; /* MC 29 Feedback */ PINNODE 630 = cc_r_w.AR; /* MC 30 Feedback */ PINNODE 631 = XXL_385; /* MC 31 Feedback */ PINNODE 632 = XXL_386; /* MC 32 Feedback */ PINNODE 633 = cc_r_w; /* MC 33 Feedback */ PINNODE 634 = cc_setdly_low; /* MC 34 Feedback */ PINNODE 636 = XXL_391; /* MC 36 Feedback */ PINNODE 637 = XXL_403; /* MC 37 Feedback */ PINNODE 638 = XXL_389; /* MC 38 Feedback */ PINNODE 639 = XXL_397; /* MC 39 Feedback */ PINNODE 642 = XXL_395; /* MC 42 Feedback */ PINNODE 643 = XXL_401; /* MC 43 Feedback */ PINNODE 644 = XXL_404; /* MC 44 Feedback */ PINNODE 645 = XXL_396; /* MC 45 Feedback */ PINNODE 647 = XXL_392; /* MC 47 Feedback */ PINNODE 648 = XXL_402; /* MC 48 Feedback */ PINNODE 650 = XXL_393; /* MC 50 Feedback */ PINNODE 652 = XXL_387; /* MC 52 Feedback */ PINNODE 654 = XXL_382; /* MC 54 Feedback */ PINNODE 655 = XXL_381; /* MC 55 Feedback */ PINNODE 656 = XXL_383; /* MC 56 Feedback */ PINNODE 657 = XXL_388; /* MC 57 Feedback */ PINNODE 658 = XXL_400; /* MC 58 Feedback */ PINNODE 659 = XXL_398; /* MC 59 Feedback */ PINNODE 660 = XXL_390; /* MC 60 Feedback */ PINNODE 663 = XXL_394; /* MC 63 Feedback */ PINNODE 666 = gdollar_0.AP; /* MC 66 Feedback */ PINNODE 667 = gdollar_3.AR; /* MC 67 Feedback */ PINNODE 668 = gdollar_2.AR; /* MC 68 Feedback */ PINNODE 669 = gdollar_2.AP; /* MC 69 Feedback */ PINNODE 670 = XXL_409; /* MC 70 Feedback */ PINNODE 671 = XXL_399; /* MC 71 Feedback */ PINNODE 672 = XXL_407; /* MC 72 Feedback */ PINNODE 673 = XXL_405; /* MC 73 Feedback */ PINNODE 674 = XXL_408; /* MC 74 Feedback */ PINNODE 675 = gdollar_0.AR; /* MC 75 Feedback */ PINNODE 676 = XXL_406; /* MC 76 Feedback */ PINNODE 677 = gdollar_3.AP; /* MC 77 Feedback */ PINNODE 679 = XXL_410; /* MC 79 Feedback */ PINNODE 682 = sync; /* MC 82 Feedback */ PINNODE 684 = sr08; /* MC 84 Feedback */ PINNODE 685 = Com_Ctrl_377; /* MC 85 Feedback */ PINNODE 686 = sr03; /* MC 86 Feedback */ PINNODE 687 = sr00; /* MC 87 Feedback */ PINNODE 688 = sr01; /* MC 88 Feedback */ PINNODE 689 = n_t_86x.AR; /* MC 89 Feedback */ PINNODE 690 = sr02; /* MC 90 Feedback */ PINNODE 691 = df_comp_wd.AR; /* MC 91 Feedback */ PINNODE 692 = Com_Ctrl_374; /* MC 92 Feedback */ PINNODE 693 = cc_tpg1; /* MC 93 Feedback */ PINNODE 694 = sr04; /* MC 94 Feedback */ PINNODE 695 = sr06; /* MC 95 Feedback */ PINNODE 696 = df_time_er.AP; /* MC 96 Feedback */ PINNODE 697 = mtr5_low; /* MC 97 Feedback */ PINNODE 698 = mtr3_low; /* MC 98 Feedback */ PINNODE 699 = mtr4_low; /* MC 99 Feedback */ PINNODE 700 = mtr0_low; /* MC 100 Feedback */ PINNODE 701 = gdollar_5; /* MC 101 Feedback */ PINNODE 702 = sr11; /* MC 102 Feedback */ PINNODE 703 = mtr2_low; /* MC 103 Feedback */ PINNODE 704 = sr09; /* MC 104 Feedback */ PINNODE 705 = n_t_86x; /* MC 105 Feedback */ PINNODE 706 = tpg0; /* MC 106 Feedback */ PINNODE 707 = mtr1_low; /* MC 107 Feedback */ PINNODE 708 = n_t_101x; /* MC 108 Feedback */ PINNODE 709 = gdollar_4; /* MC 109 Feedback */ PINNODE 710 = sr05; /* MC 110 Feedback */ PINNODE 711 = sr10; /* MC 111 Feedback */ PINNODE 712 = sr07; /* MC 112 Feedback */ PINNODE 713 = gdollar_1; /* MC 113 Feedback */ PINNODE 714 = n_t_36x; /* MC 114 Feedback */ PINNODE 715 = n_t_25x; /* MC 115 Feedback */ PINNODE 716 = gdollar_7; /* MC 116 Feedback */ PINNODE 719 = gdollar_6; /* MC 119 Feedback */ PINNODE 722 = gdollar_3; /* MC 122 Feedback */ PINNODE 724 = gdollar_2; /* MC 124 Feedback */ PINNODE 725 = gdollar_0; /* MC 125 Feedback */ PINNODE 727 = df_comp_wd; /* MC 127 Feedback */ PINNODE 728 = df_time_er; /* MC 128 Feedback */ ** Resource Usage ** DCERP Field = Summary of Allocations. ||||| |||||_Preset [p,-] == p = PT preset, - No Preset. |||| ||||__Reset [g,r,-] == g= Global AR, r = PT reset, - No reset. ||| |||___Clock Enable [e,-] == e = Product Term, - always enabled, - none. || ||____Clock [c,g,-], == c = Product term, g = Global term, - No Clock. | |_____Type [C,D,L,T], == Register type C= combin, D=dff, L=latch, T=tff. For input only = INPUT. MCell Pin# Oe PinDrive DCERP FBDrive DCERP Foldback CascadeOut TotPT output_slew MC1 4 PT data08 C---- -- -- -- 3 slow MC2 0 -- -- -- -- 0 slow MC3 3 PT data09 C---- -- -- -- 3 slow MC4 0 -- -- -- -- 0 slow MC5 2 PT data10 C---- -- -- -- 3 slow MC6 1 PT data11 C---- -- -- -- 3 slow MC7 0 -- -- -- -- 0 slow MC8 100 PT f_r_low Dc-r- -- -- -- 4 slow MC9 99 PT con_all_halt C---- -- -- -- 2 slow MC10 0 -- -- -- -- 0 slow MC11 98 PT t_m_enable C---- -- -- -- 2 slow MC12 0 -- -- -- -- 0 slow MC13 96 PT unith C---- -- -- -- 2 slow MC14 95 PT s_g_low C---- -- -- -- 2 slow MC15 0 -- -- -- -- 0 slow MC16 94 -- -- -- -- 0 slow MC17 16 on n_t_65x C---- -- -- -- 1 slow MC18 0 PT -- int_rqst_low_PIN C---- -- -- 1 slow MC19 15 on cc_setdly C---- -- -- -- 1 slow MC20 0 -- df_time_er.AR C---- -- -- 2 slow MC21 14 on int_rqst_low C---- -- -- -- 1 slow MC22 12 -- initialize INPUT n_t_20x D--rp FB_378 -- 3 slow MC23 0 -- Com_Ctrl_375 C---- -- -- 3 slow MC24 11 PT skip_low C---- -- -- -- 4 slow MC25 10 -- md08 INPUT cc_uts Dg-rp -- -- 3 slow MC26 0 -- Com_Ctrl_376 C---- -- -- 3 slow MC27 9 -- md09 INPUT Com_Ctrl_373 C---- -- -- 3 slow MC28 0 -- cc_unit Dc-r- -- -- 3 slow MC29 8 -- md10 INPUT cc_s_g Dc-r- FB_380 -- 4 slow MC30 7 -- md11 INPUT cc_r_w.AR C---- -- -- 2 slow MC31 0 -- XXL_385 C---- NA -- 5 slow MC32 6 -- TDI INPUT XXL_386 C---- NA -- 5 slow MC33 27 -- run INPUT cc_r_w Dc-r- -- -- 3 slow MC34 0 -- cc_setdly_low Dc-rp -- -- 4 slow MC35 26 PT data07 C---- -- -- -- 3 slow MC36 0 -- XXL_391 C---- NA -- 5 slow MC37 25 -- power_ok_low INPUT XXL_403 C---- NA -- 5 slow MC38 24 -- io_pause INPUT XXL_389 C---- NA -- 5 slow MC39 0 -- XXL_397 C---- NA -- 5 slow MC40 23 PT c0 C---- -- -- -- 3 slow MC41 22 PT c1 C---- -- XXL_384 -- 3 slow MC42 0 -- XXL_395 C---- NA -- 5 slow MC43 21 -- tp3 INPUT XXL_401 C---- NA -- 5 slow MC44 0 -- XXL_404 C---- NA -- 5 slow MC45 19 -- tp4 INPUT XXL_396 C---- NA -- 5 slow MC46 18 PT internal_io C---- -- FB_379 -- 3 slow MC47 0 -- XXL_392 C---- NA -- 5 slow MC48 17 -- TMS INPUT XXL_402 C---- NA -- 5 slow MC49 39 PT data01 C---- -- -- -- 3 slow MC50 0 -- XXL_393 C---- NA -- 5 slow MC51 38 PT data02 C---- -- -- -- 3 slow MC52 0 -- XXL_387 C---- NA -- 5 slow MC53 37 PT data03 C---- -- -- -- 3 slow MC54 35 -- md04 INPUT XXL_382 C---- NA -- 5 slow MC55 0 -- XXL_381 C---- NA -- 5 slow MC56 34 -- md05 INPUT XXL_383 C---- NA -- 5 slow MC57 33 -- md06 INPUT XXL_388 C---- NA -- 5 slow MC58 0 -- XXL_400 C---- NA -- 5 slow MC59 32 -- md07 INPUT XXL_398 C---- NA -- 5 slow MC60 0 -- XXL_390 C---- NA -- 5 slow MC61 31 PT data04 C---- -- -- -- 3 slow MC62 30 PT data05 C---- -- -- -- 3 slow MC63 0 -- XXL_394 C---- NA -- 5 slow MC64 29 PT data06 C---- -- -- -- 3 slow MC65 42 PT data00 C---- -- -- -- 3 slow MC66 0 -- gdollar_0.AP C---- -- -- 2 slow MC67 43 -- gdollar_3.AR C---- -- -- 2 slow MC68 0 -- gdollar_2.AR C---- -- -- 2 slow MC69 44 -- md03 INPUT gdollar_2.AP C---- -- -- 2 slow MC70 46 -- n_t_61x INPUT XXL_409 C---- NA -- 5 slow MC71 0 -- XXL_399 C---- NA -- 5 slow MC72 47 -- cc_dtp INPUT XXL_407 C---- NA -- 5 slow MC73 48 -- n_t_62x INPUT XXL_405 C---- NA -- 5 slow MC74 0 -- XXL_408 C---- NA -- 5 slow MC75 49 -- gdollar_0.AR C---- -- -- 2 slow MC76 0 -- XXL_406 C---- NA -- 5 slow MC77 50 -- gdollar_3.AP C---- -- -- 2 slow MC78 51 on n_t_67x C---- -- -- -- 1 slow MC79 0 -- XXL_410 C---- NA -- 5 slow MC80 52 on cc_tt_en C---- -- -- -- 4 slow MC81 54 -- -- -- -- 0 slow MC82 0 -- sync Dc-rp -- -- 4 slow MC83 55 -- -- -- -- 0 slow MC84 0 -- sr08 Dc--- -- -- 4 slow MC85 56 -- Com_Ctrl_377 C---- -- -- 2 slow MC86 57 -- cc_t_m_en INPUT sr03 Dc--- -- -- 4 slow MC87 0 -- sr00 Dc--- -- -- 4 slow MC88 58 -- sr01 Dc--- -- -- 4 slow MC89 59 -- n_t_86x.AR C---- -- -- 2 slow MC90 0 -- sr02 Dc--- -- -- 4 slow MC91 60 -- df_comp_wd.AR C---- -- -- 2 slow MC92 0 -- Com_Ctrl_374 C---- -- -- 2 slow MC93 62 -- cc_tpg1 Dg-rp -- -- 3 slow MC94 63 -- sr04 Dc--- -- -- 4 slow MC95 0 -- sr06 Dc--- -- -- 4 slow MC96 64 -- TCK INPUT df_time_er.AP C---- -- -- 4 slow MC97 65 -- mtr5_low Dc--- -- -- 2 slow MC98 0 -- mtr3_low Dc--- -- -- 2 slow MC99 66 -- mtr4_low Dc--- -- -- 2 slow MC100 0 -- mtr0_low Dc--- -- -- 2 slow MC101 67 -- gdollar_5 Dc--- -- -- 2 slow MC102 69 -- sr11 Dc--- -- -- 4 slow MC103 0 -- mtr2_low Dc--- -- -- 2 slow MC104 70 -- rd00 INPUT sr09 Dc--- -- -- 4 slow MC105 71 -- rmt INPUT n_t_86x D--rp -- -- 2 slow MC106 0 -- tpg0 Dg-rp -- -- 3 slow MC107 72 -- rtt_low INPUT mtr1_low Dc--- -- -- 2 slow MC108 0 -- n_t_101x Dc-rp -- -- 4 slow MC109 73 -- rd01 INPUT gdollar_4 Dc--- -- -- 2 slow MC110 74 -- df_sel_er_low INPUT sr05 Dc--- -- -- 4 slow MC111 0 -- sr10 Dc--- -- -- 4 slow MC112 75 -- TDO INPUT sr07 Dc--- -- -- 4 slow MC113 77 -- n_t_53x INPUT gdollar_1 D---p -- -- 1 slow MC114 0 -- n_t_36x Tc-r- -- -- 2 slow MC115 78 -- rd02 INPUT n_t_25x Tc-r- -- -- 2 slow MC116 0 -- gdollar_7 Tc-r- -- -- 2 slow MC117 79 PT nd2 C---- -- -- -- 3 slow MC118 80 PT wd_enab C---- -- -- -- 2 slow MC119 0 -- gdollar_6 Tc-r- -- -- 2 slow MC120 81 PT wpt C---- -- -- -- 2 slow MC121 82 PT nd1 C---- -- -- -- 3 slow MC122 0 -- gdollar_3 D--rp -- -- 2 slow MC123 83 PT nd0 C---- -- -- -- 3 slow MC124 0 -- gdollar_2 D--rp -- -- 2 slow MC125 85 -- n_t_92x INPUT gdollar_0 D--rp -- -- 2 slow MC126 86 -- -- -- -- 0 slow MC127 0 -- df_comp_wd D--rp -- -- 2 slow MC128 87 -- n_t_96x INPUT df_time_er D--rp -- -- 2 slow MC0 92 n_t_17x INPUT -- -- -- 0 slow MC0 91 n_t_80x INPUT -- -- -- 0 slow MC0 90 -- -- -- -- 0 slow MC0 89 cc_tpg_clk INPUT -- -- -- 0 slow Logic Array Block Logic Cells I/O Pins Foldbacks TotalPT FanIN Cascades A: LC1 - LC16 9/16(56%) 9/16(56%) 0/16(0%) 24/80(30%) (38) 0 B: LC17 - LC32 16/16(100%) 10/16(62%) 2/16(12%) 44/80(55%) (34) 0 C: LC33 - LC48 16/16(100%) 10/16(62%) 2/16(12%) 69/80(86%) (34) 0 D: LC49 - LC64 16/16(100%) 10/16(62%) 0/16(0%) 68/80(85%) (33) 0 E: LC65 - LC80 16/16(100%) 7/16(43%) 0/16(0%) 55/80(68%) (33) 0 F: LC81 - LC96 14/16(87%) 2/16(12%) 0/16(0%) 47/80(58%) (34) 0 G: LC97 - LC112 16/16(100%) 6/16(37%) 0/16(0%) 45/80(56%) (33) 0 H: LC113- LC128 15/16(93%) 9/16(56%) 0/16(0%) 32/80(40%) (27) 0 Total dedicated input used: 3/4 (75%) Total I/O pins used 63/80 (78%) Total Logic cells used 118/128 (92%) Total Flip-Flop used 42/128 (32%) Total Foldback logic used 4/128 (3%) Total Nodes+FB/MCells 122/128 (95%) Total cascade used 0 Total input pins 35 Total output pins 31 Total Pts 384 Creating pla file C:\CYGWIN\HOME\VINCE\TTL2PLD\M868\M868.tt3 with 0 inputs 0 outputs, 0 pins 0 nodes and 0 pterms... ---------------- End fitter, Design FITS $Device PQFP100 fits FIT1508 completed in 0.00 seconds