VRS PDP-8/i RAM Memory PDP-8/i RAM Memory VRS VCC Fill <b>MOUNTING HOLE</b> 4.3 mm with drill center <b>RESISTOR</b><p> type 0207, grid 10 mm >NAME >VALUE <b>CAPACITOR</b><p> grid 5 mm, outline 2.5 x 7.5 mm >NAME >VALUE <b>ELECTROLYTIC CAPACITOR</b><p> grid 22.86 mm, diameter 6 mm >NAME >VALUE <b>PIN HEADER</b> 1 >NAME >VALUE 34 <b>Dual In Line Package</b> >NAME >VALUE <b>Dual In Line Package</b> >NAME >VALUE <b>JUMPER</b> 1 2 3 >NAME >VALUE <B>DIODE</B><p> diameter 2 mm, horizontal, grid 10.16 mm >NAME >VALUE <b>THROUGH-HOLE PAD</b> >NAME >VALUE <b>THROUGH-HOLE PAD</b> >NAME >VALUE <b>Dual In Line Package</b> 0.6 inch >NAME >VALUE <b>Dual In Line Package</b> >NAME >VALUE DEC Edge Connectors and Parts <b>JUMPER</b> 1 2 >NAME >VALUE <b>Dual In Line Package</b> >NAME >VALUE <b>TTL Devices, 74xx Series with US Symbols</b><p> Based on the following sources: <ul> <li>Texas Instruments <i>TTL Data Book</i>&nbsp;&nbsp;&nbsp;Volume 1, 1996. <li>TTL Data Book, Volume 2 , 1993 <li>National Seminconductor Databook 1990, ALS/LS Logic <li>ttl 74er digital data dictionary, ECA Electronic + Acustic GmbH, ISBN 3-88109-032-0 <li>http://icmaster.com/ViewCompare.asp </ul> <author>Created by librarian@cadsoft.de</author> <b>Dual In Line Package</b> >NAME >VALUE <b>Dual In Line Package</b> >NAME >VALUE <b>EAGLE Design Rules</b> <p> The default Design Rules have been set to cover a wide range of applications. Your particular design may have different requirements, so please make the necessary adjustments and save your customized design rules under a new name.