PARITY CIRCUIT M162A DEC FLIP CHIP Single-Height DEC board Single-Height DEC edge connector V1 U1 T1 S1 R1 P1 N1 M1 L1 K1 J1 H1 F1 E1 D1 C1 B1 A1 V2 U2 T2 S2 R2 P2 N2 M2 L2 K2 J2 H2 F2 E2 D2 C2 B2 A2 <b>Dual In Line Package</b> >NAME >VALUE A 0.6" electrolytic with smaller pads. >NAME >VALUE <b>CAPACITOR</b><p> grid 7.5 mm, outline 3.2 x 10.3 mm >NAME >VALUE <b>TTL Devices, 74xx Series with US Symbols</b><p> Based on the following sources: <ul> <li>Texas Instruments <i>TTL Data Book</i>&nbsp;&nbsp;&nbsp;Volume 1, 1996. <li>TTL Data Book, Volume 2 , 1993 <li>National Seminconductor Databook 1990, ALS/LS Logic <li>ttl 74er digital data dictionary, ECA Electronic + Acustic GmbH, ISBN 3-88109-032-0 <li>http://icmaster.com/ViewCompare.asp </ul> <author>Created by librarian@cadsoft.de</author> <b>Dual In Line Package</b> >NAME >VALUE <b>EAGLE Design Rules</b> <p> The default Design Rules have been set to cover a wide range of applications. Your particular design may have different requirements, so please make the necessary adjustments and save your customized design rules under a new name.