/* This file is generated by topld.pl!! */ /* Please don't edit it. */ Name M221D ; PartNo cpld ; Date 6/13/2022 ; Revision 01 ; Designer ; Company ; Assembly None ; Location E1 ; Device f1508isptqfp100; $DEFINE OPTIMIZE $UNDEF OPTIMIZE /* Input Pins */ pin = adder1; pin = adder4; pin = carry_in; pin = data_add; pin = data_add_2; pin = data_add_3; pin = enable_ac; pin = enable_ac_l; pin = enable_ac_r; pin = enable_bcl; pin = enable_bse; pin = enable_ma2; pin = enable_ma3; pin = enable_mb2; pin = enable_mb3; pin = enable_mem; pin = enable_mq; pin = enable_pc; pin = enable_rsw; pin = load_ac; pin = load_ma; pin = load_mb; pin = load_pc; pin = ls_msc2; pin = ls_msc3; pin = lsw; pin = lsw2; pin = lsw3; pin = mem2; pin = mem3; pin = mq2; pin = mq3; pin = no_rot; pin = rot_left; pin = rot_right; pin = rs_msc2; pin = rs_msc3; pin = rsw2; pin = rsw3; /* Output Pins */ pin = a=b; pin = adder2; pin = adder3; pin = addr_match; pin = carry_ok_l; pin = carry_out_2; pin = ma2_h; pin = ma2_l; pin = ma3_h; pin = ma3_l; pin = n_t_11x; pin = n_t_12x; pin = n_t_13x; pin = n_t_14x; pin = n_t_15x; pin = n_t_16x; pin = n_t_17x; pin = n_t_18x; pin = pc2_l; pin = pc3_l; pin = ps_2; pin = ps_3; pin = ps_left_2; pin = ps_left_3; pin = reg_bus2; pin = reg_bus3; node ac3_h; node ac2_h; node mb3_h; node mb2_h; node pc3_h; node pc2_h; /* Internal nodes */ $IFNDEF OPTIMIZE node ac2_l; node ac3_l; node mb2_l; node mb3_l; node n_t_10x; node n_t_19x; node n_t_1x; node n_t_20x; node n_t_2x; node n_t_5x; node n_t_6x; node n_t_9x; $ENDIF /* Code nodes */ /* Equations */ /* c1: c_us */ /* c2: c_us */ /* c3: c_us */ /* c4: c_us */ /* c5: c_us */ /* c6: c_us */ /* c7: c_us */ /* c8: c_us */ /* c9: c_us */ /* c10: c_us */ /* c11: c_us */ /* c12: c_us */ /* c13: c_us */ /* c14: c_us */ /* c15: c_us */ /* c16: c_us */ /* c17: c_us */ /* c18: c_us */ /* c19: c_us */ /* c20: c_us */ /* c21: c_us */ /* e1: sn7453 */ /* n_t_3x = !(ac2_h & enable_ac_r # rs_msc2 # rsw2 & enable_rsw # enable_pc & pc2_h); */ /* n_t_4x = !n_t_3x; */ ps_2 = n_t_3x; /* e2: sn7453 */ /* gdollar_0 = !(rot_right & adder1 # rot_left & adder3 # no_rot & adder2 # n_t_9x & lsw); */ /* gdollar_1 = !gdollar_0; */ reg_bus2 = gdollar_0; /* e3: sn7453 */ /* gdollar_2 = !(lsw2 & ma2_l # lsw3 & ma3_l # n_t_10x & ma3_h # n_t_9x & ma2_h); */ /* gdollar_3 = !gdollar_2; */ addr_match = gdollar_2; /* e4: sn7453 */ /* n_t_3x = !(data_add_2 & data_add # mb2_h & enable_mb2 # ma2_h & enable_ma2 # enable_mem & mem2); */ /* n_t_4x = !n_t_3x; */ ps_2 = n_t_3x; /* e5: sn7482 */ adder3 = carry_in $ ps_left_3 $ ps_3; gdollar_4 = carry_in & ps_left_3 # ps_left_3 & ps_3 # carry_in & ps_3; adder2 = ps_2 $ ps_left_2 $ gdollar_4; carry_out_2 = gdollar_4 & ps_2 # ps_2 & ps_left_2 # ps_left_2 & gdollar_4; /* e6: sn7453 */ /* gdollar_5 = !(adder2 & rot_right # adder4 & rot_left # lsw & n_t_10x # no_rot & adder3); */ /* gdollar_6 = !gdollar_5; */ reg_bus3 = gdollar_5; /* e7: sn7453 */ /* n_t_6x = !(enable_mq & mq2 # ls_msc2 # enable_ac_l & ac2_h # enable_ac & ac2_l); */ /* n_t_5x = !n_t_6x; */ ps_left_2 = n_t_6x; /* e8: sn7474 */ ac3_h.d = reg_bus3; ac3_h.ck = load_ac; ac3_l = !ac3_h; ac2_h.d = reg_bus2; ac2_h.ck = load_ac; ac2_l = !ac2_h; /* e9: sn7400 */ n_t_19x = !ps_2; n_t_20x = !ps_3; n_t_10x = !lsw3; n_t_9x = !lsw2; /* e10: sn7460 */ /* n_t_6x = !(mb2_l & enable_bcl & enable_bcl & ac2_h); */ /* n_t_5x = !n_t_6x; */ /* n_t_1x = !(enable_bcl & mb3_l & ac3_h); */ /* n_t_2x = !n_t_1x; */ /* e11: sn7474 */ mb3_h.d = reg_bus3; mb3_h.ck = load_mb; mb3_l = !mb3_h; mb2_h.d = reg_bus2; mb2_h.ck = load_mb; mb2_l = !mb2_h; /* e12: sn7453 */ /* gdollar_7 = !(ac3_l & ps_3 # ac2_h & n_t_19x # ac2_l & ps_2 # n_t_20x & ac3_h); */ /* gdollar_8 = !gdollar_7; */ carry_ok_l = gdollar_7; /* e13: sn7460 */ /* n_t_6x = !(mb2_h & enable_bse & enable_bse & ac2_l); */ /* n_t_5x = !n_t_6x; */ /* n_t_1x = !(enable_bse & ac3_l & mb3_h); */ /* n_t_2x = !n_t_1x; */ /* e14: sn7474 */ pc3_h.d = reg_bus3; pc3_h.ck = load_pc; pc3_l = !pc3_h; pc2_h.d = reg_bus2; pc2_h.ck = load_pc; pc2_l = !pc2_h; /* e15: sn7453 */ /* gdollar_9 = !(ac3_l & mb3_h # ac2_h & mb2_l # ac2_l & mb2_h # mb3_l & ac3_h); */ /* gdollar_10 = !gdollar_9; */ a=b = gdollar_9; /* e16: sn7453 */ /* n_t_1x = !(enable_mq & mq3 # ls_msc3 # enable_ac_l & ac3_h # enable_ac & ac3_l); */ /* n_t_2x = !n_t_1x; */ ps_left_3 = n_t_1x; /* e17: sn7474 */ ma3_h.d = reg_bus3; ma3_h.ck = load_ma; ma3_l = !ma3_h; ma2_h.d = reg_bus2; ma2_h.ck = load_ma; ma2_l = !ma2_h; /* e18: sn74h00 */ n_t_13x = !ac3_l; n_t_12x = !ac2_h; n_t_14x = !ac3_h; n_t_11x = !ac2_l; /* e19: sn7453 */ /* n_t_8x = !(data_add_3 & data_add # mb3_h & enable_mb3 # ma3_h & enable_ma3 # enable_mem & mem3); */ /* n_t_7x = !n_t_8x; */ ps_3 = n_t_8x; /* e20: sn7453 */ /* n_t_8x = !(ac3_h & enable_ac_r # rs_msc3 # rsw3 & enable_rsw # enable_pc & pc3_h); */ /* n_t_7x = !n_t_8x; */ ps_3 = n_t_8x; /* e21: sn74h00 */ n_t_18x = !mb3_h; n_t_17x = !mb3_l; n_t_15x = !mb2_l; n_t_16x = !mb2_h; /* r1: r_us_ */ /* r2: r_us_ */ /* r3: r_us_ */ /* r4: r_us_ */ /* r5: r_us_ */ /* r6: r_us_ */ /* r7: r_us_ */ /* r8: r_us_ */ /* r9: r_us_ */ /* r10: r_us_ */ /* r11: r_us_ */ /* r12: r_us_ */ /* r13: r_us_ */ /* r14: r_us_ */ /* Open collector 'wire-or's */ !gdollar_0 = (rot_right & adder1 # rot_left & adder3 # no_rot & adder2 # n_t_9x & lsw); !gdollar_1 = gdollar_0; !gdollar_10 = gdollar_9; !gdollar_2 = (lsw2 & ma2_l # lsw3 & ma3_l # n_t_10x & ma3_h # n_t_9x & ma2_h); !gdollar_3 = gdollar_2; !gdollar_5 = (adder2 & rot_right # adder4 & rot_left # lsw & n_t_10x # no_rot & adder3); !gdollar_6 = gdollar_5; !gdollar_7 = (ac3_l & ps_3 # ac2_h & n_t_19x # ac2_l & ps_2 # n_t_20x & ac3_h); !gdollar_8 = gdollar_7; !gdollar_9 = (ac3_l & mb3_h # ac2_h & mb2_l # ac2_l & mb2_h # mb3_l & ac3_h); !n_t_1x = (enable_bcl & mb3_l & ac3_h) # (enable_bse & ac3_l & mb3_h) # (enable_mq & mq3 # ls_msc3 # enable_ac_l & ac3_h # enable_ac & ac3_l); !n_t_2x = (n_t_1x) # (n_t_1x) # (n_t_1x); !n_t_3x = (ac2_h & enable_ac_r # rs_msc2 # rsw2 & enable_rsw # enable_pc & pc2_h) # (data_add_2 & data_add # mb2_h & enable_mb2 # ma2_h & enable_ma2 # enable_mem & mem2); !n_t_4x = (n_t_3x) # (n_t_3x); !n_t_5x = (n_t_6x) # (n_t_6x) # (n_t_6x); !n_t_6x = (enable_mq & mq2 # ls_msc2 # enable_ac_l & ac2_h # enable_ac & ac2_l) # (mb2_l & enable_bcl & enable_bcl & ac2_h) # (mb2_h & enable_bse & enable_bse & ac2_l); !n_t_7x = (n_t_8x) # (n_t_8x); !n_t_8x = (data_add_3 & data_add # mb3_h & enable_mb3 # ma3_h & enable_ma3 # enable_mem & mem3) # (ac3_h & enable_ac_r # rs_msc3 # rsw3 & enable_rsw # enable_pc & pc3_h);