Pinlist Exported from M707X.sch at 12/15/2018 2:37:01 PM EAGLE Version 6.6.0 Copyright (c) 1988-2014 CadSoft Part Pad Pin Dir Net C1 1 1 pas VCC 2 2 pas GND C2 1 1 pas VCC 2 2 pas GND C3 1 1 pas VCC 2 2 pas GND C4 1 1 pas VCC 2 2 pas GND C5 1 1 pas VCC 2 2 pas GND C6 1 1 pas VCC 2 2 pas GND C7 1 1 pas VCC 2 2 pas GND C8 1 1 pas VCC 2 2 pas GND C9 1 1 pas VCC 2 2 pas GND C10 1 1 pas VCC 2 2 pas GND C11 1 1 pas VCC 2 2 pas GND C12 1 1 pas VCC 2 2 pas GND C13 1 1 pas VCC 2 2 pas GND C14 1 1 pas VCC 2 2 pas GND C15 1 1 pas VCC 2 2 pas GND C16 1 1 pas VCC 2 2 pas GND C17 1 1 pas VCC 2 2 pas GND C18 1 1 pas VCC 2 2 pas GND C19 1 1 pas N$1 2 2 pas N$2 C20 1 1 pas VCC 2 2 pas GND C21 + + pas VCC - - pas GND C23 1 1 pas VCC 2 2 pas GND D1 A A pas N$22 C C pas GND D2 A A pas N$23 C C pas N$22 E1 1 I0 in N$17 2 I1 in AE1 3 I2 in N$15 4 I3 in AF1 5 I4 in N$13 6 I5 in N$12 7 GND pwr GND 8 O out N$9 11 I6 in +3V 12 I7 in +3V 14 VCC pwr VCC E2 1 CLR in N$4 2 D in BIT1 3 CLK in N$5 4 PRE in ACTIVE 5 Q out LINE 6 !Q out *** unconnected *** 7 GND pwr GND 8 !Q out *** unconnected *** 9 Q out BIT1 10 PRE in N$54 11 CLK in N$5 12 D in BIT2 13 CLR in !IOCLR 14 VCC pwr VCC E3 1 I0 in ECHO 2 I1 in LINE 3 O out TX 4 I0 in GND 5 I1 in GND 6 O out *** unconnected *** 7 GND pwr GND 8 O out N$39 9 I0 in N$38 10 I1 in N$460 11 O out N$460 12 I0 in N$6 13 I1 in N$6 14 VCC pwr VCC E4 1 I0 in ENABLE 2 I1 in N$19 3 O out N$20 4 I0 in N$9 5 I1 in ENABLE_DS 6 O out SELECTED 7 GND pwr GND 8 O out AR1 9 I0 in SELECTED 10 I1 in LOAD_BUFFER 11 O out N$19 12 I0 in AR1 13 I1 in AR1 14 VCC pwr VCC E5 1 I0 in AC06 2 I1 in N$19 3 O out N$53 4 I0 in N$19 5 I1 in AC07 6 O out N$381 7 GND pwr GND 8 O out N$378 9 I0 in AC05 10 I1 in N$19 11 O out N$3 12 I0 in N$19 13 I1 in AC04 14 VCC pwr VCC E6 1 CLR in !IOCLR 2 D in BIT9 3 CLK in N$5 4 PRE in N$3 5 Q out BIT8 6 !Q out N$7 7 GND pwr GND 8 !Q out AL1 9 Q out BIT9 10 PRE in N$20 11 CLK in N$5 12 D in GND 13 CLR in !IOCLR 14 VCC pwr VCC E7 1 I0 in N$19 2 I1 in AC10 3 O out N$37 4 I0 in N$19 5 I1 in AC11 6 O out N$54 7 GND pwr GND 8 O out N$42 9 I0 in AC08 10 I1 in N$19 11 O out N$52 12 I0 in N$19 13 I1 in AC09 14 VCC pwr VCC E8 1 CLR in !IOCLR 2 D in BIT7 3 CLK in N$5 4 PRE in N$53 5 Q out BIT6 6 !Q out N$142 7 GND pwr GND 8 !Q out N$152 9 Q out BIT7 10 PRE in N$378 11 CLK in N$5 12 D in BIT8 13 CLR in !IOCLR 14 VCC pwr VCC E9 1 I0 in N$142 2 I1 in N$152 3 I2 in N$153 4 I3 in N$49 5 I4 in N$36 6 I5 in N$18 7 GND pwr GND 8 O out N$6 11 I6 in AH1 12 I7 in N$7 14 VCC pwr VCC E10 1 I0 in N$38 2 I1 in N$38 4 I2 in N$38 5 I3 in N$38 6 O out N$5 7 GND pwr GND 8 O out !IOCLR 9 I0 in +3V 10 I1 in +3V 12 I2 in +3V 13 I3 in IOCLR 14 VCC pwr VCC E11 1 CLR in !IOCLR 2 D in BIT5 3 CLK in N$5 4 PRE in N$42 5 Q out BIT4 6 !Q out N$49 7 GND pwr GND 8 !Q out N$153 9 Q out BIT5 10 PRE in N$381 11 CLK in N$5 12 D in BIT6 13 CLR in !IOCLR 14 VCC pwr VCC E12 1 I0 in N$35 2 I1 in N$35 3 O out N$167 4 I0 in N$2 5 I1 in N$2 6 O out N$4 7 GND pwr GND 8 O out N$1 9 I0 in !ACTIVE 10 I1 in !ACTIVE 11 O out N$28 12 I0 in N$10 13 I1 in N$62 14 VCC pwr VCC E13 1 I0 in CLR_FLAG1 2 I1 in +3V 3 I0 in N$132 4 I1 in CLR_FLAG2 5 I2 in !IOCLR 6 O out N$35 7 GND pwr GND 8 O out SKIP 9 I0 in SKP_STROBE 10 I1 in !FLAG 11 I2 in SELECTED 12 O out N$132 13 I2 in SELECTED 14 VCC pwr VCC E14 1 CLR in +3V 2 D in N$161 3 CLK in 2XCLK 4 PRE in N$5 5 Q out N$166 6 !Q out N$63 7 GND pwr GND 8 !Q out N$38 9 Q out N$16 10 PRE in !IOCLR 11 CLK in 2XCLK 12 D in N$11 13 CLR in +3V 14 VCC pwr VCC E15 1 CLR in !IOCLR 2 D in BIT3 3 CLK in N$5 4 PRE in N$37 5 Q out BIT2 6 !Q out N$18 7 GND pwr GND 8 !Q out N$36 9 Q out BIT3 10 PRE in N$52 11 CLK in N$5 12 D in BIT4 13 CLR in !IOCLR 14 VCC pwr VCC E16 1 CLR in !IOCLR 2 D in N$28 3 CLK in 2XCLK 4 PRE in +3V 5 Q out ACTIVE 6 !Q out !ACTIVE 7 GND pwr GND 8 !Q out !FLAG 9 Q out IRQ 10 PRE in N$167 11 CLK in N$5 12 D in N$6 13 CLR in +3V 14 VCC pwr VCC E17 1 CLR in +3V 2 D in N$138 3 CLK in 2XCLK 4 PRE in N$5 5 Q out *** unconnected *** 6 !Q out BN1 7 GND pwr GND 8 !Q out BP1 9 Q out N$138 10 PRE in N$5 11 CLK in 2XCLK 12 D in N$166 13 CLR in +3V 14 VCC pwr VCC E18 1 I0 in N$39 2 I1 in ACTIVE 3 O out N$10 4 I0 in ACTIVE 5 I1 in N$16 6 O out N$11 7 GND pwr GND 8 O out N$161 9 I0 in !WAIT 10 I1 in !ACTIVE 11 O out N$62 12 I0 in STOP 13 I1 in SIZE 14 VCC pwr VCC Q1 1 E pas N$27 2 B pas N$24 3 C pas VCC Q2 1 E pas N$27 2 B pas N$30 3 C pas N$26 Q3 1 E pas VCC 2 B pas N$26 3 C pas N$8 R1 1 1 pas GND 2 2 pas +3V R2 1 1 pas +3V 2 2 pas VCC R3 1 1 pas N$1 2 2 pas VCC R4 1 1 pas GND 2 2 pas N$2 R5 1 1 pas N$24 2 2 pas TX R6 1 1 pas GND 2 2 pas N$27 R7 1 1 pas N$26 2 2 pas VCC R8 1 1 pas VCC 2 2 pas N$30 R9 1 1 pas N$8 2 2 pas SERIAL_OUT R10 1 1 pas ECHO 2 2 pas GND R11 1 1 pas ECHO 2 2 pas VCC R12 1 1 pas N$23 2 2 pas N$30 U$2 AA1 1 io *** unused *** AA2 1 io VCC AB1 1 io ECHO AB2 1 io *** unused *** AC1 1 io *** unused *** AC2 1 io GND AD1 1 io ACTIVE AD2 1 io LINE AE1 1 io AE1 AE2 1 io N$17 AF1 1 io AF1 AF2 1 io N$15 AH1 1 io AH1 AH2 1 io N$13 AJ1 1 io BIT6 AJ2 1 io N$12 AK1 1 io SIZE AK2 1 io BIT9 AL1 1 io AL1 AL2 1 io AC06 AM1 1 io *** unused *** AM2 1 io AC07 AN1 1 io ENABLE_DS AN2 1 io ENABLE AP1 1 io *** unused *** AP2 1 io AC04 AR1 1 io AR1 AR2 1 io AC05 AS1 1 io LOAD_BUFFER AS2 1 io AC09 AT1 1 io GND AT2 1 io AC10 AU1 1 io AC11 AU2 1 io AC08 AV1 1 io *** unused *** AV2 1 io SERIAL_OUT BA1 1 io *** unused *** BA2 1 io VCC BB1 1 io *** unused *** BB2 1 io *** unused *** BC1 1 io *** unused *** BC2 1 io GND BD1 1 io *** unused *** BD2 1 io CLR_FLAG1 BE1 1 io *** unused *** BE2 1 io IOCLR BF1 1 io *** unused *** BF2 1 io CLR_FLAG2 BH1 1 io *** unused *** BH2 1 io SKP_STROBE BJ1 1 io +3V BJ2 1 io SKIP BK1 1 io *** unused *** BK2 1 io IRQ BL1 1 io *** unused *** BL2 1 io *** unused *** BM1 1 io *** unused *** BM2 1 io *** unused *** BN1 1 io BN1 BN2 1 io STOP BP1 1 io BP1 BP2 1 io 2XCLK BR1 1 io *** unused *** BR2 1 io N$63 BS1 1 io *** unused *** BS2 1 io !WAIT BT1 1 io GND BT2 1 io *** unused *** BU1 1 io *** unused *** BU2 1 io *** unused *** BV1 1 io *** unused *** BV2 1 io *** unused ***