Pinlist Exported from M8340E.sch at 9/29/2019 6:02:51 PM EAGLE Version 6.6.0 Copyright (c) 1988-2014 CadSoft Part Pad Pin Dir Net C1 1 1 pas VCC 2 2 pas GND C2 1 1 pas VCC 2 2 pas GND C3 1 1 pas VCC 2 2 pas GND C4 1 1 pas VCC 2 2 pas GND C6 1 1 pas VCC 2 2 pas GND C7 1 1 pas VCC 2 2 pas GND C8 1 1 pas VCC 2 2 pas GND C9 1 1 pas VCC 2 2 pas GND C10 1 1 pas VCC 2 2 pas GND C11 1 1 pas VCC 2 2 pas GND C12 1 1 pas VCC 2 2 pas GND C14 1 1 pas VCC 2 2 pas GND C15 1 1 pas VCC 2 2 pas GND C16 1 1 pas VCC 2 2 pas GND C17 1 1 pas VCC 2 2 pas GND C18 1 1 pas VCC 2 2 pas GND C19 1 1 pas VCC 2 2 pas GND C20 1 1 pas VCC 2 2 pas GND C21 1 1 pas VCC 2 2 pas GND C22 1 1 pas VCC 2 2 pas GND C23 1 1 pas VCC 2 2 pas GND C24 1 1 pas VCC 2 2 pas GND C25 1 1 pas VCC 2 2 pas GND C26 1 1 pas VCC 2 2 pas GND C27 1 1 pas VCC 2 2 pas GND C28 1 1 pas VCC 2 2 pas GND C29 1 1 pas VCC 2 2 pas GND C30 1 1 pas VCC 2 2 pas GND C31 1 1 pas VCC 2 2 pas GND C32 1 1 pas VCC 2 2 pas GND C33 1 1 pas VCC 2 2 pas GND C34 1 1 pas VCC 2 2 pas GND C35 + + pas VCC - - pas GND C36 + + pas VCC - - pas GND C37 + + pas VCC - - pas GND E1 1 O oc 0_TO_EIR 2 I0 in N$52 3 I1 in N$29 4 O oc 0_TO_EIR 5 I0 in !FETCH 6 I1 in N$28 7 GND pwr GND 8 I0 in EX1 9 I1 in !E 10 O oc FE_SET 11 I0 in N$26 12 I1 in MODEB 13 O oc C0 14 VCC pwr VCC E2 1 I in N$6 2 O out EAE_INST 3 I in BFETCH 4 O out !FETCH 5 I in !E 6 O out BE 7 GND pwr GND 8 O out MODEB 9 I in MODEA 10 O out N$23 11 I in SWAB 12 O out N$22 13 I in SWBA 14 VCC pwr VCC E3 1 I0 in SWAB 2 I1 in SWBA 3 NC pas *** unused *** 4 I2 in N$24 5 I3 in EAE_INST 6 O out N$25 7 GND pwr GND 8 O out N$21 9 I0 in EAE_INST 10 I1 in !FETCH 11 NC pas *** unused *** 12 I2 in SWBA 13 I3 in SWAB 14 VCC pwr VCC E4 1 CLK in *** unused *** 2 PRE in *** unused *** 3 CLR in *** unused *** 4 J in *** unused *** 5 VCC pwr VCC 6 CLK in N$27 7 PRE in +3V0 8 CLR in !INIT 9 J in N$23 10 !Q out MODEA 11 Q out *** unconnected *** 12 K in N$22 13 GND pwr GND 14 !Q out *** unused *** 15 Q out *** unused *** 16 K in *** unused *** E6 1 CLR in +3V0 2 D in MD0 3 CLK in LD_EIR 4 PRE in 0_TO_EIR 5 Q out *** unconnected *** 6 !Q out N$1 7 GND pwr GND 8 !Q out N$2 9 Q out *** unconnected *** 10 PRE in 0_TO_EIR 11 CLK in LD_EIR 12 D in MD1 13 CLR in +3V0 14 VCC pwr VCC E7 1 I0 in +3V0 2 I1 in N$1 3 I2 in N$2 4 I3 in N$4 5 I4 in N$5 6 I5 in N$7 7 GND pwr GND 8 O out N$6 11 I6 in +3V0 12 I7 in +3V0 14 VCC pwr VCC E8 1 O out EXEC_MULTIPLY 2 I0 in ROM_12_L 3 I1 in EXEC_DIVIDE 4 O out EXEC_DIVIDE 5 I0 in ROM_12_L 6 I1 in ROM_14_L 7 GND pwr GND 8 I0 in !TP3 9 I1 in ROM_23_L 10 O out 0_TO_SC 11 I0 in *** unused *** 12 I1 in *** unused *** 13 O out *** unused *** 14 VCC pwr VCC E9 1 O oc N$44 2 I0 in DATA_TO_SC 3 I1 in N$45 4 O oc DATA7 5 I0 in SC_TO_DATA 6 I1 in N$38 7 GND pwr GND 8 I0 in *** unused *** 9 I1 in *** unused *** 10 O oc *** unused *** 11 I0 in N$43 12 I1 in N$43 13 O oc N$44 14 VCC pwr VCC E10 1 CLR in +3V0 2 D in MD2 3 CLK in LD_EIR 4 PRE in 0_TO_EIR 5 Q out *** unconnected *** 6 !Q out N$4 7 GND pwr GND 8 !Q out N$5 9 Q out *** unconnected *** 10 PRE in 0_TO_EIR 11 CLK in LD_EIR 12 D in MD3 13 CLR in +3V0 14 VCC pwr VCC E11 1 O1 oc ROM_11_L 2 O2 oc ROM_12_L 3 O3 oc ROM_13_L 4 O4 oc ROM_14_L 5 O5 oc ROM_15_L 6 O6 oc !ADLK_DIS 7 O7 oc ROM_17_L 8 GND pwr GND 9 O8 oc ROM_19_L 10 A0 in EIR3 11 A1 in EIR2 12 A2 in N$16 13 A3 in DAD+DST 14 A4 in N$21 15 !CE in N$25 16 VCC pwr VCC E12 1 I0 in *** unused *** 2 I1 in *** unused *** 3 I0 in *** unused *** 4 I1 in *** unused *** 5 I2 in *** unused *** 6 O out *** unused *** 7 GND pwr GND 8 O out LD_EIR 9 I0 in TP2 10 I1 in !FETCH 11 I2 in !FETCH 12 O out *** unused *** 13 I2 in *** unused *** 14 VCC pwr VCC E14 1 CLR in +3V0 2 D in MD4 3 CLK in LD_EIR 4 PRE in 0_TO_EIR 5 Q out N$3 6 !Q out *** unconnected *** 7 GND pwr GND 8 !Q out *** unconnected *** 9 Q out N$8 10 PRE in 0_TO_EIR 11 CLK in LD_EIR 12 D in MD5 13 CLR in +3V0 14 VCC pwr VCC E15 1 I0 in N$3 2 I1 in N$8 3 I2 in N$9 4 I3 in N$10 5 I4 in N$11 6 I5 in EIR2 7 GND pwr GND 8 O out SWBA 11 I6 in EIR3 12 I7 in +3V0 14 VCC pwr VCC E16 1 I in N$39 2 O out N$47 3 I in TP2_D 4 O out N$55 5 I in N$51 6 O out N$52 7 GND pwr GND 8 O out !DAD+DST 9 I in DAD+DST 10 O out DATA_TO_SC 11 I in ROM_21_L 12 O out DIV_12_L 13 I in N$20 14 VCC pwr VCC E17 1 GND pwr GND 2 O out N$29 3 O out N$45 4 I0 in GND 5 I1 in DATA7 6 I0 in GND 7 I1 in INT_IN_PROG 8 VCC pwr VCC 9 I0 in TP4 10 I1 in GND 11 I0 in GND 12 I1 in MA_MS_LC 13 O out N$41 14 O out N$50 E18 1 CLR in +3V0 2 D in MD6 3 CLK in LD_EIR 4 PRE in 0_TO_EIR 5 Q out N$14 6 !Q out N$9 7 GND pwr GND 8 !Q out N$15 9 Q out N$10 10 PRE in 0_TO_EIR 11 CLK in LD_EIR 12 D in MD7 13 CLR in +3V0 14 VCC pwr VCC E19 1 O1 oc ROM_21_L 2 O2 oc ROM_22_L 3 O3 oc ROM_23_L 4 O4 oc ROM_24_L 5 O5 oc ROM_25_L 6 O6 oc ROM_26_L 7 O7 oc FD_SET 8 GND pwr GND 9 O8 oc FE_SET 10 A0 in EIR3 11 A1 in EIR2 12 A2 in N$16 13 A3 in N$9 14 A4 in MODEA 15 !CE in N$21 16 VCC pwr VCC E20 1 GND pwr GND 2 O out *** unused *** 3 O out *** unused *** 4 I0 in *** unused *** 5 I1 in *** unused *** 6 I0 in *** unused *** 7 I1 in *** unused *** 8 VCC pwr VCC 9 I0 in INIT 10 I1 in GND 11 I0 in !DAD+DST 12 I1 in DEFER 13 O out N$53 14 O out !INIT E21 1 GND pwr GND 2 O out *** unused *** 3 O out *** unused *** 4 I0 in *** unused *** 5 I1 in *** unused *** 6 I0 in *** unused *** 7 I1 in *** unused *** 8 VCC pwr VCC 9 I0 in TP1 10 I1 in GND 11 I0 in FETCH 12 I1 in GND 13 O out BFETCH 14 O out N$28 E22 1 CLR in +3V 2 D in MD8 3 CLK in LD_EIR 4 PRE in 0_TO_EIR 5 Q out N$11 6 !Q out N$16 7 GND pwr GND 8 !Q out EIR2 9 Q out N$17 10 PRE in 0_TO_EIR 11 CLK in LD_EIR 12 D in MD9 13 CLR in +3V 14 VCC pwr VCC E23 1 I0 in N$3 2 I1 in N$8 3 I2 in N$14 4 I3 in N$15 5 I4 in N$16 6 I5 in N$17 7 GND pwr GND 8 O out SWAB 11 I6 in N$18 12 I7 in +3V 14 VCC pwr VCC E24 1 I0 in *** unused *** 2 I1 in *** unused *** 3 I0 in N$47 4 I1 in N$48 5 I2 in N$49 6 O out !SC_0 7 GND pwr GND 8 O out *** unused *** 9 I0 in *** unused *** 10 I1 in *** unused *** 11 I2 in *** unused *** 12 O out *** unused *** 13 I2 in *** unused *** 14 VCC pwr VCC E25 1 GND pwr GND 2 O out !TP3 3 O out N$43 4 I0 in DATA_TO_SC 5 I1 in MD7 6 I0 in TP3 7 I1 in GND 8 VCC pwr VCC 9 I0 in E 10 I1 in GND 11 I0 in TS3 12 I1 in ROM_25_L 13 O out SC_TO_DATA 14 O out !E E26 1 CLR in +3V 2 D in MD10 3 CLK in LD_EIR 4 PRE in 0_TO_EIR 5 Q out N$18 6 !Q out EIR3 7 GND pwr GND 8 !Q out N$7 9 Q out *** unconnected *** 10 PRE in 0_TO_EIR 11 CLK in LD_EIR 12 D in MD11 13 CLR in +3V 14 VCC pwr VCC E27 1 I0 in ROM_26_L 2 I1 in !EX1 3 O out NEXT_LOC 4 I0 in BE 5 I1 in BFETCH 6 O out N$24 7 GND pwr GND 8 O out N$51 9 I0 in N$50 10 I1 in N$41 11 O out *** unused *** 12 I0 in *** unused *** 13 I1 in *** unused *** 14 VCC pwr VCC E28 1 I0 in EAE_INST 2 I1 in EAE_INST 3 I0 in N$42 4 I1 in N$39 5 I2 in N$40 6 O out N$20 7 GND pwr GND 8 O out DAD+DST 9 I0 in N$9 10 I1 in MODEB 11 I2 in EAE_INST 12 O out N$27 13 I2 in LD_EIR 14 VCC pwr VCC E29 1 GND pwr GND 2 O out BMD10 3 O out BMD11 4 I0 in GND 5 I1 in MD11 6 I0 in GND 7 I1 in MD10 8 VCC pwr VCC 9 I0 in MD8 10 I1 in GND 11 I0 in MD9 12 I1 in GND 13 O out BMD9 14 O out BMD8 E30 1 CLR in +3V 2 D in ROM_21_L 3 CLK in TP2_D 4 PRE in !TP3 5 Q out *** unconnected *** 6 !Q out N$26 7 GND pwr GND 8 !Q out !EX1 9 Q out EX1 10 PRE in +3V 11 CLK in N$52 12 D in N$53 13 CLR in BFETCH 14 VCC pwr VCC E31 1 O out N$49 2 I0 in N$38 3 I1 in N$19 4 O out N$48 5 I0 in N$42 6 I1 in N$40 7 GND pwr GND 8 I0 in N$54 9 I1 in N$26 10 O out !SC_LOAD 11 I0 in ROM_19_L 12 I1 in N$55 13 O out N$54 14 VCC pwr VCC E32 1 GND pwr GND 2 O out N$31 3 O out N$30 4 I0 in GND 5 I1 in DATA8 6 I0 in GND 7 I1 in DATA9 8 VCC pwr VCC 9 I0 in DATA11 10 I1 in GND 11 I0 in DATA10 12 I1 in GND 13 O out N$32 14 O out N$33 E33 1 I0 in N$38 2 I1 in N$19 3 I0 in N$19 4 I1 in EXEC_DIVIDE 5 I2 in N$42 6 O oc LAST_STEP_L 7 GND pwr GND 8 O oc LAST_STEP_L 9 I0 in EXEC_MULTIPLY 10 I1 in N$49 11 I2 in N$20 12 O oc LAST_STEP_L 13 I2 in N$20 14 VCC pwr VCC E34 1 B in GND 2 QB out *** unconnected *** 3 QA out N$38 4 DN in +3V 5 UP in N$46 6 QC out *** unconnected *** 7 QD out *** unconnected *** 8 GND pwr GND 9 D in GND 10 C in GND 11 LD in !SC_LOAD 12 CO out *** unconnected *** 13 BO out *** unconnected *** 14 CLR in 0_TO_SC 15 A in N$44 16 VCC pwr VCC E35 1 O oc DATA11 2 I0 in N$39 3 I1 in SC_TO_DATA 4 O oc DATA10 5 I0 in N$40 6 I1 in SC_TO_DATA 7 GND pwr GND 8 I0 in SC_TO_DATA 9 I1 in N$42 10 O oc DATA8 11 I0 in SC_TO_DATA 12 I1 in N$19 13 O oc DATA9 14 VCC pwr VCC E36 1 A0 in N$30 2 B0 in BMD8 3 F0 out N$37 4 F1 out N$36 5 B1 in BMD9 6 A1 in N$31 7 S1 in GND 8 GND pwr GND 9 S0 in DATA_TO_SC 10 A2 in N$32 11 B2 in BMD10 12 F2 out N$35 13 F3 out N$34 14 B3 in BMD11 15 A3 in N$33 16 VCC pwr VCC E37 1 B in N$35 2 QB out N$40 3 QA out N$39 4 DN in +3V 5 UP in INCR_SC 6 QC out N$19 7 QD out N$42 8 GND pwr GND 9 D in N$37 10 C in N$36 11 LD in !SC_LOAD 12 CO out N$46 13 BO out *** unconnected *** 14 CLR in 0_TO_SC 15 A in N$34 16 VCC pwr VCC H A1 P pas GTF+IND A2 P pas MODEB B1 P pas ROM_14_L B2 P pas ROM_12_L C1 P pas LAST_STEP_L C2 P pas ROM_17_L D1 P pas CLOCK D2 P pas ROM_11_L E1 P pas !DAD+DST E2 P pas ROM_15_L F1 P pas !SGT F2 P pas TP2_D H1 P pas DAD+DST H2 P pas RESTART J1 P pas ROM_22_L J2 P pas GND K1 P pas INCR_SC K2 P pas GND L1 P pas ROM_13_L L2 P pas GND M1 P pas ROM_24_L M2 P pas GND N1 P pas DIV_12_L N2 P pas GND P1 P pas NEXT_LOC P2 P pas GND R1 P pas MODEB R2 P pas GND S1 P pas EIR3 S2 P pas GND T1 P pas RTF T2 P pas EIR2 U1 P pas !SC_0 U2 P pas FD_SET V1 P pas FE_SET V2 P pas !ADLK_DIS J A1 P pas *** unused *** A2 P pas *** unused *** B1 P pas *** unused *** B2 P pas *** unused *** C1 P pas GND C2 P pas GND D1 P pas RTF D2 P pas *** unused *** E1 P pas GND E2 P pas GND F1 P pas !SGT F2 P pas *** unused *** H1 P pas GND H2 P pas GND J1 P pas *** unused *** J2 P pas *** unused *** K1 P pas *** unused *** K2 P pas *** unused *** L1 P pas *** unused *** L2 P pas *** unused *** M1 P pas *** unused *** M2 P pas *** unused *** N1 P pas *** unused *** N2 P pas *** unused *** P1 P pas *** unused *** P2 P pas *** unused *** R1 P pas GND R2 P pas GND S1 P pas GTF+IND S2 P pas *** unused *** T1 P pas GND T2 P pas GND U1 P pas CLOCK U2 P pas *** unused *** V1 P pas GND V2 P pas RESTART R1 1 1 pas 0_TO_EIR 2 2 pas VCC R2 1 1 pas ROM_26_L 2 2 pas VCC R3 1 1 pas !DAD+DST 2 2 pas VCC R4 1 1 pas ROM_12_L 2 2 pas VCC R5 1 1 pas ROM_19_L 2 2 pas VCC R6 1 1 pas ROM_21_L 2 2 pas VCC R7 1 1 pas ROM_23_L 2 2 pas VCC R8 1 1 pas ROM_25_L 2 2 pas VCC R9 1 1 pas DATA_TO_SC 2 2 pas VCC R10 1 1 pas N$44 2 2 pas VCC R11 1 1 pas +3V 2 2 pas VCC R13 1 1 pas +3V0 2 2 pas VCC U$2 AA1 1 io *** unused *** AA2 1 io VCC AB1 1 io *** unused *** AB2 1 io *** unused *** AC1 1 io *** unused *** AC2 1 io GND AD1 1 io *** unused *** AD2 1 io *** unused *** AE1 1 io *** unused *** AE2 1 io *** unused *** AF1 1 io GND AF2 1 io GND AH1 1 io *** unused *** AH2 1 io *** unused *** AJ1 1 io *** unused *** AJ2 1 io *** unused *** AK1 1 io MD0 AK2 1 io *** unused *** AL1 1 io MD1 AL2 1 io *** unused *** AM1 1 io MD2 AM2 1 io *** unused *** AN1 1 io GND AN2 1 io GND AP1 1 io MD3 AP2 1 io *** unused *** AR1 1 io *** unused *** AR2 1 io *** unused *** AS1 1 io *** unused *** AS2 1 io *** unused *** AT1 1 io GND AT2 1 io GND AU1 1 io *** unused *** AU2 1 io *** unused *** AV1 1 io *** unused *** AV2 1 io *** unused *** BA1 1 io *** unused *** BA2 1 io VCC BB1 1 io *** unused *** BB2 1 io *** unused *** BC1 1 io GND BC2 1 io GND BD1 1 io *** unused *** BD2 1 io *** unused *** BE1 1 io *** unused *** BE2 1 io *** unused *** BF1 1 io GND BF2 1 io GND BH1 1 io *** unused *** BH2 1 io MA_MS_LC BJ1 1 io *** unused *** BJ2 1 io *** unused *** BK1 1 io MD4 BK2 1 io *** unused *** BL1 1 io MD5 BL2 1 io *** unused *** BM1 1 io MD6 BM2 1 io *** unused *** BN1 1 io GND BN2 1 io GND BP1 1 io MD7 BP2 1 io INT_IN_PROG BR1 1 io *** unused *** BR2 1 io *** unused *** BS1 1 io *** unused *** BS2 1 io *** unused *** BT1 1 io GND BT2 1 io GND BU1 1 io *** unused *** BU2 1 io *** unused *** BV1 1 io DATA7 BV2 1 io *** unused *** CA1 1 io *** unused *** CA2 1 io VCC CB1 1 io *** unused *** CB2 1 io *** unused *** CC1 1 io GND CC2 1 io GND CD1 1 io *** unused *** CD2 1 io TP1 CE1 1 io C0 CE2 1 io TP2 CF1 1 io GND CF2 1 io GND CH1 1 io *** unused *** CH2 1 io TP3 CJ1 1 io *** unused *** CJ2 1 io TP4 CK1 1 io *** unused *** CK2 1 io *** unused *** CL1 1 io *** unused *** CL2 1 io *** unused *** CM1 1 io *** unused *** CM2 1 io TS3 CN1 1 io GND CN2 1 io GND CP1 1 io *** unused *** CP2 1 io *** unused *** CR1 1 io INIT CR2 1 io *** unused *** CS1 1 io *** unused *** CS2 1 io *** unused *** CT1 1 io GND CT2 1 io GND CU1 1 io *** unused *** CU2 1 io *** unused *** CV1 1 io *** unused *** CV2 1 io *** unused *** DA1 1 io *** unused *** DA2 1 io *** unused *** DB1 1 io *** unused *** DB2 1 io *** unused *** DC1 1 io GND DC2 1 io GND DD1 1 io *** unused *** DD2 1 io *** unused *** DE1 1 io *** unused *** DE2 1 io *** unused *** DF1 1 io GND DF2 1 io GND DH1 1 io *** unused *** DH2 1 io *** unused *** DJ1 1 io *** unused *** DJ2 1 io FETCH DK1 1 io MD8 DK2 1 io DEFER DL1 1 io MD9 DL2 1 io E DM1 1 io MD10 DM2 1 io *** unused *** DN1 1 io GND DN2 1 io GND DP1 1 io MD11 DP2 1 io *** unused *** DR1 1 io DATA8 DR2 1 io *** unused *** DS1 1 io DATA9 DS2 1 io *** unused *** DT1 1 io GND DT2 1 io GND DU1 1 io DATA10 DU2 1 io *** unused *** DV1 1 io DATA11 DV2 1 io *** unused ***