/* This file is generated by topld.pl!! */
/* Please don't edit it. */

Name     M8341 ;
PartNo   cpld ;
Date     10/16/2019 ;
Revision 01 ;
Designer  ;
Company   ;
Assembly None ;
Location E1 ;
Device   f1508isptqfp100;

$DEFINE OPTIMIZE

$UNDEF  OPTIMIZE

/* Input Pins */
pin = ac0;
pin = ac0_ne_ac1;
pin = ac1;
pin = ac2_8_0;
pin = ac4_11_0;
pin = ac_0;
pin = ad0_low;
pin = carry_out_low;
pin = clock;
pin = dad_or_dst;
pin = dad_or_dst_low;
pin = div_12_l;
pin = e;
pin = eir2;
pin = eir3;
pin = fetch;
pin = gtf_or_ind;
pin = init;
pin = last_step_l;
pin = link;
pin = modeb;
pin = mq0_low;
pin = mq10_low;
pin = mq11_low;
pin = mq_0;
pin = msir_disable;
pin = next_loc;
pin = rom_11_l;
pin = rom_12_l;
pin = rom_13_l;
pin = rom_14_l;
pin = rom_15_l;
pin = rom_17_l;
pin = rom_22_l;
pin = rom_24_l;
pin = rtf;
pin = sc_0_low;
pin = sgt_low;
pin = tp1;
pin = tp2;
pin = tp3;
pin = ts2;
pin = ts3;
pin = ts4;

/* Output Pins */
pin = ac_load_low;
pin = ac_to_bus_low;
pin = ac_to_mq_ena_low;
pin = ad_lk_low;
pin = c0;
pin = carry_in;
pin = data1;
pin = data_f;
pin = data_t;
pin = en0;
pin = en1;
pin = en2;
pin = incr_sc;
pin = left_low;
pin = link_data;
pin = link_load;
pin = md_disable;
pin = mq_data_low;
pin = mq_load;
pin = mq_to_bus_low;
pin = not_last_xfer;
pin = restart;
pin = right_low;
pin = shl_ena_low;
pin = skip;
pin = tp;
pin = tp2_d;
node n_t_23x;
node n_t_65x;
node n_t_22x;
node n_t_42x;
node n_t_84x;
node n_t_69x;
node eae_on;
node n_t_60x;
node n_t_13x;

/* Internal nodes */
$IFNDEF OPTIMIZE
node ac2_mq11_0;
node bac0;
node bmq0;
node btp3;
node clock_low;
node dcm_or_dpic_low;
node dvi;
node dvi_and_ts3;
node eae_on_low;
node etp;
node etp_or_tp3;
node fetch_low;
node init_low;
node last_dvi_low;
node lp_asr_or_lsr_rp_and_eae_on_low;
node lp_dcm_or_dpic_or_sam_rp_and_ts3;
node lp_shl_or_norms_rp_and_eae_on_low;
node mq0_gt_ac0;
node mq_ge_ac;
node muy_and_eae_on_low;
node n3va;
node n3vb;
node n3vc;
node n3vd;
node n_t_11x;
node n_t_12x;
node n_t_14x;
node n_t_15x;
node n_t_16x;
node n_t_17x;
node n_t_18x;
node n_t_19x;
node n_t_1x;
node n_t_20x;
node n_t_21x;
node n_t_24x;
node n_t_25x;
node n_t_27x;
node n_t_28x;
node n_t_29x;
node n_t_2x;
node n_t_30x;
node n_t_31x;
node n_t_32x;
node n_t_33x;
node n_t_34x;
node n_t_36x;
node n_t_37x;
node n_t_38x;
node n_t_39x;
node n_t_3x;
node n_t_40x;
node n_t_41x;
node n_t_43x;
node n_t_44x;
node n_t_46x;
node n_t_47x;
node n_t_49x;
node n_t_4x;
node n_t_50x;
node n_t_52x;
node n_t_53x;
node n_t_55x;
node n_t_56x;
node n_t_57x;
node n_t_58x;
node n_t_59x;
node n_t_5x;
node n_t_61x;
node n_t_62x;
node n_t_63x;
node n_t_64x;
node n_t_66x;
node n_t_67x;
node n_t_68x;
node n_t_6x;
node n_t_70x;
node n_t_71x;
node n_t_73x;
node n_t_74x;
node n_t_76x;
node n_t_77x;
node n_t_7x;
node n_t_82x;
node n_t_85x;
node n_t_8x;
node n_t_91x;
node n_t_92x;
node normal_dvi_low;
node norms_or_shl_or_asr_or_lsr;
node rom_12;
node sam_low;
node shift3;
node shift_ok;
node ts3_low;
$ENDIF

/* Code nodes */

/* Equations */

/* c1: c_us */

/* c2: c_us */

/* c3: c_us */

/* c4: c_us */

/* c5: c_us */

/* c6: c_us */

/* c7: c_us */

/* c8: c_us */

/* c9: c_us */

/* c10: c_us */

/* c11: c_us */

/* c12: c_us */

/* c13: c_us */

/* c14: c_us */

/* c15: c_us */

/* c16: c_us */

/* c17: c_us */

/* c18: c_us */

/* c19: c_us */

/* c20: c_us */

/* c21: c_us */

/* c22: c_us */

/* c23: c_us */

/* c24: c_us */

/* c25: c_us */

/* c26: c_us */

/* c27: c_us */

/* c28: c_us */

/* c29: c_us */

/* c30: c_us */

/* c31: c_us */

/* c32: c_us */

/* c33: cpol_use */

/* c34: cpol_use */

/* c35: cpol_use */

/* e1: sn74h74 */
n_t_23x.ar = !n3vc;
n_t_23x.d = n_t_22x;
n_t_23x.ck = clock_low;
n_t_23x.ap = !n3vc;
n_t_62x = !n_t_23x;
tp.ap = !eae_on;
tp.d = !n_t_23x;
tp.ck = clock_low;
tp.ar = !n3vc;

/* e2: sn7410 */
n_t_19x = !(n_t_27x & n_t_18x & ac2_mq11_0);
n_t_76x = !(tp & eae_on & n_t_8x);
n_t_63x = !(eae_on & tp & rom_12);

/* e3: sp380n */
!fetch_low = fetch;
!n_t_53x = link
         # rom_13_l;

/* e4: sn7404 */
n_t_6x = !ac4_11_0;
n3vc = 'b'1;
n_t_29x = !n_t_28x;
n3vc = 'b'1;

/* e5: sn74h74 */
n_t_65x.ar = !n3vc;
n_t_65x.d = n_t_63x;
n_t_65x.ck = clock_low;
n_t_65x.ap = !n3vc;
n_t_22x.ar = !n3vc;
n_t_22x.d = n_t_21x;
n_t_22x.ck = clock_low;
n_t_22x.ap = !n3vc;

/* e6: sn7400 */
n_t_38x = !(sc_0_low & mq10_low);
n_t_73x = !(n_t_4x & btp3);
n_t_21x = !(n_t_65x & n_t_76x);
n_t_82x = !(sc_0_low & n_t_85x);

/* e7: sn7402 */
n_t_27x = !(ac1
          # n_t_15x);
n_t_49x = !(rom_13_l
          # carry_out_low);
n_t_18x = !(n_t_15x
          # dad_or_dst);
n_t_28x = !(n_t_27x
          # n_t_18x);

/* e8: sn74h53 */
/* gdollar_0 = !(ac0_ne_ac1 & n_t_18x
          # modeb & n_t_30x & norms_or_shl_or_asr_or_lsr
          # ac2_mq11_0 & n_t_29x); */
/* gdollar_1 = !gdollar_0; */
shift_ok = gdollar_0;

/* e9: sn7402 */
etp_or_tp3 = !(etp
             # btp3);
mq_ge_ac = !(n_t_17x
           # n_t_16x);
mq0_gt_ac0 = !(n_t_11x
             # bmq0);
etp = !(n_t_62x
      # n_t_22x);

/* e10: sn7404 */
n_t_30x = !last_step_l;
n_t_17x = !n_t_77x;
n_t_20x = !n_t_19x;
n_t_11x = !bac0;
n_t_12x = !n_t_33x;
bmq0 = !mq0_low;

/* e11: sn7486 */
n_t_85x = n_t_1x
        $ mq10_low;
n_t_77x = bmq0
        $ n_t_11x;
n_t_34x = n_t_70x
        $ mq0_low;

/* e12: sn74h11 */
ac2_mq11_0 = mq_0 & ac2_8_0 & n_t_6x;
n_t_64x = etp & shift_ok;
bac0 = ac0 & n3vc & n3vc;

/* e13: sn74h74 */
n_t_42x.ap = !dvi;
n_t_42x.d = !ad0_low;
n_t_42x.ck = n_t_37x;
n_t_42x.ar = !n3vd;
n_t_84x.ar = !n_t_73x;
n_t_84x.d = n_t_74x;
n_t_84x.ck = etp;
n_t_84x.ap = !init_low;
n_t_7x = !n_t_84x;

/* e14: sn7410 */
n_t_74x = !(dcm_or_dpic_low & last_step_l & shift_ok);
n_t_33x = !(n_t_31x & ts3_low & ts3_low);
n_t_15x = !(eae_on & norms_or_shl_or_asr_or_lsr & fetch_low);

/* e15: sn7412 */
/* n_t_4x = !(dvi & carry_out_low & n_t_84x); */
/* skip = !(ac2_8_0 & ac_0 & n_t_14x); */

/* e16: dec8235 */
/* n_t_43x = !(!n_t_25x & !rtf
        # btp3 & !sam_low); */
/* n_t_40x = !(!data1 & !rtf
        # mq0_gt_ac0 & !sam_low); */
/* n_t_40x = !(!n3vc & !rtf
        # mq_ge_ac & !sam_low); */
/* en2 = !(!n3vc & !rtf
    # n3vc & !sam_low); */

/* e17: sn74h74 */
n_t_69x.ar = !n_t_68x;
n_t_69x.d = n_t_67x;
n_t_69x.ck = n_t_59x;
n_t_69x.ap = !n3vd;
tp2_d.ar = !n3vd;
tp2_d.d = n_t_60x;
tp2_d.ck = clock_low;
tp2_d.ap = !n3vd;
n_t_59x = !tp2_d;

/* e18: sn97401 */
/* c0 = !(n_t_20x & modeb); */
/* not_last_xfer = !(n_t_69x & n_t_4x); */
/* ac_to_bus_low = !(ts3_low & shift3); */
/* carry_in = !(ts3_low & n_t_53x); */

/* e19: sn7404 */
n_t_47x = !shift_ok;
n_t_25x = !btp3;
shift3 = !rom_15_l;
n_t_57x = !en2;
n_t_37x = !ac_load_low;
n_t_14x = !rom_24_l;

/* e20: dec8235 */
/* en1 = !(!n3vc & !n_t_5x
    # eir3 & !n_t_33x); */
/* mq_to_bus_low = !(!n_t_5x
              # n3vc & !n_t_33x); */
/* md_disable = !(!eir3 & !n_t_5x); */
/* data_t = !(!eir3 & !n_t_5x); */

/* e21: sn74h74 */
eae_on.ar = !init_low;
eae_on.d = n_t_7x;
eae_on.ck = etp_or_tp3;
eae_on.ap = !n3vd;
eae_on_low = !eae_on;
n_t_60x.ar = !n_t_59x;
n_t_60x.d = n3vd;
n_t_60x.ck = n_t_2x;
n_t_60x.ap = !n3vd;

/* e22: n8881n */
/* link_data = !(n_t_50x & bac0); */
/* link_data = !(eae_on_low & dvi); */
/* ac_load_low = !(n_t_12x & btp3); */
/* carry_in = !(n_t_56x & next_loc); */

/* e23: sn7416 */
/* link_data = !n_t_49x; */
/* ac_to_mq_ena_low = !n_t_31x; */
/* ac_load_low = !etp; */
/* en0 = !n_t_57x; */
/* skip = !next_loc; */

/* e24: dec8235 */
/* ad_lk_low = !(!mq0_low & !lp_shl_or_norms_rp_and_eae_on_low
          # n_t_34x & !dvi_and_ts3); */
/* shl_ena_low = !(!n_t_47x & !lp_shl_or_norms_rp_and_eae_on_low
            # n3vb & !dvi_and_ts3); */
/* mq_data_low = !(!n3vc & !lp_shl_or_norms_rp_and_eae_on_low
            # n_t_66x & !dvi_and_ts3); */
/* left_low = !(!n_t_47x & !lp_shl_or_norms_rp_and_eae_on_low); */

/* e25: sn97401 */
/* data_f = !(lp_dcm_or_dpic_or_sam_rp_and_ts3 & eir2); */
/* n_t_46x = !n_t_12x; */
/* en0 = !(n_t_56x & next_loc); */
/* carry_in = !(lp_dcm_or_dpic_or_sam_rp_and_ts3 & eae_on_low); */

/* e26: sn7486 */
n_t_3x = n_t_7x
       $ eae_on;
n_t_24x = eir3
        $ eir2;
n_t_92x = n_t_42x
        $ n_t_38x;
n_t_66x = carry_out_low
        $ n_t_92x;

/* e27: dec8235 */
/* en1 = !(!n_t_1x & !last_dvi_low
    # n3vb & !normal_dvi_low); */
/* data_f = !(!mq10_low & !last_dvi_low
       # n_t_82x & !normal_dvi_low); */
/* left_low = !(!n3vb & !last_dvi_low
         # div_12_l & !normal_dvi_low); */
/* n_t_46x = !(!n3vb & !last_dvi_low
        # n3vb & !normal_dvi_low); */

/* e28: sn7404 */
clock_low = !clock;
n_t_91x = !last_step_l;
n_t_39x = !sgt_low;
n_t_16x = !ad0_low;
n_t_36x = !n_t_24x;
n_t_32x = !n_t_31x;

/* e29: sp380n */
!n_t_55x = msir_disable;
!n_t_31x = dad_or_dst_low
         # e;
!n_t_2x = tp2;
!n_t_56x = n_t_55x
         # ts4;

/* e30: sp384n */
btp3 = tp3;
n_t_52x = n_t_47x
        # n_t_46x;
dcm_or_dpic_low = n_t_36x
                # rom_22_l;
n_t_5x = ts2
       # n_t_32x;

/* e31: dec8235 */
/* right_low = !(!muy_and_eae_on_low
          # shift_ok & !lp_asr_or_lsr_rp_and_eae_on_low); */
/* en1 = !(!mq11_low & !muy_and_eae_on_low); */
/* n_t_43x = !(!n3vb & !muy_and_eae_on_low
        # n_t_64x & !lp_asr_or_lsr_rp_and_eae_on_low); */
/* n_t_40x = !(!n3vb & !muy_and_eae_on_low
        # n_t_1x & !lp_asr_or_lsr_rp_and_eae_on_low); */

/* e32: n8881n */
/* link_load = !(btp3 & n_t_71x); */
/* link_load = !(n_t_44x & n_t_64x); */
/* link_load = !(n_t_64x & n_t_44x); */
/* link_load = !(n_t_71x & btp3); */

/* e33: sn7410 */
last_dvi_low = !(dvi & ts3_low & n_t_91x);
n_t_44x = !(last_dvi_low & dcm_or_dpic_low & lp_shl_or_norms_rp_and_eae_on_low);
normal_dvi_low = !(ts3_low & last_step_l & dvi);

/* e34: sn7402 */
norms_or_shl_or_asr_or_lsr = !(rom_15_l
                             # rom_12);
dvi = !(rom_14_l
      # n_t_8x);
n_t_61x = !(eae_on_low
          # rom_15_l);
n_t_70x = !(eae_on_low
          # n_t_1x);

/* e35: sn7410 */
lp_shl_or_norms_rp_and_eae_on_low = !(n_t_58x & n_t_61x & n_t_8x);
lp_asr_or_lsr_rp_and_eae_on_low = !(n_t_8x & rom_14_l & n_t_61x);
muy_and_eae_on_low = !(rom_12 & n_t_61x & rom_14_l);

/* e36: n8881n */
/* restart = !n_t_3x; */
/* restart = !n_t_3x; */
/* ac_load_low = !(n_t_4x & btp3); */

/* e37: sn97401 */
/* n_t_46x = !(last_dvi_low & eae_on); */
/* n_t_4x = !(dcm_or_dpic_low & rom_15_l); */
/* data1 = !(n_t_13x & gtf_or_ind); */
/* skip = !(n_t_13x & n_t_39x); */

/* e38: sn7400 */
incr_sc = !(shift3 & n_t_64x);
n_t_67x = !(rom_15_l & dcm_or_dpic_low);
dvi_and_ts3 = !(dvi & ts3_low);
sam_low = !(lp_dcm_or_dpic_or_sam_rp_and_ts3 & n_t_36x);

/* e39: sn7404 */
n3vb = 'b'1;
rom_12 = !rom_12_l;
n_t_8x = !rom_12;
n_t_58x = !rom_14_l;
n_t_50x = !rom_11_l;
n_t_71x = !rom_17_l;

/* e40: sp380n */
!lp_dcm_or_dpic_or_sam_rp_and_ts3 = rom_22_l
                                  # ts3;
!init_low = init;
!ts3_low = ts3;
!n_t_68x = tp1
         # n_t_22x;

/* e41: sn74h74 */
n_t_13x.ap = !n3va;
n_t_13x.d = !n_t_40x;
n_t_13x.ck = n_t_41x;
n_t_13x.ar = !modeb;

/* e42: sn7404 */
n3va = 'b'1;
n_t_41x = !n_t_43x;
n_t_1x = !mq11_low;

/* e43: dm8093 */
mq_load = etp_or_tp3;
mq_load.oe = !n_t_52x;

/* r1: r_us_ */

/* r2: r_us_ */

/* r3: r_us_ */

/* r4: r_us_ */

/* r5: r_us_ */

/* r6: r_us_ */

/* r7: r_us_ */

/* r8: r_us_ */

/* r9: r_us_ */

/* r10: r_us_ */

/* r11: r_us_ */

/* r12: r_us_ */

/* r13: r_us_ */

/* r14: r_us_ */
n3vd = 'b'1;

/* r15: r_us_ */
n3vd = 'b'1;

/* r16: r_us_ */

/* r17: r_us_ */

/* r18: r_us_ */

/* r19: r_us_ */

/* r20: r_us_ */

/* Open collector 'wire-or's */
property atmel {open_collector= ac_load_low};
!ac_load_low = (n_t_12x & btp3)
               # (etp)
               # (n_t_4x & btp3);
ac_load_low.oe = (n_t_12x & btp3)
               # (etp)
               # (n_t_4x & btp3);
property atmel {open_collector= ac_to_bus_low};
!ac_to_bus_low = (ts3_low & shift3);
ac_to_bus_low.oe = (ts3_low & shift3);
property atmel {open_collector= ac_to_mq_ena_low};
!ac_to_mq_ena_low = n_t_31x;
ac_to_mq_ena_low.oe = n_t_31x;
property atmel {open_collector= ad_lk_low};
!ad_lk_low = (!mq0_low & !lp_shl_or_norms_rp_and_eae_on_low
          # n_t_34x & !dvi_and_ts3);
ad_lk_low.oe = (!mq0_low & !lp_shl_or_norms_rp_and_eae_on_low
          # n_t_34x & !dvi_and_ts3);
property atmel {open_collector= c0};
!c0 = (n_t_20x & modeb);
c0.oe = (n_t_20x & modeb);
property atmel {open_collector= carry_in};
!carry_in = (ts3_low & n_t_53x)
            # (n_t_56x & next_loc)
            # (lp_dcm_or_dpic_or_sam_rp_and_ts3 & eae_on_low);
carry_in.oe = (ts3_low & n_t_53x)
            # (n_t_56x & next_loc)
            # (lp_dcm_or_dpic_or_sam_rp_and_ts3 & eae_on_low);
property atmel {open_collector= data1};
!data1 = (n_t_13x & gtf_or_ind);
data1.oe = (n_t_13x & gtf_or_ind);
property atmel {open_collector= data_f};
!data_f = (lp_dcm_or_dpic_or_sam_rp_and_ts3 & eir2)
       # (!mq10_low & !last_dvi_low
       # n_t_82x & !normal_dvi_low);
data_f.oe = (lp_dcm_or_dpic_or_sam_rp_and_ts3 & eir2)
       # (!mq10_low & !last_dvi_low
       # n_t_82x & !normal_dvi_low);
property atmel {open_collector= data_t};
!data_t = (!eir3 & !n_t_5x);
data_t.oe = (!eir3 & !n_t_5x);
property atmel {open_collector= en0};
!en0 = (n_t_57x)
       # (n_t_56x & next_loc);
en0.oe = (n_t_57x)
       # (n_t_56x & next_loc);
property atmel {open_collector= en1};
!en1 = (!n3vc & !n_t_5x
    # eir3 & !n_t_33x)
    # (!n_t_1x & !last_dvi_low
    # n3vb & !normal_dvi_low)
       # (!mq11_low & !muy_and_eae_on_low);
en1.oe = (!n3vc & !n_t_5x
    # eir3 & !n_t_33x)
    # (!n_t_1x & !last_dvi_low
    # n3vb & !normal_dvi_low)
       # (!mq11_low & !muy_and_eae_on_low);
property atmel {open_collector= en2};
!en2 = (!n3vc & !rtf
    # n3vc & !sam_low);
en2.oe = (!n3vc & !rtf
    # n3vc & !sam_low);
!gdollar_0 = (ac0_ne_ac1 & n_t_18x
          # modeb & n_t_30x & norms_or_shl_or_asr_or_lsr
          # ac2_mq11_0 & n_t_29x);
!gdollar_1 = gdollar_0;
property atmel {open_collector= left_low};
!left_low = (!n_t_47x & !lp_shl_or_norms_rp_and_eae_on_low)
         # (!n3vb & !last_dvi_low
         # div_12_l & !normal_dvi_low);
left_low.oe = (!n_t_47x & !lp_shl_or_norms_rp_and_eae_on_low)
         # (!n3vb & !last_dvi_low
         # div_12_l & !normal_dvi_low);
property atmel {open_collector= link_data};
!link_data = (n_t_50x & bac0)
             # (eae_on_low & dvi)
             # (n_t_49x);
link_data.oe = (n_t_50x & bac0)
             # (eae_on_low & dvi)
             # (n_t_49x);
property atmel {open_collector= link_load};
!link_load = (btp3 & n_t_71x)
             # (n_t_44x & n_t_64x)
             # (n_t_64x & n_t_44x)
             # (n_t_71x & btp3);
link_load.oe = (btp3 & n_t_71x)
             # (n_t_44x & n_t_64x)
             # (n_t_64x & n_t_44x)
             # (n_t_71x & btp3);
property atmel {open_collector= md_disable};
!md_disable = (!eir3 & !n_t_5x);
md_disable.oe = (!eir3 & !n_t_5x);
property atmel {open_collector= mq_data_low};
!mq_data_low = (!n3vc & !lp_shl_or_norms_rp_and_eae_on_low
            # n_t_66x & !dvi_and_ts3);
mq_data_low.oe = (!n3vc & !lp_shl_or_norms_rp_and_eae_on_low
            # n_t_66x & !dvi_and_ts3);
property atmel {open_collector= mq_to_bus_low};
!mq_to_bus_low = (!n_t_5x
              # n3vc & !n_t_33x);
mq_to_bus_low.oe = (!n_t_5x
              # n3vc & !n_t_33x);
!n_t_40x = (!data1 & !rtf
        # mq0_gt_ac0 & !sam_low)
        # (!n3vc & !rtf
        # mq_ge_ac & !sam_low)
        # (!n3vb & !muy_and_eae_on_low
        # n_t_1x & !lp_asr_or_lsr_rp_and_eae_on_low);
!n_t_43x = (!n_t_25x & !rtf
        # btp3 & !sam_low)
        # (!n3vb & !muy_and_eae_on_low
        # n_t_64x & !lp_asr_or_lsr_rp_and_eae_on_low);
!n_t_46x = (n_t_12x)
        # (!n3vb & !last_dvi_low
        # n3vb & !normal_dvi_low)
           # (last_dvi_low & eae_on);
!n_t_4x = (dvi & carry_out_low & n_t_84x)
          # (dcm_or_dpic_low & rom_15_l);
property atmel {open_collector= not_last_xfer};
!not_last_xfer = (n_t_69x & n_t_4x);
not_last_xfer.oe = (n_t_69x & n_t_4x);
property atmel {open_collector= restart};
!restart = (n_t_3x)
           # (n_t_3x);
restart.oe = (n_t_3x)
           # (n_t_3x);
property atmel {open_collector= right_low};
!right_low = (!muy_and_eae_on_low
          # shift_ok & !lp_asr_or_lsr_rp_and_eae_on_low);
right_low.oe = (!muy_and_eae_on_low
          # shift_ok & !lp_asr_or_lsr_rp_and_eae_on_low);
property atmel {open_collector= shl_ena_low};
!shl_ena_low = (!n_t_47x & !lp_shl_or_norms_rp_and_eae_on_low
            # n3vb & !dvi_and_ts3);
shl_ena_low.oe = (!n_t_47x & !lp_shl_or_norms_rp_and_eae_on_low
            # n3vb & !dvi_and_ts3);
property atmel {open_collector= skip};
!skip = (ac2_8_0 & ac_0 & n_t_14x)
        # (next_loc)
        # (n_t_13x & n_t_39x);
skip.oe = (ac2_8_0 & ac_0 & n_t_14x)
        # (next_loc)
        # (n_t_13x & n_t_39x);