/* This file is generated by ttl2pld.pl!! */
/* Please don't edit it. */

Name     M8341 ;
PartNo   cpld ;
Date     9/29/2019 ;
Revision 01 ;
Designer  ;
Company   ;
Assembly None ;
Location E1 ;
Device   f1508ispqfp100;

$DEFINE OPTIMIZE

$UNDEF  OPTIMIZE

/* Input Pins */
pin 54 = ac0;
pin 57 = ac0_ne_ac1;
pin 51 = ac1;
pin 59 = ac2_8_0;
pin 42 = ac4_11_0;
pin 47 = ac_0;
pin 55 = ad0_low;
pin 48 = carry_out_low;
pin 92 = clock;
pin 83 = dad_or_dst;
pin 90 = dad_or_dst_low;
pin 77 = div_12_l;
pin  2 = e;
pin 71 = eir2;
pin 73 = eir3;
pin  3 = fetch;
pin 100= gtf_or_ind;
pin 10 = init;
pin 95 = last_step_l;
pin 23 = link;
pin 99 = modeb;
pin 66 = mq0_low;
pin 67 = mq10_low;
pin 65 = mq11_low;
pin 56 = mq_0;
pin  4 = msir_disable;
pin 74 = next_loc;
pin 91 = rom_11_l;
pin 96 = rom_12_l;
pin 79 = rom_13_l;
pin 98 = rom_14_l;
pin 89 = rom_15_l;
pin 94 = rom_17_l;
pin 81 = rom_22_l;
pin 78 = rom_24_l;
pin 72 = rtf;
pin 70 = sc_0_low;
pin 86 = sgt_low;
pin 22 = tp1;
pin 19 = tp2;
pin 18 = tp3;
pin 16 = ts2;
pin 14 = ts3;
pin 11 = ts4;

/* Output Pins */
pin 50 = ac_load_low;
pin 32 = ac_to_bus_low;
pin 49 = ac_to_mq_ena_low;
pin 52 = ad_lk_low;
pin 21 = c0;
pin 37 = carry_in;
pin 24 = data1;
pin 46 = data_f;
pin 31 = data_t;
pin 33 = en0;
pin 39 = en1;
pin 29 = en2;
pin 80 = incr_sc;
pin 60 = left_low;
pin  9 = link_data;
pin  7 = link_load;
pin 34 = md_disable;
pin 63 = mq_data_low;
pin 38 = mq_load;
pin 35 = mq_to_bus_low;
pin 25 = tp;
pin 15 = not_last_xfer;
pin 82 = restart;
pin 62 = right_low;
pin 30 = shl_ena_low;
pin  8 = skip;
pin 85 = tp2_d;
node n_t_23x;
node n_t_65x;
node n_t_22x;
node n_t_42x;
node n_t_84x;
node n_t_69x;
node eae_on;
node n_t_60x;
node n_t_13x;

/* Internal nodes */
$IFNDEF OPTIMIZE
node ac2_mq11_0;
node bac0;
node dcm_or_dpic_low;
node dvi;
node dvi_and_ts3;
node etp;
node etp_or_tp3;
node last_dvi_low;
node lp_asr_or_lsr_rp_and_eae_on_low;
node lp_dcm_or_dpic_or_sam_rp_and_ts3;
node lp_shl_or_norms_rp_and_eae_on_low;
node mq0_gt_ac0;
node mq_ge_ac;
node muy_and_eae_on_low;
node n_t_15x;
node n_t_18x;
node n_t_19x;
node n_t_21x;
node n_t_24x;
node n_t_27x;
node n_t_28x;
node n_t_33x;
node n_t_34x;
node n_t_38x;
node n_t_3x;
node n_t_40x;
node n_t_43x;
node n_t_44x;
node n_t_46x;
node n_t_49x;
node n_t_4x;
node n_t_52x;
node n_t_53x;
node n_t_56x;
node n_t_5x;
node n_t_61x;
node n_t_63x;
node n_t_64x;
node n_t_66x;
node n_t_67x;
node n_t_68x;
node n_t_70x;
node n_t_73x;
node n_t_74x;
node n_t_76x;
node n_t_77x;
node n_t_82x;
node n_t_85x;
node n_t_92x;
node normal_dvi_low;
node norms_or_shl_or_asr_or_lsr;
node sam_low;
node shift_ok;
$ENDIF

/* Code nodes */

/* Equations */

/* c1: c_us */

/* c2: c_us */

/* c3: c_us */

/* c4: c_us */

/* c5: c_us */

/* c6: c_us */

/* c7: c_us */

/* c8: c_us */

/* c9: c_us */

/* c10: c_us */

/* c11: c_us */

/* c12: c_us */

/* c13: c_us */

/* c14: c_us */

/* c15: c_us */

/* c16: c_us */

/* c17: c_us */

/* c18: c_us */

/* c19: c_us */

/* c20: c_us */

/* c21: c_us */

/* c22: c_us */

/* c23: c_us */

/* c24: c_us */

/* c25: c_us */

/* c26: c_us */

/* c27: c_us */

/* c28: c_us */

/* c29: c_us */

/* c30: c_us */

/* c31: c_us */

/* c32: c_us */

/* c33: cpol_use */

/* c34: cpol_use */

/* c35: cpol_use */

/* e1: sn74h74 */
n_t_23x.ar = !'b'1;
n_t_23x.d = n_t_22x;
n_t_23x.ck = !clock;
n_t_23x.ap = !'b'1;
tp.ap = !eae_on;
tp.d = !n_t_23x;
tp.ck = !clock;
tp.ar = !'b'1;

/* e2: sn7410 */
n_t_19x = !(n_t_27x & n_t_18x & ac2_mq11_0);
n_t_76x = !(tp & eae_on & rom_12_l);
n_t_63x = !(eae_on & tp & !rom_12_l);

/* e3: sp380n */
!n_t_53x = link
         # rom_13_l;

/* e4: sn7404 */

/* e5: sn74h74 */
n_t_65x.ar = !'b'1;
n_t_65x.d = n_t_63x;
n_t_65x.ck = !clock;
n_t_65x.ap = !'b'1;
n_t_22x.ar = !'b'1;
n_t_22x.d = n_t_21x;
n_t_22x.ck = !clock;
n_t_22x.ap = !'b'1;

/* e6: sn7400 */
n_t_38x = !(sc_0_low & mq10_low);
n_t_73x = !(n_t_4x & tp3);
n_t_21x = !(n_t_65x & n_t_76x);
n_t_82x = !(sc_0_low & n_t_85x);

/* e7: sn7402 */
n_t_27x = !(ac1
          # n_t_15x);
n_t_49x = !(rom_13_l
          # carry_out_low);
n_t_18x = !(n_t_15x
          # dad_or_dst);
n_t_28x = !(n_t_27x
          # n_t_18x);

/* e8: sn74h53 */
/* shift_ok = !(ac0_ne_ac1 & n_t_18x
          # modeb & !last_step_l & norms_or_shl_or_asr_or_lsr
          # ac2_mq11_0 & !n_t_28x); */
/* !shift_ok = !shift_ok; */

/* e9: sn7402 */
etp_or_tp3 = !(etp
             # tp3);
mq_ge_ac = !(!n_t_77x
           # !ad0_low);
mq0_gt_ac0 = !(!bac0
             # !mq0_low);
etp = !(!n_t_23x
      # n_t_22x);

/* e10: sn7404 */

/* e11: sn7486 */
n_t_85x = !mq11_low
        $ mq10_low;
n_t_77x = !mq0_low
        $ !bac0;
n_t_34x = n_t_70x
        $ mq0_low;

/* e12: sn74h11 */
ac2_mq11_0 = mq_0 & ac2_8_0 & !ac4_11_0;
n_t_64x = etp & shift_ok;
bac0 = ac0 & 'b'1 & 'b'1;

/* e13: sn74h74 */
n_t_42x.ap = !dvi;
n_t_42x.d = !ad0_low;
n_t_42x.ck = !ac_load_low;
n_t_42x.ar = !'b'1;
n_t_84x.ar = !n_t_73x;
n_t_84x.d = n_t_74x;
n_t_84x.ck = etp;
n_t_84x.ap = init;

/* e14: sn7410 */
n_t_74x = !(dcm_or_dpic_low & last_step_l & shift_ok);
n_t_33x = !(!ac_to_mq_ena_low & !ts3 & !ts3);
n_t_15x = !(eae_on & norms_or_shl_or_asr_or_lsr & !fetch);

/* e15: sn7412 */
/* n_t_4x = !(dvi & carry_out_low & n_t_84x); */
/* skip = !(ac2_8_0 & ac_0 & !rom_24_l); */

/* e16: dec8235 */
/* n_t_43x = !(tp3 & !rtf
        # tp3 & !sam_low); */
/* n_t_40x = !(!data1 & !rtf
        # mq0_gt_ac0 & !sam_low); */
/* n_t_40x = !(!'b'1 & !rtf
        # mq_ge_ac & !sam_low); */
/* en2 = !(!'b'1 & !rtf
    # 'b'1 & !sam_low); */

/* e17: sn74h74 */
n_t_69x.ar = !n_t_68x;
n_t_69x.d = n_t_67x;
n_t_69x.ck = !tp2_d;
n_t_69x.ap = !'b'1;
tp2_d.ar = !'b'1;
tp2_d.d = n_t_60x;
tp2_d.ck = !clock;
tp2_d.ap = !'b'1;

/* e18: sn97401 */
/* c0 = !(!n_t_19x & modeb); */
/* not_last_xfer = !(n_t_69x & n_t_4x); */
/* ac_to_bus_low = !(!ts3 & !rom_15_l); */
/* carry_in = !(!ts3 & n_t_53x); */

/* e19: sn7404 */

/* e20: dec8235 */
/* en1 = !(!'b'1 & !n_t_5x
    # eir3 & !n_t_33x); */
/* mq_to_bus_low = !(!n_t_5x
              # 'b'1 & !n_t_33x); */
/* md_disable = !(!eir3 & !n_t_5x); */
/* data_t = !(!eir3 & !n_t_5x); */

/* e21: sn74h74 */
eae_on.ar = init;
eae_on.d = !n_t_84x;
eae_on.ck = etp_or_tp3;
eae_on.ap = !'b'1;
n_t_60x.ar = tp2_d;
n_t_60x.d = 'b'1;
n_t_60x.ck = !tp2;
n_t_60x.ap = !'b'1;

/* e22: n8881n */
/* link_data = !(!rom_11_l & bac0); */
/* link_data = !(!eae_on & dvi); */
/* ac_load_low = !(!n_t_33x & tp3); */
/* carry_in = !(n_t_56x & next_loc); */

/* e23: sn7416 */
/* link_data = !n_t_49x; */
/* ac_to_mq_ena_low = ac_to_mq_ena_low; */
/* ac_load_low = !etp; */
/* en0 = en2; */
/* skip = !next_loc; */

/* e24: dec8235 */
/* ad_lk_low = !(!mq0_low & !lp_shl_or_norms_rp_and_eae_on_low
          # n_t_34x & !dvi_and_ts3); */
/* shl_ena_low = !(shift_ok & !lp_shl_or_norms_rp_and_eae_on_low
            # 'b'1 & !dvi_and_ts3); */
/* mq_data_low = !(!'b'1 & !lp_shl_or_norms_rp_and_eae_on_low
            # n_t_66x & !dvi_and_ts3); */
/* left_low = !(shift_ok & !lp_shl_or_norms_rp_and_eae_on_low); */

/* e25: sn97401 */
/* data_f = !(lp_dcm_or_dpic_or_sam_rp_and_ts3 & eir2); */
/* n_t_46x = n_t_33x; */
/* en0 = !(n_t_56x & next_loc); */
/* carry_in = !(lp_dcm_or_dpic_or_sam_rp_and_ts3 & !eae_on); */

/* e26: sn7486 */
n_t_3x = !n_t_84x
       $ eae_on;
n_t_24x = eir3
        $ eir2;
n_t_92x = n_t_42x
        $ n_t_38x;
n_t_66x = carry_out_low
        $ n_t_92x;

/* e27: dec8235 */
/* en1 = !(mq11_low & !last_dvi_low
    # 'b'1 & !normal_dvi_low); */
/* data_f = !(!mq10_low & !last_dvi_low
       # n_t_82x & !normal_dvi_low); */
/* left_low = !(!'b'1 & !last_dvi_low
         # div_12_l & !normal_dvi_low); */
/* n_t_46x = !(!'b'1 & !last_dvi_low
        # 'b'1 & !normal_dvi_low); */

/* e28: sn7404 */

/* e29: sp380n */
ac_to_mq_ena_low = dad_or_dst_low
         # e;
!n_t_56x = !msir_disable
         # ts4;

/* e30: sp384n */
n_t_52x = !shift_ok
        # n_t_46x;
dcm_or_dpic_low = !n_t_24x
                # rom_22_l;
n_t_5x = ts2
       # ac_to_mq_ena_low;

/* e31: dec8235 */
/* right_low = !(!muy_and_eae_on_low
          # shift_ok & !lp_asr_or_lsr_rp_and_eae_on_low); */
/* en1 = !(!mq11_low & !muy_and_eae_on_low); */
/* n_t_43x = !(!'b'1 & !muy_and_eae_on_low
        # n_t_64x & !lp_asr_or_lsr_rp_and_eae_on_low); */
/* n_t_40x = !(!'b'1 & !muy_and_eae_on_low
        # !mq11_low & !lp_asr_or_lsr_rp_and_eae_on_low); */

/* e32: n8881n */
/* link_load = !(tp3 & !rom_17_l); */
/* link_load = !(n_t_44x & n_t_64x); */
/* link_load = !(n_t_64x & n_t_44x); */
/* link_load = !(!rom_17_l & tp3); */

/* e33: sn7410 */
last_dvi_low = !(dvi & !ts3 & !last_step_l);
n_t_44x = !(last_dvi_low & dcm_or_dpic_low & lp_shl_or_norms_rp_and_eae_on_low);
normal_dvi_low = !(!ts3 & last_step_l & dvi);

/* e34: sn7402 */
norms_or_shl_or_asr_or_lsr = !(rom_15_l
                             # !rom_12_l);
dvi = !(rom_14_l
      # rom_12_l);
n_t_61x = !(!eae_on
          # rom_15_l);
n_t_70x = !(!eae_on
          # !mq11_low);

/* e35: sn7410 */
lp_shl_or_norms_rp_and_eae_on_low = !(!rom_14_l & n_t_61x & rom_12_l);
lp_asr_or_lsr_rp_and_eae_on_low = !(rom_12_l & rom_14_l & n_t_61x);
muy_and_eae_on_low = !(!rom_12_l & n_t_61x & rom_14_l);

/* e36: n8881n */
/* restart = !n_t_3x; */
/* restart = !n_t_3x; */
/* ac_load_low = !(n_t_4x & tp3); */

/* e37: sn97401 */
/* n_t_46x = !(last_dvi_low & eae_on); */
/* n_t_4x = !(dcm_or_dpic_low & rom_15_l); */
/* data1 = !(n_t_13x & gtf_or_ind); */
/* skip = !(n_t_13x & !sgt_low); */

/* e38: sn7400 */
incr_sc = !(!rom_15_l & n_t_64x);
n_t_67x = !(rom_15_l & dcm_or_dpic_low);
dvi_and_ts3 = !(dvi & !ts3);
sam_low = !(lp_dcm_or_dpic_or_sam_rp_and_ts3 & !n_t_24x);

/* e39: sn7404 */

/* e40: sp380n */
!lp_dcm_or_dpic_or_sam_rp_and_ts3 = rom_22_l
                                  # ts3;
!n_t_68x = tp1
         # n_t_22x;

/* e41: sn74h74 */
n_t_13x.ap = !'b'1;
n_t_13x.d = !n_t_40x;
n_t_13x.ck = !n_t_43x;
n_t_13x.ar = !modeb;

/* e42: sn7404 */

/* e43: dm8093 */
mq_load = etp_or_tp3;
mq_load.oe = !n_t_52x;

/* r1: r_us_ */

/* r2: r_us_ */

/* r3: r_us_ */

/* r4: r_us_ */

/* r5: r_us_ */

/* r6: r_us_ */

/* r7: r_us_ */

/* r8: r_us_ */

/* r9: r_us_ */

/* r10: r_us_ */

/* r11: r_us_ */

/* r12: r_us_ */

/* r13: r_us_ */

/* r14: r_us_ */

/* r15: r_us_ */

/* r16: r_us_ */

/* r17: r_us_ */

/* r18: r_us_ */

/* r19: r_us_ */

/* r20: r_us_ */

/* Open collector 'wire-or's */
property atmel {open_collector= ac_load_low};
!ac_load_low = (!n_t_33x & tp3)
               # (etp)
               # (n_t_4x & tp3);
ac_load_low.oe = (!n_t_33x & tp3)
               # (etp)
               # (n_t_4x & tp3);
property atmel {open_collector= ac_to_bus_low};
!ac_to_bus_low = (!ts3 & !rom_15_l);
ac_to_bus_low.oe = (!ts3 & !rom_15_l);
property atmel {open_collector= ac_to_mq_ena_low};
ac_to_mq_ena_low.oe = !ac_to_mq_ena_low;
property atmel {open_collector= ad_lk_low};
!ad_lk_low = (!mq0_low & !lp_shl_or_norms_rp_and_eae_on_low
          # n_t_34x & !dvi_and_ts3);
ad_lk_low.oe = (!mq0_low & !lp_shl_or_norms_rp_and_eae_on_low
          # n_t_34x & !dvi_and_ts3);
property atmel {open_collector= c0};
!c0 = (!n_t_19x & modeb);
c0.oe = (!n_t_19x & modeb);
property atmel {open_collector= carry_in};
!carry_in = (!ts3 & n_t_53x)
            # (n_t_56x & next_loc)
            # (lp_dcm_or_dpic_or_sam_rp_and_ts3 & !eae_on);
carry_in.oe = (!ts3 & n_t_53x)
            # (n_t_56x & next_loc)
            # (lp_dcm_or_dpic_or_sam_rp_and_ts3 & !eae_on);
property atmel {open_collector= data1};
!data1 = (n_t_13x & gtf_or_ind);
data1.oe = (n_t_13x & gtf_or_ind);
property atmel {open_collector= data_f};
!data_f = (lp_dcm_or_dpic_or_sam_rp_and_ts3 & eir2)
       # (!mq10_low & !last_dvi_low
       # n_t_82x & !normal_dvi_low);
data_f.oe = (lp_dcm_or_dpic_or_sam_rp_and_ts3 & eir2)
       # (!mq10_low & !last_dvi_low
       # n_t_82x & !normal_dvi_low);
property atmel {open_collector= data_t};
!data_t = (!eir3 & !n_t_5x);
data_t.oe = (!eir3 & !n_t_5x);
property atmel {open_collector= en0};
!en0 = (!en2)
       # (n_t_56x & next_loc);
en0.oe = (!en2)
       # (n_t_56x & next_loc);
property atmel {open_collector= en1};
!en1 = (!'b'1 & !n_t_5x
    # eir3 & !n_t_33x)
    # (mq11_low & !last_dvi_low
    # 'b'1 & !normal_dvi_low)
       # (!mq11_low & !muy_and_eae_on_low);
en1.oe = (!'b'1 & !n_t_5x
    # eir3 & !n_t_33x)
    # (mq11_low & !last_dvi_low
    # 'b'1 & !normal_dvi_low)
       # (!mq11_low & !muy_and_eae_on_low);
property atmel {open_collector= en2};
!en2 = (!'b'1 & !rtf
    # 'b'1 & !sam_low);
en2.oe = (!'b'1 & !rtf
    # 'b'1 & !sam_low);
!shift_ok = (ac0_ne_ac1 & n_t_18x
          # modeb & !last_step_l & norms_or_shl_or_asr_or_lsr
          # ac2_mq11_0 & !n_t_28x);
property atmel {open_collector= left_low};
!left_low = (shift_ok & !lp_shl_or_norms_rp_and_eae_on_low)
         # (!'b'1 & !last_dvi_low
         # div_12_l & !normal_dvi_low);
left_low.oe = (shift_ok & !lp_shl_or_norms_rp_and_eae_on_low)
         # (!'b'1 & !last_dvi_low
         # div_12_l & !normal_dvi_low);
property atmel {open_collector= link_data};
!link_data = (!rom_11_l & bac0)
             # (!eae_on & dvi)
             # (n_t_49x);
link_data.oe = (!rom_11_l & bac0)
             # (!eae_on & dvi)
             # (n_t_49x);
property atmel {open_collector= link_load};
!link_load = (tp3 & !rom_17_l)
             # (n_t_44x & n_t_64x)
             # (n_t_64x & n_t_44x)
             # (!rom_17_l & tp3);
link_load.oe = (tp3 & !rom_17_l)
             # (n_t_44x & n_t_64x)
             # (n_t_64x & n_t_44x)
             # (!rom_17_l & tp3);
property atmel {open_collector= md_disable};
!md_disable = (!eir3 & !n_t_5x);
md_disable.oe = (!eir3 & !n_t_5x);
property atmel {open_collector= mq_data_low};
!mq_data_low = (!'b'1 & !lp_shl_or_norms_rp_and_eae_on_low
            # n_t_66x & !dvi_and_ts3);
mq_data_low.oe = (!'b'1 & !lp_shl_or_norms_rp_and_eae_on_low
            # n_t_66x & !dvi_and_ts3);
property atmel {open_collector= mq_to_bus_low};
!mq_to_bus_low = (!n_t_5x
              # 'b'1 & !n_t_33x);
mq_to_bus_low.oe = (!n_t_5x
              # 'b'1 & !n_t_33x);
!n_t_40x = (!data1 & !rtf
        # mq0_gt_ac0 & !sam_low)
        # (!'b'1 & !rtf
        # mq_ge_ac & !sam_low)
        # (!'b'1 & !muy_and_eae_on_low
        # !mq11_low & !lp_asr_or_lsr_rp_and_eae_on_low);
!n_t_43x = (tp3 & !rtf
        # tp3 & !sam_low)
        # (!'b'1 & !muy_and_eae_on_low
        # n_t_64x & !lp_asr_or_lsr_rp_and_eae_on_low);
!n_t_46x = (!n_t_33x)
        # (!'b'1 & !last_dvi_low
        # 'b'1 & !normal_dvi_low)
           # (last_dvi_low & eae_on);
!n_t_4x = (dvi & carry_out_low & n_t_84x)
          # (dcm_or_dpic_low & rom_15_l);
property atmel {open_collector= not_last_xfer};
!not_last_xfer = (n_t_69x & n_t_4x);
not_last_xfer.oe = (n_t_69x & n_t_4x);
property atmel {open_collector= restart};
!restart = (n_t_3x)
           # (n_t_3x);
restart.oe = (n_t_3x)
           # (n_t_3x);
property atmel {open_collector= right_low};
!right_low = (!muy_and_eae_on_low
          # shift_ok & !lp_asr_or_lsr_rp_and_eae_on_low);
right_low.oe = (!muy_and_eae_on_low
          # shift_ok & !lp_asr_or_lsr_rp_and_eae_on_low);
property atmel {open_collector= shl_ena_low};
!shl_ena_low = (shift_ok & !lp_shl_or_norms_rp_and_eae_on_low
            # 'b'1 & !dvi_and_ts3);
shl_ena_low.oe = (shift_ok & !lp_shl_or_norms_rp_and_eae_on_low
            # 'b'1 & !dvi_and_ts3);
property atmel {open_collector= skip};
!skip = (ac2_8_0 & ac_0 & !rom_24_l)
        # (next_loc)
        # (n_t_13x & !sgt_low);
skip.oe = (ac2_8_0 & ac_0 & !rom_24_l)
        # (next_loc)
        # (n_t_13x & !sgt_low);