Atmel ATF1508AS Fitter Version 1.8.7.8 ,running Wed Oct 09 23:46:24 2019 fit1508 C:\USERS\VRS\DOCUMENTS\EAGLE\PROJECTS\DEC\MXXX\M8341\PLD\M8341D.tt2 -CUPL -dev P1508Q100 -JTAG ON ****** Initial fitting strategy and property ****** Pla_in_file = M8341D.tt2 Pla_out_file = M8341D.tt3 Jedec_file = M8341D.jed Vector_file = M8341D.tmv verilog_file = M8341D.vt Time_file = Log_file = M8341D.fit err_file = Device_name = PQFP100 Module_name = Package_type = PQFP Preassign_file = Property_file = Sleep_mode = Preassignment = Security_mode = OFF Pin_keep_mode = ON Dedicated_input_clock = Dedicated_input_reset = Dedicated_input_oe = supporter = CUPL optimize = ON Soft_buffer = Xor_synthesis = OFF Foldback_logic = on Expander = Cascade_logic = OFF Dedicated_input = Output_fast = OFF ******************************* Power down pin 1 = OFF Power down pin 2 = OFF power_reset = OFF JTAG = ON TDI pullup = OFF TMS pullup = OFF MC_power = OFF Open_collector = ac_load_low, ac_to_bus_low, ac_to_mq_ena_low, ad_lk_low, c0, carry_in, data1, data_f, data_t, en0, en1, en2, left_low, link_data, link_load, md_disable, mq_data_low, mq_to_bus_low, not_last_xfer, restart, right_low, shl_ena_low, skip, ITD0 = ON ITD1 = ON ITD2 = ON Fast_inlatch = off ******************************* --------------------------------------------------------- Fitter_Pass 1, Preassign = KEEP, LOGIC_DOUBLING : OFF ... ## ERROR : Bad user pin assignement : 110 ## ERROR : Bad user pin assignement --------------------------------------------------------- Fitter_Pass 2, Preassign = KEEP, NODE ASSIGN : OFF ... Performing global Output Enable pin assignments ... Performing global pin assignments ... -------------------------------------- Final global control pins assignment (if applicable)... ------------------------------------------------------- clock assigned to pin 92 Performing input pin pre-assignments ... ------------------------------------ clock assigned to pin 92 rom_15_l assigned to pin 89 rom_11_l assigned to pin 91 dad_or_dst_low assigned to pin 90 eae_on.C equation needs patching. mq_to_bus_low.OE equation needs patching. en2.OE equation needs patching. right_low.OE equation needs patching. shl_ena_low.OE equation needs patching. link_load.OE equation needs patching. n_t_13x.C equation needs patching. en1.OE equation needs patching. left_low.OE equation needs patching. ad_lk_low.OE equation needs patching. link_data.OE equation needs patching. mq_data_low.OE equation needs patching. data_f.OE equation needs patching. restart.OE equation needs patching. en0.OE equation needs patching. ac_load_low.OE equation needs patching. skip.OE equation needs patching. carry_in.OE equation needs patching. 18 control equtions need patching Attempt to place floating signals ... ------------------------------------ msir_disable is placed at pin 4 (MC 1) XXL_300 is placed at feedback node 601 (MC 1) XXL_312 is placed at feedback node 602 (MC 2) fetch is placed at pin 3 (MC 3) XXL_286 is placed at feedback node 603 (MC 3) FB_320 is placed at foldback expander node 303 (MC 3) eae_on.C is placed at feedback node 604 (MC 4) n_t_44x is placed at foldback expander node 304 (MC 4) e is placed at pin 2 (MC 5) mq_to_bus_low.OE is placed at feedback node 605 (MC 5) mq_ge_ac is placed at foldback expander node 305 (MC 5) n_t_77x is placed at feedback node 606 (MC 6) sam_low is placed at foldback expander node 306 (MC 6) en2.OE is placed at feedback node 607 (MC 7) normal_dvi_low is placed at foldback expander node 307 (MC 7) gtf_or_ind is placed at pin 100 (MC 8) right_low.OE is placed at feedback node 608 (MC 8) muy_and_eae_on_low is placed at foldback expander node 308 (MC 8) modeb is placed at pin 99 (MC 9) n_t_34x is placed at feedback node 609 (MC 9) lp_shl_or_norms_rp_and_eae_on_lo is placed at foldback expander node 309 (MC 9) shl_ena_low.OE is placed at feedback node 610 (MC 10) lp_asr_or_lsr_rp_and_eae_on_low is placed at foldback expander node 310 (MC 10) rom_14_l is placed at pin 98 (MC 11) link_load.OE is placed at feedback node 611 (MC 11) last_dvi_low is placed at foldback expander node 311 (MC 11) XXL_288 is placed at feedback node 612 (MC 12) dcm_or_dpic_low is placed at foldback expander node 312 (MC 12) rom_12_l is placed at pin 96 (MC 13) n_t_13x.C is placed at feedback node 613 (MC 13) mq0_gt_ac0 is placed at foldback expander node 313 (MC 13) last_step_l is placed at pin 95 (MC 14) n_t_70x is placed at foldback expander node 314 (MC 14) n_t_13x is placed at feedback node 615 (MC 15) n_t_5x is placed at foldback expander node 315 (MC 15) rom_17_l is placed at pin 94 (MC 16) en1.OE is placed at feedback node 616 (MC 16) n_t_33x is placed at foldback expander node 316 (MC 16) ts2 is placed at pin 16 (MC 17) not_last_xfer is placed at pin 15 (MC 19) ts3 is placed at pin 14 (MC 21) FB_320 is placed at foldback expander node 322 (MC 22) n_t_28x is placed at foldback expander node 323 (MC 23) ts4 is placed at pin 11 (MC 24) n_t_19x is placed at foldback expander node 324 (MC 24) init is placed at pin 10 (MC 25) n_t_27x is placed at foldback expander node 325 (MC 25) XXL_307 is placed at feedback node 626 (MC 26) n_t_18x is placed at foldback expander node 326 (MC 26) link_data is placed at pin 9 (MC 27) normal_dvi_low is placed at foldback expander node 327 (MC 27) left_low.OE is placed at feedback node 628 (MC 28) muy_and_eae_on_low is placed at foldback expander node 328 (MC 28) skip is placed at pin 8 (MC 29) last_dvi_low is placed at foldback expander node 329 (MC 29) link_load is placed at pin 7 (MC 30) n_t_5x is placed at foldback expander node 330 (MC 30) shift_ok is placed at feedback node 631 (MC 31) n_t_33x is placed at foldback expander node 331 (MC 31) TDI is placed at pin 6 (MC 32) XXL_295 is placed at feedback node 632 (MC 32) tp is placed at pin 25 (MC 37) data1 is placed at pin 24 (MC 38) link is placed at pin 23 (MC 40) tp1 is placed at pin 22 (MC 41) n_t_23x is placed at feedback node 642 (MC 42) c0 is placed at pin 21 (MC 43) ad_lk_low.OE is placed at feedback node 644 (MC 44) tp2 is placed at pin 19 (MC 45) link_data.OE is placed at feedback node 645 (MC 45) tp3 is placed at pin 18 (MC 46) XXL_290 is placed at feedback node 646 (MC 46) FB_320 is placed at foldback expander node 346 (MC 46) n_t_84x is placed at feedback node 647 (MC 47) FB_318 is placed at foldback expander node 347 (MC 47) TMS is placed at pin 17 (MC 48) XXL_292 is placed at feedback node 648 (MC 48) dcm_or_dpic_low is placed at foldback expander node 348 (MC 48) en1 is placed at pin 39 (MC 49) mq_load is placed at pin 38 (MC 51) carry_in is placed at pin 37 (MC 53) mq_to_bus_low is placed at pin 35 (MC 54) md_disable is placed at pin 34 (MC 56) en0 is placed at pin 33 (MC 57) mq_data_low.OE is placed at feedback node 658 (MC 58) ac_to_bus_low is placed at pin 32 (MC 59) XXL_264 is placed at feedback node 660 (MC 60) FB_320 is placed at foldback expander node 360 (MC 60) data_t is placed at pin 31 (MC 61) n_t_46x is placed at foldback expander node 361 (MC 61) shl_ena_low is placed at pin 30 (MC 62) normal_dvi_low is placed at foldback expander node 362 (MC 62) XXL_309 is placed at feedback node 663 (MC 63) last_dvi_low is placed at foldback expander node 363 (MC 63) en2 is placed at pin 29 (MC 64) n_t_33x is placed at foldback expander node 364 (MC 64) ac4_11_0 is placed at pin 42 (MC 65) data_f is placed at pin 46 (MC 70) n_t_65x is placed at feedback node 671 (MC 71) ac_0 is placed at pin 47 (MC 72) n_t_22x is placed at feedback node 672 (MC 72) carry_out_low is placed at pin 48 (MC 73) XXL_280 is placed at feedback node 673 (MC 73) XXL_284 is placed at feedback node 674 (MC 74) ac_to_mq_ena_low is placed at pin 49 (MC 75) data_f.OE is placed at feedback node 676 (MC 76) FB_320 is placed at foldback expander node 376 (MC 76) ac_load_low is placed at pin 50 (MC 77) n_t_82x is placed at foldback expander node 377 (MC 77) ac1 is placed at pin 51 (MC 78) n_t_42x is placed at feedback node 678 (MC 78) n_t_76x is placed at foldback expander node 378 (MC 78) XXL_302 is placed at feedback node 679 (MC 79) n_t_5x is placed at foldback expander node 379 (MC 79) ad_lk_low is placed at pin 52 (MC 80) n_t_33x is placed at foldback expander node 380 (MC 80) ac0 is placed at pin 54 (MC 81) ad0_low is placed at pin 55 (MC 83) mq_0 is placed at pin 56 (MC 85) restart.OE is placed at feedback node 685 (MC 85) ac0_ne_ac1 is placed at pin 57 (MC 86) n_t_92x is placed at feedback node 686 (MC 86) en2_PIN is placed at feedback node 687 (MC 87) ac2_8_0 is placed at pin 59 (MC 89) n_t_4x is placed at feedback node 689 (MC 89) XXL_268 is placed at feedback node 690 (MC 90) left_low is placed at pin 60 (MC 91) eae_on is placed at feedback node 692 (MC 92) FB_320 is placed at foldback expander node 392 (MC 92) right_low is placed at pin 62 (MC 93) FB_319 is placed at foldback expander node 393 (MC 93) mq_data_low is placed at pin 63 (MC 94) sam_low is placed at foldback expander node 394 (MC 94) XXL_266 is placed at feedback node 695 (MC 95) dcm_or_dpic_low is placed at foldback expander node 395 (MC 95) TCK is placed at pin 64 (MC 96) n_t_69x is placed at feedback node 696 (MC 96) n_t_38x is placed at foldback expander node 396 (MC 96) mq11_low is placed at pin 65 (MC 97) mq0_low is placed at pin 66 (MC 99) mq10_low is placed at pin 67 (MC 101) sc_0_low is placed at pin 70 (MC 104) n_t_66x is placed at feedback node 704 (MC 104) eir2 is placed at pin 71 (MC 105) en0.OE is placed at feedback node 705 (MC 105) XXL_297 is placed at feedback node 706 (MC 106) rtf is placed at pin 72 (MC 107) ac_load_low.OE is placed at feedback node 707 (MC 107) skip.OE is placed at feedback node 708 (MC 108) eir3 is placed at pin 73 (MC 109) carry_in.OE is placed at feedback node 709 (MC 109) next_loc is placed at pin 74 (MC 110) XXL_262 is placed at feedback node 710 (MC 110) XXL_305 is placed at feedback node 711 (MC 111) TDO is placed at pin 75 (MC 112) ac_load_low_PIN is placed at feedback node 712 (MC 112) div_12_l is placed at pin 77 (MC 113) rom_24_l is placed at pin 78 (MC 115) rom_13_l is placed at pin 79 (MC 117) incr_sc is placed at pin 80 (MC 118) rom_22_l is placed at pin 81 (MC 120) restart is placed at pin 82 (MC 121) data1_PIN is placed at feedback node 722 (MC 122) dad_or_dst is placed at pin 83 (MC 123) XXL_270 is placed at feedback node 723 (MC 123) n_t_24x is placed at feedback node 724 (MC 124) tp2_d is placed at pin 85 (MC 125) sgt_low is placed at pin 86 (MC 126) n_t_85x is placed at feedback node 726 (MC 126) n_t_60x is placed at feedback node 727 (MC 127) l g a d t s a f r r t r r r d r _ o o _ o o o s _ r o o m m s m m m g o e m r m _ _ t _ c _ _ t t r s _ _ o 1 1 e 1 l 1 1 _ p _ t 2 i d 4 G 2 p 7 V o 1 5 G l 2 V d a 2 n e _ N _ _ _ C c _ _ N o _ C s r _ d b l D l l l C k l l D w d C t t l -------------------------------------------- / 100 98 96 94 92 90 88 86 84 82 \ / 99 97 95 93 91 89 87 85 83 81 \ | 1 (*) 80 | incr_sc e | 2 79 | rom_13_l fetch | 3 78 | rom_24_l msir_disable | 4 77 | div_12_l VCC | 5 76 | GND TDI | 6 75 | TDO link_load | 7 74 | next_loc skip | 8 73 | eir3 link_data | 9 72 | rtf init | 10 71 | eir2 ts4 | 11 70 | sc_0_low | 12 69 | GND | 13 68 | VCC ts3 | 14 67 | mq10_low not_last_xfer | 15 66 | mq0_low ts2 | 16 ATF1508 65 | mq11_low TMS | 17 100-Lead PQFP 64 | TCK tp3 | 18 63 | mq_data_low tp2 | 19 62 | right_low VCC | 20 61 | GND c0 | 21 60 | left_low tp1 | 22 59 | ac2_8_0 link | 23 58 | data1 | 24 57 | ac0_ne_ac1 tp | 25 56 | mq_0 | 26 55 | ad0_low | 27 54 | ac0 GND | 28 53 | VCC en2 | 29 52 | ad_lk_low shl_ena_low | 30 51 | ac1 \ 32 34 36 38 40 42 44 46 48 50 / \ 31 33 35 37 39 41 43 45 47 49 / -------------------------------------------- d a e m m V c m e G V a G d a c a a a c n d q C a q n N C c N a c a c c t _ 0 _ _ C r _ 1 D C 4 D t _ r _ _ a t d t r l _ a 0 r t l _ o i o y o 1 _ y o o t _ s _ _ a 1 f _ _ a b a b i d _ o m d u b u n 0 u q _ s l s t _ l _ e _ _ e o l l l n w o o o a w w w _ l VCC = Supply Voltage pin which must be connected to (5.0V or 3.0V) GND = GND pin which must be connected to ground TMS,TDI,TDO,TDI = JTAG pins which must reserved for the JTAG interface NC = Unused I/O pins which must be unconnected on the board Universal-Interconnect-Multiplexer assignments ------------------------------------------------ FanIn assignment for block A [25] { ad0_low,ac0,ac_to_mq_ena_low, eir3,eae_on, last_step_l, mq0_low,mq11_low,modeb, n_t_23x,n_t_77x,n_t_13x.C,n_t_24x,n_t_22x,n_t_13x.C, rom_12_l,rom_14_l,rom_22_l,rtf,rom_17_l,rom_15_l, shift_ok, ts3,tp3,ts2, } Multiplexer assignment for block A rom_12_l (MC12 P) : MUX 0 Ref (A13p) ad0_low (MC23 P) : MUX 1 Ref (F83p) ac0 (MC22 P) : MUX 3 Ref (F81p) eir3 (MC20 P) : MUX 4 Ref (G109p) mq0_low (MC18 P) : MUX 5 Ref (G99p) ac_to_mq_ena_low (MC7 P) : MUX 6 Ref (E75p) mq11_low (MC17 P) : MUX 7 Ref (G97p) modeb (MC24 P) : MUX 8 Ref (A9p) n_t_23x (MC5 FB) : MUX 9 Ref (C42fb) rom_14_l (MC13 P) : MUX 10 Ref (A11p) ts3 (MC11 P) : MUX 11 Ref (B21p) tp3 (MC16 P) : MUX 12 Ref (C46p) ts2 (MC19 P) : MUX 13 Ref (B17p) n_t_77x (MC1 FB) : MUX 14 Ref (A6fb) eae_on (MC8 FB) : MUX 17 Ref (F92fb) rom_22_l (MC14 P) : MUX 19 Ref (H120p) last_step_l (MC15 P) : MUX 22 Ref (A14p) link_load.OE (MC2 FB) : MUX 27 Ref (A11fb) rtf (MC21 P) : MUX 28 Ref (G107p) n_t_24x (MC9 FB) : MUX 29 Ref (H124fb) n_t_22x (MC6 FB) : MUX 30 Ref (E72fb) rom_17_l (MC25 P) : MUX 32 Ref (A16p) rom_15_l (MC10 FB) : MUX 35 Ref (GCLK) n_t_13x.C (MC3 FB) : MUX 37 Ref (A13fb) shift_ok (MC4 FB) : MUX 39 Ref (B31fb) FanIn assignment for block B [25] { XXL_288,XXL_262,XXL_290,XXL_270, ac0_ne_ac1,ac_to_mq_ena_low,ac2_8_0,ac1,ac4_11_0, div_12_l,dad_or_dst, en1.OE,eir3,eae_on, fetch, last_step_l, mq11_low,modeb,mq_0, rom_12_l,rom_14_l,rom_15_l, shift_ok, ts3,ts2, } Multiplexer assignment for block B rom_12_l (MC11 P) : MUX 0 Ref (A13p) ac0_ne_ac1 (MC20 P) : MUX 1 Ref (F86p) en1.OE (MC2 FB) : MUX 3 Ref (A16fb) eir3 (MC16 P) : MUX 4 Ref (G109p) div_12_l (MC19 P) : MUX 5 Ref (H113p) ac_to_mq_ena_low (MC5 P) : MUX 6 Ref (E75p) mq11_low (MC14 P) : MUX 9 Ref (G97p) ac2_8_0 (MC18 P) : MUX 10 Ref (F89p) ts3 (MC10 P) : MUX 11 Ref (B21p) ac1 (MC23 P) : MUX 12 Ref (E78p) ts2 (MC15 P) : MUX 15 Ref (B17p) shift_ok (MC3 FB) : MUX 17 Ref (B31fb) modeb (MC17 P) : MUX 18 Ref (A9p) XXL_288 (MC1 FB) : MUX 19 Ref (A12fb) XXL_262 (MC7 FB) : MUX 21 Ref (G110fb) last_step_l (MC13 P) : MUX 22 Ref (A14p) rom_14_l (MC12 P) : MUX 24 Ref (A11p) XXL_290 (MC4 FB) : MUX 25 Ref (C46fb) XXL_270 (MC8 FB) : MUX 27 Ref (H123fb) fetch (MC22 P) : MUX 29 Ref (A3p) mq_0 (MC25 P) : MUX 31 Ref (F85p) dad_or_dst (MC21 P) : MUX 32 Ref (H123p) rom_15_l (MC9 FB) : MUX 35 Ref (GCLK) eae_on (MC6 FB) : MUX 37 Ref (F92fb) ac4_11_0 (MC24 P) : MUX 39 Ref (E65p) FanIn assignment for block C [25] { XXL_307, ac0, carry_out_low, div_12_l,data1_PIN, eae_on, init, left_low.OE,last_step_l,left_low.OE, mq0_low, n_t_22x,n_t_34x,n_t_24x,n_t_4x,n_t_23x, rom_12_l,rom_14_l,rom_13_l,rom_22_l,rom_15_l,rom_11_l, shift_ok, ts3,tp3, } Multiplexer assignment for block C carry_out_low (MC20 P) : MUX 0 Ref (E73p) mq0_low (MC19 P) : MUX 1 Ref (G99p) ac0 (MC21 P) : MUX 3 Ref (F81p) n_t_22x (MC7 FB) : MUX 4 Ref (E72fb) div_12_l (MC22 P) : MUX 5 Ref (H113p) rom_12_l (MC14 P) : MUX 6 Ref (A13p) rom_14_l (MC15 P) : MUX 10 Ref (A11p) ts3 (MC13 P) : MUX 11 Ref (B21p) tp3 (MC18 P) : MUX 12 Ref (C46p) rom_13_l (MC24 P) : MUX 13 Ref (H117p) n_t_34x (MC1 FB) : MUX 15 Ref (A9fb) link_data.OE (MC6 FB) : MUX 17 Ref (C45fb) rom_22_l (MC16 P) : MUX 19 Ref (H120p) XXL_307 (MC2 FB) : MUX 21 Ref (B26fb) last_step_l (MC17 P) : MUX 22 Ref (A14p) data1_PIN (MC10 FB) : MUX 23 Ref (H122fb) n_t_24x (MC11 FB) : MUX 25 Ref (H124fb) left_low.OE (MC3 FB) : MUX 27 Ref (B28fb) n_t_4x (MC8 FB) : MUX 29 Ref (F89fb) init (MC23 P) : MUX 30 Ref (B25p) shift_ok (MC4 FB) : MUX 31 Ref (B31fb) n_t_23x (MC5 FB) : MUX 33 Ref (C42fb) rom_15_l (MC12 FB) : MUX 35 Ref (GCLK) rom_11_l (MC25 FB) : MUX 36 Ref (GCLR) eae_on (MC9 FB) : MUX 37 Ref (F92fb) FanIn assignment for block D [25] { XXL_300,XXL_295,XXL_286,XXL_264,XXL_297,XXL_305,XXL_280,XXL_312, ac_to_mq_ena_low,ad_lk_low.OE,ad_lk_low.OE, en2_PIN,eae_on, last_step_l, mq0_low, n_t_22x,n_t_23x,n_t_34x,n_t_66x, rom_15_l,rom_14_l,rom_12_l, shift_ok, ts3,tp3, } Multiplexer assignment for block D XXL_300 (MC1 FB) : MUX 2 Ref (A1fb) shift_ok (MC6 FB) : MUX 3 Ref (B31fb) n_t_22x (MC11 FB) : MUX 4 Ref (E72fb) XXL_295 (MC7 FB) : MUX 7 Ref (B32fb) last_step_l (MC23 P) : MUX 8 Ref (A14p) n_t_23x (MC8 FB) : MUX 9 Ref (C42fb) ac_to_mq_ena_low (MC13 P) : MUX 10 Ref (E75p) ts3 (MC20 P) : MUX 11 Ref (B21p) shl_ena_low.OE (MC5 FB) : MUX 13 Ref (A10fb) en2_PIN (MC14 FB) : MUX 14 Ref (F87fb) n_t_34x (MC4 FB) : MUX 15 Ref (A9fb) n_t_66x (MC16 FB) : MUX 16 Ref (G104fb) rom_15_l (MC19 FB) : MUX 17 Ref (GCLK) XXL_286 (MC3 FB) : MUX 18 Ref (A3fb) mq0_low (MC25 P) : MUX 23 Ref (G99p) rom_14_l (MC22 P) : MUX 24 Ref (A11p) tp3 (MC24 P) : MUX 26 Ref (C46p) XXL_264 (MC10 FB) : MUX 27 Ref (D60fb) rom_12_l (MC21 P) : MUX 28 Ref (A13p) ad_lk_low.OE (MC9 FB) : MUX 29 Ref (C44fb) eae_on (MC15 FB) : MUX 31 Ref (F92fb) XXL_297 (MC17 FB) : MUX 33 Ref (G106fb) XXL_305 (MC18 FB) : MUX 35 Ref (G111fb) XXL_280 (MC12 FB) : MUX 37 Ref (E73fb) XXL_312 (MC2 FB) : MUX 38 Ref (A2fb) FanIn assignment for block E [25] { XXL_309,XXL_302, ad0_low,ac_load_low_PIN,ac_to_mq_ena_low, dad_or_dst_low, eir2,e,eae_on, last_step_l, mq10_low,mq_to_bus_low.OE,mq_to_bus_low.OE,mq_to_bus_low.OE, n_t_66x,n_t_65x,n_t_85x, rom_12_l,rom_22_l,rom_14_l,rom_15_l, sc_0_low, tp,ts2,ts3, } Multiplexer assignment for block E rom_12_l (MC15 P) : MUX 0 Ref (A13p) tp (MC2 P) : MUX 1 Ref (C37p) eir2 (MC23 P) : MUX 2 Ref (G105p) dad_or_dst_low (MC24 FB) : MUX 3 Ref (OE1) XXL_309 (MC4 FB) : MUX 5 Ref (D63fb) n_t_66x (MC10 FB) : MUX 6 Ref (G104fb) mq10_low (MC20 P) : MUX 7 Ref (G101p) last_step_l (MC18 P) : MUX 8 Ref (A14p) rom_22_l (MC17 P) : MUX 9 Ref (H120p) XXL_302 (MC8 FB) : MUX 11 Ref (E79fb) e (MC25 P) : MUX 13 Ref (A5p) ts2 (MC19 P) : MUX 15 Ref (B17p) n_t_65x (MC5 FB) : MUX 18 Ref (E71fb) n_t_85x (MC12 FB) : MUX 19 Ref (H126fb) ad0_low (MC21 P) : MUX 21 Ref (F83p) eae_on (MC9 FB) : MUX 23 Ref (F92fb) data_f.OE (MC7 FB) : MUX 25 Ref (E76fb) ac_load_low_PIN (MC11 FB) : MUX 27 Ref (G112fb) rom_14_l (MC16 P) : MUX 28 Ref (A11p) mq_data_low.OE (MC3 FB) : MUX 29 Ref (D58fb) ts3 (MC14 P) : MUX 31 Ref (B21p) ac_to_mq_ena_low (MC6 P) : MUX 32 Ref (E75p) sc_0_low (MC22 P) : MUX 35 Ref (G104p) mq_to_bus_low.OE (MC1 FB) : MUX 38 Ref (A5fb) rom_15_l (MC13 FB) : MUX 39 Ref (GCLK) FanIn assignment for block F [25] { XXL_292,XXL_266,XXL_284, carry_out_low, eae_on, init, mq10_low, n_t_24x,n_t_42x,n_t_84x,n_t_22x, restart.OE,rom_12_l,rom_14_l,rtf,restart.OE,rom_22_l,restart.OE,rom_15_l,restart.OE, sc_0_low,shift_ok, tp1,tp2_d,ts3, } Multiplexer assignment for block F tp1 (MC25 P) : MUX 2 Ref (C41p) n_t_24x (MC13 FB) : MUX 3 Ref (H124fb) right_low.OE (MC3 FB) : MUX 4 Ref (A8fb) n_t_42x (MC9 FB) : MUX 5 Ref (E78fb) rom_12_l (MC17 P) : MUX 6 Ref (A13p) tp2_d (MC14 P) : MUX 8 Ref (H125p) rom_14_l (MC18 P) : MUX 10 Ref (A11p) ts3 (MC16 P) : MUX 11 Ref (B21p) rtf (MC22 P) : MUX 12 Ref (G107p) init (MC23 P) : MUX 14 Ref (B25p) n_t_84x (MC5 FB) : MUX 15 Ref (C47fb) sc_0_low (MC24 P) : MUX 17 Ref (G104p) carry_out_low (MC20 P) : MUX 20 Ref (E73p) XXL_292 (MC6 FB) : MUX 21 Ref (C48fb) XXL_266 (MC12 FB) : MUX 23 Ref (F95fb) en2.OE (MC2 FB) : MUX 24 Ref (A7fb) rom_22_l (MC19 P) : MUX 27 Ref (H120p) mq10_low (MC21 P) : MUX 29 Ref (G101p) shift_ok (MC4 FB) : MUX 31 Ref (B31fb) eae_on.C (MC1 FB) : MUX 32 Ref (A4fb) XXL_284 (MC8 FB) : MUX 33 Ref (E74fb) rom_15_l (MC15 FB) : MUX 35 Ref (GCLK) n_t_22x (MC7 FB) : MUX 36 Ref (E72fb) eae_on (MC11 FB) : MUX 37 Ref (F92fb) restart.OE (MC10 FB) : MUX 38 Ref (F85fb) FanIn assignment for block G [25] { „©,ac_0,ac2_8_0,„©,„©,ac_to_mq_ena_low,„©, carry_out_low, eae_on,en2_PIN, link, msir_disable, n_t_22x,n_t_23x,next_loc,n_t_92x,n_t_13x,n_t_4x, rom_22_l,rom_13_l,rom_24_l, sgt_low, ts4,ts3,tp3, } Multiplexer assignment for block G rom_22_l (MC14 P) : MUX 1 Ref (H120p) link (MC19 P) : MUX 3 Ref (C40p) n_t_22x (MC3 FB) : MUX 4 Ref (E72fb) carry_in.OE (MC12 FB) : MUX 5 Ref (G109fb) sgt_low (MC23 P) : MUX 6 Ref (H126p) ac_0 (MC24 P) : MUX 7 Ref (E72p) ts4 (MC22 P) : MUX 9 Ref (B24p) ac2_8_0 (MC17 P) : MUX 10 Ref (F89p) ts3 (MC13 P) : MUX 11 Ref (B21p) tp3 (MC15 P) : MUX 12 Ref (C46p) rom_13_l (MC18 P) : MUX 13 Ref (H117p) n_t_23x (MC2 FB) : MUX 15 Ref (C42fb) eae_on (MC8 FB) : MUX 17 Ref (F92fb) en2_PIN (MC6 FB) : MUX 22 Ref (F87fb) en0.OE (MC9 FB) : MUX 23 Ref (G105fb) next_loc (MC20 P) : MUX 26 Ref (G110p) rom_24_l (MC25 P) : MUX 27 Ref (H115p) n_t_92x (MC5 FB) : MUX 30 Ref (F86fb) skip.OE (MC11 FB) : MUX 31 Ref (G108fb) ac_to_mq_ena_low (MC4 P) : MUX 32 Ref (E75p) msir_disable (MC21 P) : MUX 33 Ref (A1p) carry_out_low (MC16 P) : MUX 34 Ref (E73p) ac_load_low.OE (MC10 FB) : MUX 35 Ref (G107fb) n_t_13x (MC1 FB) : MUX 37 Ref (A15fb) n_t_4x (MC7 FB) : MUX 39 Ref (F89fb) FanIn assignment for block H [16] { XXL_268, eir3,eir2, gtf_or_ind, mq10_low,mq11_low, n_t_4x,n_t_13x,n_t_23x,n_t_22x,n_t_69x,n_t_60x, rom_15_l, shift_ok, tp2,tp2_d, } Multiplexer assignment for block H n_t_4x (MC5 FB) : MUX 1 Ref (F89fb) gtf_or_ind (MC16 P) : MUX 3 Ref (A8p) tp2 (MC15 P) : MUX 4 Ref (C45p) n_t_13x (MC1 FB) : MUX 5 Ref (A15fb) eir3 (MC12 P) : MUX 6 Ref (G109p) mq10_low (MC13 P) : MUX 7 Ref (G101p) n_t_23x (MC3 FB) : MUX 9 Ref (C42fb) n_t_22x (MC4 FB) : MUX 12 Ref (E72fb) rom_15_l (MC10 FB) : MUX 17 Ref (GCLK) tp2_d (MC8 P) : MUX 22 Ref (H125p) eir2 (MC14 P) : MUX 24 Ref (G105p) n_t_69x (MC7 FB) : MUX 25 Ref (F96fb) mq11_low (MC11 P) : MUX 27 Ref (G97p) n_t_60x (MC9 FB) : MUX 29 Ref (H127fb) shift_ok (MC2 FB) : MUX 31 Ref (B31fb) XXL_268 (MC6 FB) : MUX 37 Ref (F90fb) Creating JEDEC file C:\USERS\VRS\DOCUMENTS\EAGLE\PROJECTS\DEC\MXXX\M8341\PLD\M8341D.jed ... PQFP100 programmed logic: ----------------------------------- XXL_312.TH = (!rom_15_l & !ts3); !ac_to_mq_ena_low = (!dad_or_dst_low & !e); data1_PIN.TH = (gtf_or_ind & n_t_13x.Q); eae_on.D = !n_t_84x.Q; n_t_23x.D = !n_t_22x.Q; n_t_24x = ((!eir2 & eir3) # (eir2 & !eir3)); n_t_42x.D = !ad0_low; !n_t_33x = (!ac_to_mq_ena_low.PIN & !ts3); !n_t_38x = (sc_0_low & mq10_low); !n_t_5x = (!ac_to_mq_ena_low.PIN & !ts2); n_t_60x.D = 1; !n_t_70x = (eae_on.Q & mq11_low); n_t_85x = ((!mq10_low & !mq11_low) # (mq10_low & mq11_low)); !n_t_76x = (eae_on.Q & rom_12_l & tp.Q); tp.D = !n_t_23x.Q; XXL_262.TH = ((n_t_13x.Q & !sgt_low) # (ac2_8_0 & ac_0 & !rom_24_l) # next_loc); tp2_d.D = !n_t_60x.Q; skip = !XXL_262.PIN; right_low = !XXL_266.PIN; shl_ena_low = !XXL_264.PIN; restart = !XXL_268.PIN; md_disable = !XXL_286.PIN; not_last_xfer = !XXL_270.PIN; mq_to_bus_low = !XXL_280.PIN; mq_data_low = !XXL_284.PIN; link_data = !XXL_290.PIN; left_low = !XXL_292.PIN; link_load = !XXL_288.PIN; en2 = !en2_PIN.PIN; en1 = !XXL_295.PIN; carry_in = !XXL_305.PIN; data_t = !XXL_300.PIN; en0 = !XXL_297.PIN; data_f = !XXL_302.PIN; data1 = !data1_PIN.PIN; ad_lk_low = !XXL_309.PIN; c0 = !XXL_307.PIN; ac_to_bus_low = !XXL_312.PIN; ac_load_low = !ac_load_low_PIN.PIN; !mq0_gt_ac0 = (ac0 & mq0_low); n_t_65x.D = (!rom_12_l & eae_on.Q & tp.Q); n_t_77x = ((ac0 & !mq0_low) # (!ac0 & mq0_low)); XXL_268.TH = ((eae_on.Q & !n_t_84x.Q) # (!eae_on.Q & n_t_84x.Q)); !dcm_or_dpic_low = (!rom_22_l & n_t_24x); XXL_305.TH = ((!ts3 & !eae_on.Q & !rom_22_l) # (!ts3 & !link & !rom_13_l) # (next_loc & msir_disable & !ts4)); XXL_300.TH = (!eir3 & !ac_to_mq_ena_low.PIN & !ts2); !last_dvi_low = (!last_step_l & !ts3 & !FB_320); XXL_297.TH = (!en2_PIN.PIN # (next_loc & msir_disable & !ts4)); XXL_290.TH = ((ac0 & !rom_11_l) # (!eae_on.Q & !FB_320) # (!carry_out_low & !rom_13_l)); !lp_asr_or_lsr_rp_and_eae_on_low = (rom_12_l & rom_14_l & eae_on.Q & !rom_15_l); !lp_shl_or_norms_rp_and_eae_on_lo = (rom_12_l & !rom_14_l & eae_on.Q & !rom_15_l); XXL_286.TH = (!eir3 & !ac_to_mq_ena_low.PIN & !ts2); !muy_and_eae_on_low = (!rom_12_l & rom_14_l & eae_on.Q & !rom_15_l); !XXL_280.TH = (n_t_33x & n_t_5x); n_t_34x = ((mq0_low & n_t_70x) # (!mq0_low & eae_on.Q & mq11_low)); !n_t_82x = (sc_0_low & n_t_85x); !normal_dvi_low = (last_step_l & !ts3 & !FB_320); n_t_92x = ((!n_t_42x.Q & sc_0_low & mq10_low) # (n_t_38x & n_t_42x.Q)); !sam_low = (!n_t_24x & !rom_22_l & !ts3); !mq_ge_ac = (ad0_low & n_t_77x); n_t_22x.D = (n_t_65x.Q & n_t_76x); XXL_309.TH = ((eae_on.Q & !mq0_low & rom_12_l & !rom_14_l & !rom_15_l) # (!ts3 & n_t_34x & !FB_320)); XXL_302.TH = ((last_step_l & !ts3 & n_t_82x & !FB_320) # (eir2 & !rom_22_l & !ts3) # (!last_step_l & !mq10_low & !ts3 & !FB_320)); !XXL_295.TH = ((mq11_low & n_t_5x & normal_dvi_low & !eir3 & last_dvi_low) # (mq11_low & n_t_5x & normal_dvi_low & n_t_33x & last_dvi_low) # (!mq11_low & muy_and_eae_on_low & n_t_5x & normal_dvi_low & !eir3) # (!mq11_low & muy_and_eae_on_low & n_t_5x & normal_dvi_low & n_t_33x)); !en2_PIN.TH = (rtf & sam_low); !n_t_18x = (!dad_or_dst & eae_on.Q & !fetch & rom_12_l & !rom_15_l); mq_load = ((!tp3 & n_t_22x.Q) # (!n_t_23x.Q & !tp3)); !n_t_27x = (!ac1 & eae_on.Q & !fetch & rom_12_l & !rom_15_l); n_t_4x = ((rom_15_l & dcm_or_dpic_low) # (carry_out_low & n_t_84x.Q & !FB_320)); !n_t_44x = (dcm_or_dpic_low & last_dvi_low & lp_shl_or_norms_rp_and_eae_on_lo); !n_t_46x = (normal_dvi_low & last_dvi_low & n_t_33x & !eae_on.Q); n_t_66x = ((carry_out_low & !n_t_92x) # (!carry_out_low & n_t_92x)); !n_t_69x.D = (rom_15_l & dcm_or_dpic_low); n_t_13x.D = ((rtf & muy_and_eae_on_low & sam_low & lp_asr_or_lsr_rp_and_eae_on_low) # (rtf & muy_and_eae_on_low & mq11_low & sam_low) # (rtf & mq0_gt_ac0 & mq_ge_ac & muy_and_eae_on_low & lp_asr_or_lsr_rp_and_eae_on_low) # (rtf & mq0_gt_ac0 & mq_ge_ac & muy_and_eae_on_low & mq11_low)); ac_load_low_PIN.TH = ((tp3 & !ac_to_mq_ena_low.PIN & !ts3) # (!n_t_22x.Q & n_t_23x.Q) # (tp3 & !n_t_4x)); XXL_284.TH = ((eae_on.Q & rom_12_l & !rom_14_l & !rom_15_l) # (!ts3 & n_t_66x & !FB_320)); !n_t_19x = (ac2_8_0 & !ac4_11_0 & mq_0 & !dad_or_dst & eae_on.Q & !fetch & rom_12_l & !rom_15_l & !ac1); !n_t_28x = (n_t_18x & n_t_27x); XXL_270.TH = (!n_t_4x & n_t_69x.Q); XXL_307.TH = (modeb & n_t_19x); shift_ok = ((!last_step_l & modeb & rom_12_l & !rom_15_l) # (rom_12_l & !rom_15_l & ac0_ne_ac1 & !dad_or_dst & eae_on.Q & !fetch) # (n_t_28x & ac2_8_0 & !ac4_11_0 & mq_0)); XXL_292.TH = ((div_12_l & !ts3 & !FB_320) # (eae_on.Q & rom_12_l & !rom_14_l & !rom_15_l & !shift_ok) # (!last_step_l & !ts3 & !FB_320)); XXL_266.TH = ((!rom_12_l & rom_14_l & eae_on.Q & !rom_15_l) # (!shift_ok & rom_14_l & eae_on.Q & !rom_15_l)); XXL_264.TH = ((eae_on.Q & rom_12_l & !rom_14_l & !rom_15_l & !shift_ok) # (!ts3 & !FB_320)); !n_t_84x.D = (last_step_l & dcm_or_dpic_low & !shift_ok); !incr_sc = (!rom_15_l & !shift_ok & !n_t_22x.Q & n_t_23x.Q); XXL_288.TH = ((n_t_44x & !shift_ok & !n_t_22x.Q & n_t_23x.Q) # (!rom_17_l & tp3)); !FB_318 = (!n_t_4x & tp3); !FB_319 = (!n_t_22x.Q & !tp1); !FB_320 = (!rom_12_l & !rom_14_l); XXL_312.OE = (!rom_15_l & !ts3); ac_to_mq_ena_low.OE = !ac_to_mq_ena_low.PIN; data1_PIN.OE = (gtf_or_ind & n_t_13x.Q); eae_on.C = ((!tp3 & n_t_22x.Q) # (!n_t_23x.Q & !tp3)); eae_on.AR = !init; eae_on.AP = 1; n_t_23x.C = !clock; n_t_23x.AR = 1; n_t_23x.AP = 1; n_t_42x.C = !ac_load_low_PIN.PIN; n_t_42x.AR = 1; n_t_42x.AP = FB_320; n_t_60x.C = !tp2; n_t_60x.AR = !tp2_d.Q; n_t_60x.AP = 1; tp.C = !clock; tp.AR = 1; tp.AP = eae_on.Q; XXL_262.OE = ((n_t_13x.Q & !sgt_low) # (ac2_8_0 & ac_0 & !rom_24_l) # next_loc); tp2_d.C = !clock; tp2_d.AP = 1; n_t_65x.C = !clock; n_t_65x.AR = 1; n_t_65x.AP = 1; XXL_268.OE = ((eae_on.Q & !n_t_84x.Q) # (!eae_on.Q & n_t_84x.Q)); XXL_305.OE = ((!ts3 & !eae_on.Q & !rom_22_l) # (!ts3 & !link & !rom_13_l) # (next_loc & msir_disable & !ts4)); XXL_300.OE = (!eir3 & !ac_to_mq_ena_low.PIN & !ts2); XXL_297.OE = (!en2_PIN.PIN # (next_loc & msir_disable & !ts4)); XXL_290.OE = ((ac0 & !rom_11_l) # (!eae_on.Q & !FB_320) # (!carry_out_low & !rom_13_l)); XXL_286.OE = (!eir3 & !ac_to_mq_ena_low.PIN & !ts2); XXL_280.OE = ((!ac_to_mq_ena_low.PIN & !ts2) # (!ac_to_mq_ena_low.PIN & !ts3)); n_t_22x.C = !clock; n_t_22x.AP = 1; XXL_309.OE = ((eae_on.Q & !mq0_low & rom_12_l & !rom_14_l & !rom_15_l) # (!ts3 & n_t_34x & !FB_320)); XXL_302.OE = ((last_step_l & !ts3 & n_t_82x & !FB_320) # (eir2 & !rom_22_l & !ts3) # (!last_step_l & !mq10_low & !ts3 & !FB_320)); !XXL_295.OE = ((mq11_low & n_t_5x & normal_dvi_low & !eir3 & last_dvi_low) # (mq11_low & n_t_5x & normal_dvi_low & n_t_33x & last_dvi_low) # (!mq11_low & muy_and_eae_on_low & n_t_5x & normal_dvi_low & !eir3) # (!mq11_low & muy_and_eae_on_low & n_t_5x & normal_dvi_low & n_t_33x)); en2_PIN.OE = ((!n_t_24x & !rom_22_l & !ts3) # !rtf); mq_load.OE = (!shift_ok & n_t_46x); n_t_69x.C = !tp2_d.Q; n_t_69x.AR = FB_319; n_t_69x.AP = 1; n_t_13x.C = ((tp3 & !n_t_24x & !rom_22_l & !ts3) # (rom_14_l & eae_on.Q & !rom_15_l & !shift_ok & !n_t_22x.Q & n_t_23x.Q) # (rom_14_l & eae_on.Q & !rom_15_l & !rom_12_l) # (tp3 & !rtf)); n_t_13x.AR = !modeb; n_t_13x.AP = 1; ac_load_low_PIN.OE = ((tp3 & !ac_to_mq_ena_low.PIN & !ts3) # (!n_t_22x.Q & n_t_23x.Q) # (tp3 & !n_t_4x)); XXL_284.OE = ((eae_on.Q & rom_12_l & !rom_14_l & !rom_15_l) # (!ts3 & n_t_66x & !FB_320)); XXL_270.OE = (!n_t_4x & n_t_69x.Q); XXL_307.OE = (modeb & n_t_19x); XXL_292.OE = ((div_12_l & !ts3 & !FB_320) # (eae_on.Q & rom_12_l & !rom_14_l & !rom_15_l & !shift_ok) # (!last_step_l & !ts3 & !FB_320)); XXL_266.OE = ((!rom_12_l & rom_14_l & eae_on.Q & !rom_15_l) # (!shift_ok & rom_14_l & eae_on.Q & !rom_15_l)); XXL_264.OE = ((eae_on.Q & rom_12_l & !rom_14_l & !rom_15_l & !shift_ok) # (!ts3 & !FB_320)); n_t_84x.C = (!n_t_22x.Q & n_t_23x.Q); n_t_84x.AR = FB_318; n_t_84x.AP = init; XXL_288.OE = ((n_t_44x & !shift_ok & !n_t_22x.Q & n_t_23x.Q) # (!rom_17_l & tp3)); PQFP100 Pin/Node Placement: ------------------------------------ Pin 2 = e; /* MC 5 */ Pin 3 = fetch; /* MC 3 */ Pin 4 = msir_disable; /* MC 1 */ Pin 6 = TDI; /* MC 32 */ Pin 7 = link_load; /* MC 30 */ Pin 8 = skip; /* MC 29 */ Pin 9 = link_data; /* MC 27 */ Pin 10 = init; /* MC 25 */ Pin 11 = ts4; /* MC 24 */ Pin 14 = ts3; /* MC 21 */ Pin 15 = not_last_xfer; /* MC 19 */ Pin 16 = ts2; /* MC 17 */ Pin 17 = TMS; /* MC 48 */ Pin 18 = tp3; /* MC 46 */ Pin 19 = tp2; /* MC 45 */ Pin 21 = c0; /* MC 43 */ Pin 22 = tp1; /* MC 41 */ Pin 23 = link; /* MC 40 */ Pin 24 = data1; /* MC 38 */ Pin 25 = tp; /* MC 37 */ Pin 29 = en2; /* MC 64 */ Pin 30 = shl_ena_low; /* MC 62 */ Pin 31 = data_t; /* MC 61 */ Pin 32 = ac_to_bus_low; /* MC 59 */ Pin 33 = en0; /* MC 57 */ Pin 34 = md_disable; /* MC 56 */ Pin 35 = mq_to_bus_low; /* MC 54 */ Pin 37 = carry_in; /* MC 53 */ Pin 38 = mq_load; /* MC 51 */ Pin 39 = en1; /* MC 49 */ Pin 42 = ac4_11_0; /* MC 65 */ Pin 46 = data_f; /* MC 70 */ Pin 47 = ac_0; /* MC 72 */ Pin 48 = carry_out_low; /* MC 73 */ Pin 49 = ac_to_mq_ena_low; /* MC 75 */ Pin 50 = ac_load_low; /* MC 77 */ Pin 51 = ac1; /* MC 78 */ Pin 52 = ad_lk_low; /* MC 80 */ Pin 54 = ac0; /* MC 81 */ Pin 55 = ad0_low; /* MC 83 */ Pin 56 = mq_0; /* MC 85 */ Pin 57 = ac0_ne_ac1; /* MC 86 */ Pin 59 = ac2_8_0; /* MC 89 */ Pin 60 = left_low; /* MC 91 */ Pin 62 = right_low; /* MC 93 */ Pin 63 = mq_data_low; /* MC 94 */ Pin 64 = TCK; /* MC 96 */ Pin 65 = mq11_low; /* MC 97 */ Pin 66 = mq0_low; /* MC 99 */ Pin 67 = mq10_low; /* MC 101 */ Pin 70 = sc_0_low; /* MC 104 */ Pin 71 = eir2; /* MC 105 */ Pin 72 = rtf; /* MC 107 */ Pin 73 = eir3; /* MC 109 */ Pin 74 = next_loc; /* MC 110 */ Pin 75 = TDO; /* MC 112 */ Pin 77 = div_12_l; /* MC 113 */ Pin 78 = rom_24_l; /* MC 115 */ Pin 79 = rom_13_l; /* MC 117 */ Pin 80 = incr_sc; /* MC 118 */ Pin 81 = rom_22_l; /* MC 120 */ Pin 82 = restart; /* MC 121 */ Pin 83 = dad_or_dst; /* MC 123 */ Pin 85 = tp2_d; /* MC 125 */ Pin 86 = sgt_low; /* MC 126 */ Pin 89 = rom_15_l; Pin 90 = dad_or_dst_low; Pin 91 = rom_11_l; Pin 92 = clock; Pin 94 = rom_17_l; /* MC 16 */ Pin 95 = last_step_l; /* MC 14 */ Pin 96 = rom_12_l; /* MC 13 */ Pin 98 = rom_14_l; /* MC 11 */ Pin 99 = modeb; /* MC 9 */ Pin 100 = gtf_or_ind; /* MC 8 */ PINNODE 303 = FB_320; /* MC 3 Foldback */ PINNODE 304 = n_t_44x; /* MC 4 Foldback */ PINNODE 305 = mq_ge_ac; /* MC 5 Foldback */ PINNODE 306 = sam_low; /* MC 6 Foldback */ PINNODE 307 = normal_dvi_low; /* MC 7 Foldback */ PINNODE 308 = muy_and_eae_on_low; /* MC 8 Foldback */ PINNODE 309 = lp_shl_or_norms_rp_and_eae_on_lo; /* MC 9 Foldback */ PINNODE 310 = lp_asr_or_lsr_rp_and_eae_on_low; /* MC 10 Foldback */ PINNODE 311 = last_dvi_low; /* MC 11 Foldback */ PINNODE 312 = dcm_or_dpic_low; /* MC 12 Foldback */ PINNODE 313 = mq0_gt_ac0; /* MC 13 Foldback */ PINNODE 314 = n_t_70x; /* MC 14 Foldback */ PINNODE 315 = n_t_5x; /* MC 15 Foldback */ PINNODE 316 = n_t_33x; /* MC 16 Foldback */ PINNODE 322 = FB_320; /* MC 22 Foldback */ PINNODE 323 = n_t_28x; /* MC 23 Foldback */ PINNODE 324 = n_t_19x; /* MC 24 Foldback */ PINNODE 325 = n_t_27x; /* MC 25 Foldback */ PINNODE 326 = n_t_18x; /* MC 26 Foldback */ PINNODE 327 = normal_dvi_low; /* MC 27 Foldback */ PINNODE 328 = muy_and_eae_on_low; /* MC 28 Foldback */ PINNODE 329 = last_dvi_low; /* MC 29 Foldback */ PINNODE 330 = n_t_5x; /* MC 30 Foldback */ PINNODE 331 = n_t_33x; /* MC 31 Foldback */ PINNODE 346 = FB_320; /* MC 46 Foldback */ PINNODE 347 = FB_318; /* MC 47 Foldback */ PINNODE 348 = dcm_or_dpic_low; /* MC 48 Foldback */ PINNODE 360 = FB_320; /* MC 60 Foldback */ PINNODE 361 = n_t_46x; /* MC 61 Foldback */ PINNODE 362 = normal_dvi_low; /* MC 62 Foldback */ PINNODE 363 = last_dvi_low; /* MC 63 Foldback */ PINNODE 364 = n_t_33x; /* MC 64 Foldback */ PINNODE 376 = FB_320; /* MC 76 Foldback */ PINNODE 377 = n_t_82x; /* MC 77 Foldback */ PINNODE 378 = n_t_76x; /* MC 78 Foldback */ PINNODE 379 = n_t_5x; /* MC 79 Foldback */ PINNODE 380 = n_t_33x; /* MC 80 Foldback */ PINNODE 392 = FB_320; /* MC 92 Foldback */ PINNODE 393 = FB_319; /* MC 93 Foldback */ PINNODE 394 = sam_low; /* MC 94 Foldback */ PINNODE 395 = dcm_or_dpic_low; /* MC 95 Foldback */ PINNODE 396 = n_t_38x; /* MC 96 Foldback */ PINNODE 601 = XXL_300; /* MC 1 Feedback */ PINNODE 602 = XXL_312; /* MC 2 Feedback */ PINNODE 603 = XXL_286; /* MC 3 Feedback */ PINNODE 604 = eae_on.C; /* MC 4 Feedback */ PINNODE 605 = mq_to_bus_low.OE; /* MC 5 Feedback */ PINNODE 606 = n_t_77x; /* MC 6 Feedback */ PINNODE 607 = en2.OE; /* MC 7 Feedback */ PINNODE 608 = right_low.OE; /* MC 8 Feedback */ PINNODE 609 = n_t_34x; /* MC 9 Feedback */ PINNODE 610 = shl_ena_low.OE; /* MC 10 Feedback */ PINNODE 611 = link_load.OE; /* MC 11 Feedback */ PINNODE 612 = XXL_288; /* MC 12 Feedback */ PINNODE 613 = n_t_13x.C; /* MC 13 Feedback */ PINNODE 615 = n_t_13x; /* MC 15 Feedback */ PINNODE 616 = en1.OE; /* MC 16 Feedback */ PINNODE 626 = XXL_307; /* MC 26 Feedback */ PINNODE 628 = left_low.OE; /* MC 28 Feedback */ PINNODE 631 = shift_ok; /* MC 31 Feedback */ PINNODE 632 = XXL_295; /* MC 32 Feedback */ PINNODE 642 = n_t_23x; /* MC 42 Feedback */ PINNODE 644 = ad_lk_low.OE; /* MC 44 Feedback */ PINNODE 645 = link_data.OE; /* MC 45 Feedback */ PINNODE 646 = XXL_290; /* MC 46 Feedback */ PINNODE 647 = n_t_84x; /* MC 47 Feedback */ PINNODE 648 = XXL_292; /* MC 48 Feedback */ PINNODE 658 = mq_data_low.OE; /* MC 58 Feedback */ PINNODE 660 = XXL_264; /* MC 60 Feedback */ PINNODE 663 = XXL_309; /* MC 63 Feedback */ PINNODE 671 = n_t_65x; /* MC 71 Feedback */ PINNODE 672 = n_t_22x; /* MC 72 Feedback */ PINNODE 673 = XXL_280; /* MC 73 Feedback */ PINNODE 674 = XXL_284; /* MC 74 Feedback */ PINNODE 676 = data_f.OE; /* MC 76 Feedback */ PINNODE 678 = n_t_42x; /* MC 78 Feedback */ PINNODE 679 = XXL_302; /* MC 79 Feedback */ PINNODE 685 = restart.OE; /* MC 85 Feedback */ PINNODE 686 = n_t_92x; /* MC 86 Feedback */ PINNODE 687 = en2_PIN; /* MC 87 Feedback */ PINNODE 689 = n_t_4x; /* MC 89 Feedback */ PINNODE 690 = XXL_268; /* MC 90 Feedback */ PINNODE 692 = eae_on; /* MC 92 Feedback */ PINNODE 695 = XXL_266; /* MC 95 Feedback */ PINNODE 696 = n_t_69x; /* MC 96 Feedback */ PINNODE 704 = n_t_66x; /* MC 104 Feedback */ PINNODE 705 = en0.OE; /* MC 105 Feedback */ PINNODE 706 = XXL_297; /* MC 106 Feedback */ PINNODE 707 = ac_load_low.OE; /* MC 107 Feedback */ PINNODE 708 = skip.OE; /* MC 108 Feedback */ PINNODE 709 = carry_in.OE; /* MC 109 Feedback */ PINNODE 710 = XXL_262; /* MC 110 Feedback */ PINNODE 711 = XXL_305; /* MC 111 Feedback */ PINNODE 712 = ac_load_low_PIN; /* MC 112 Feedback */ PINNODE 722 = data1_PIN; /* MC 122 Feedback */ PINNODE 723 = XXL_270; /* MC 123 Feedback */ PINNODE 724 = n_t_24x; /* MC 124 Feedback */ PINNODE 726 = n_t_85x; /* MC 126 Feedback */ PINNODE 727 = n_t_60x; /* MC 127 Feedback */ ** Resource Usage ** DCERP Field = Summary of Allocations. ||||| |||||_Preset [p,-] == p = PT preset, - No Preset. |||| ||||__Reset [g,r,-] == g= Global AR, r = PT reset, - No reset. ||| |||___Clock Enable [e,-] == e = Product Term, - always enabled, - none. || ||____Clock [c,g,-], == c = Product term, g = Global term, - No Clock. | |_____Type [C,D,L,T], == Register type C= combin, D=dff, L=latch, T=tff. For input only = INPUT. MCell Pin# Oe PinDrive DCERP FBDrive DCERP Foldback CascadeOut TotPT output_slew MC1 4 PT msir_disable INPUT XXL_300 C---- -- -- 2 slow MC2 0 PT -- XXL_312 C---- -- -- 2 slow MC3 3 PT fetch INPUT XXL_286 C---- FB_320 -- 3 slow MC4 0 -- eae_on.C C---- n_t_44x -- 3 slow MC5 2 -- e INPUT mq_to_bus_low.OE C---- mq_ge_ac -- 3 slow MC6 1 -- n_t_77x C---- sam_low -- 3 slow MC7 0 -- en2.OE C---- normal_dvi_low -- 3 slow MC8 100 -- gtf_or_ind INPUT right_low.OE C---- muy_and_eae_on_low -- 3 slow MC9 99 -- modeb INPUT n_t_34x C---- lp_shl_or_norms_rp_and_eae_on_lo -- 3 slow MC10 0 -- shl_ena_low.OE C---- lp_asr_or_lsr_rp_and_eae_on_low -- 3 slow MC11 98 -- rom_14_l INPUT link_load.OE C---- last_dvi_low -- 3 slow MC12 0 PT -- XXL_288 C---- dcm_or_dpic_low -- 4 slow MC13 96 -- rom_12_l INPUT n_t_13x.C C---- mq0_gt_ac0 -- 5 slow MC14 95 -- last_step_l INPUT -- n_t_70x -> n_t_13x 5 slow MC15 0 -- n_t_13x Dc-r- n_t_5x -- 3 slow MC16 94 -- rom_17_l INPUT en1.OE C---- n_t_33x -- 5 slow MC17 16 -- ts2 INPUT -- -- -- 0 slow MC18 0 -- -- -- -- 0 slow MC19 15 on not_last_xfer C---- -- -- -- 1 slow MC20 0 -- -- -- -- 0 slow MC21 14 -- ts3 INPUT -- -- -- 0 slow MC22 12 -- -- FB_320 -- 1 slow MC23 0 -- -- n_t_28x -- 1 slow MC24 11 -- ts4 INPUT -- n_t_19x -- 1 slow MC25 10 -- init INPUT -- n_t_27x -- 1 slow MC26 0 PT -- XXL_307 C---- n_t_18x -- 3 slow MC27 9 on link_data C---- -- normal_dvi_low -- 2 slow MC28 0 -- left_low.OE C---- muy_and_eae_on_low -- 4 slow MC29 8 on skip C---- -- last_dvi_low -- 2 slow MC30 7 on link_load C---- -- n_t_5x -- 2 slow MC31 0 -- shift_ok C---- n_t_33x -- 4 slow MC32 6 PT TDI INPUT XXL_295 C---- NA -- 5 slow MC33 27 -- -- -- -- 0 slow MC34 0 -- -- -- -- 0 slow MC35 26 -- -- -- -- 0 slow MC36 0 -- -- -- -- 0 slow MC37 25 on tp Dg--p -- -- -- 2 slow MC38 24 on data1 C---- -- -- -- 1 slow MC39 0 -- -- -- -- 0 slow MC40 23 -- link INPUT -- -- -- 0 slow MC41 22 -- tp1 INPUT -- -- -- 0 slow MC42 0 -- n_t_23x Dg--- -- -- 1 slow MC43 21 on c0 C---- -- -- -- 1 slow MC44 0 -- ad_lk_low.OE C---- -- -- 2 slow MC45 19 -- tp2 INPUT link_data.OE C---- -- -- 3 slow MC46 18 PT tp3 INPUT XXL_290 C---- FB_320 -- 5 slow MC47 0 -- n_t_84x Dc-rp FB_318 -- 5 slow MC48 17 PT TMS INPUT XXL_292 C---- dcm_or_dpic_low -- 5 slow MC49 39 on en1 C---- -- -- -- 1 slow MC50 0 -- -- -- -- 0 slow MC51 38 PT mq_load C---- -- -- -- 3 slow MC52 0 -- -- -- -- 0 slow MC53 37 on carry_in C---- -- -- -- 1 slow MC54 35 on mq_to_bus_low C---- -- -- -- 1 slow MC55 0 -- -- -- -- 0 slow MC56 34 on md_disable C---- -- -- -- 1 slow MC57 33 on en0 C---- -- -- -- 1 slow MC58 0 -- mq_data_low.OE C---- -- -- 2 slow MC59 32 on ac_to_bus_low C---- -- -- -- 1 slow MC60 0 PT -- XXL_264 C---- FB_320 -- 4 slow MC61 31 on data_t C---- -- n_t_46x -- 2 slow MC62 30 on shl_ena_low C---- -- normal_dvi_low -- 2 slow MC63 0 PT -- XXL_309 C---- last_dvi_low -- 4 slow MC64 29 on en2 C---- -- n_t_33x -- 2 slow MC65 42 -- ac4_11_0 INPUT -- -- -- 0 slow MC66 0 -- -- -- -- 0 slow MC67 43 -- -- -- -- 0 slow MC68 0 -- -- -- -- 0 slow MC69 44 -- -- -- -- 0 slow MC70 46 on data_f C---- -- -- -- 1 slow MC71 0 -- n_t_65x Dg--- -- -- 1 slow MC72 47 -- ac_0 INPUT n_t_22x Dg--- -- -- 1 slow MC73 48 PT carry_out_low INPUT XXL_280 C---- -- -- 2 slow MC74 0 PT -- XXL_284 C---- -- -- 3 slow MC75 49 PT ac_to_mq_ena_low C---- -- -- -- 2 slow MC76 0 -- data_f.OE C---- FB_320 -- 4 slow MC77 50 on ac_load_low C---- -- n_t_82x -- 2 slow MC78 51 -- ac1 INPUT n_t_42x Dc--p n_t_76x -- 4 slow MC79 0 PT -- XXL_302 C---- n_t_5x -- 5 slow MC80 52 on ad_lk_low C---- -- n_t_33x -- 2 slow MC81 54 -- ac0 INPUT -- -- -- 0 slow MC82 0 -- -- -- -- 0 slow MC83 55 -- ad0_low INPUT -- -- -- 0 slow MC84 0 -- -- -- -- 0 slow MC85 56 -- mq_0 INPUT restart.OE C---- -- -- 2 slow MC86 57 -- ac0_ne_ac1 INPUT n_t_92x C---- -- -- 2 slow MC87 0 PT -- en2_PIN C---- -- -- 2 slow MC88 58 -- -- -- -- 0 slow MC89 59 -- ac2_8_0 INPUT n_t_4x C---- -- -- 2 slow MC90 0 PT -- XXL_268 C---- -- -- 3 slow MC91 60 on left_low C---- -- -- -- 1 slow MC92 0 -- eae_on Dc-r- FB_320 -- 4 slow MC93 62 on right_low C---- -- FB_319 -- 2 slow MC94 63 on mq_data_low C---- -- sam_low -- 2 slow MC95 0 PT -- XXL_266 C---- dcm_or_dpic_low -- 4 slow MC96 64 -- TCK INPUT n_t_69x Dc-r- n_t_38x -- 4 slow MC97 65 -- mq11_low INPUT -- -- -- 0 slow MC98 0 -- -- -- -- 0 slow MC99 66 -- mq0_low INPUT -- -- -- 0 slow MC100 0 -- -- -- -- 0 slow MC101 67 -- mq10_low INPUT -- -- -- 0 slow MC102 69 -- -- -- -- 0 slow MC103 0 -- -- -- -- 0 slow MC104 70 -- sc_0_low INPUT n_t_66x C---- -- -- 2 slow MC105 71 -- eir2 INPUT en0.OE C---- -- -- 2 slow MC106 0 PT -- XXL_297 C---- -- -- 3 slow MC107 72 -- rtf INPUT ac_load_low.OE C---- -- -- 3 slow MC108 0 -- skip.OE C---- -- -- 3 slow MC109 73 -- eir3 INPUT carry_in.OE C---- -- -- 3 slow MC110 74 PT next_loc INPUT XXL_262 C---- -- -- 4 slow MC111 0 PT -- XXL_305 C---- -- -- 4 slow MC112 75 PT TDO INPUT ac_load_low_PIN C---- -- -- 4 slow MC113 77 -- div_12_l INPUT -- -- -- 0 slow MC114 0 -- -- -- -- 0 slow MC115 78 -- rom_24_l INPUT -- -- -- 0 slow MC116 0 -- -- -- -- 0 slow MC117 79 -- rom_13_l INPUT -- -- -- 0 slow MC118 80 on incr_sc C---- -- -- -- 1 slow MC119 0 -- -- -- -- 0 slow MC120 81 -- rom_22_l INPUT -- -- -- 0 slow MC121 82 on restart C---- -- -- -- 1 slow MC122 0 PT -- data1_PIN C---- -- -- 2 slow MC123 83 PT dad_or_dst INPUT XXL_270 C---- -- -- 2 slow MC124 0 -- n_t_24x C---- -- -- 2 slow MC125 85 on tp2_d Dg--- -- -- -- 1 slow MC126 86 -- sgt_low INPUT n_t_85x C---- -- -- 2 slow MC127 0 -- n_t_60x Dc-r- -- -- 2 slow MC128 87 -- -- -- -- 0 slow MC0 92 clock INPUT -- -- -- 0 slow MC0 91 rom_11_l INPUT -- -- -- 0 slow MC0 90 dad_or_dst_low INPUT -- -- -- 0 slow MC0 89 rom_15_l INPUT -- -- -- 0 slow Logic Array Block Logic Cells I/O Pins Foldbacks TotalPT FanIN Cascades A: LC1 - LC16 15/16(93%) 9/16(56%) 14/16(87%) 53/80(66%) (25) 1 B: LC17 - LC32 8/16(50%) 9/16(56%) 10/16(62%) 27/80(33%) (25) 0 C: LC33 - LC48 9/16(56%) 8/16(50%) 3/16(18%) 25/80(31%) (25) 0 D: LC49 - LC64 13/16(81%) 10/16(62%) 5/16(31%) 25/80(31%) (25) 0 E: LC65 - LC80 11/16(68%) 8/16(50%) 5/16(31%) 27/80(33%) (25) 0 F: LC81 - LC96 11/16(68%) 9/16(56%) 5/16(31%) 28/80(35%) (25) 0 G: LC97 - LC112 9/16(56%) 9/16(56%) 0/16(0%) 28/80(35%) (25) 0 H: LC113- LC128 8/16(50%) 9/16(56%) 0/16(0%) 13/80(16%) (16) 0 Total dedicated input used: 4/4 (100%) Total I/O pins used 71/80 (88%) Total Logic cells used 85/128 (66%) Total Flip-Flop used 11/128 (8%) Total Foldback logic used 42/128 (32%) Total Nodes+FB/MCells 126/128 (98%) Total cascade used 1 Total input pins 48 Total output pins 27 Total Pts 226 Creating pla file C:\USERS\VRS\DOCUMENTS\EAGLE\PROJECTS\DEC\MXXX\M8341\PLD\M8341D.tt3 with 0 inputs 0 outputs, 0 pins 0 nodes and 0 pterms... ---------------- End fitter, Design FITS $Device PQFP100 fits FIT1508 completed in 0.00 seconds