Name      23010C6;

Assembly  0001;
Revision  1.0;
PartNo    E109 82S100;
Device    f1508ispplcc84;

Company   None;
Designer  Digital Equipment Corporation;
Location  None;
Date      March 2018;

property ATMEL { jtag=on };
PROPERTY ATMEL { preassign keep };
PROPERTY ATMEL { TMS_pullup=on };
PROPERTY ATMEL { TDI_pullup=on };
/* PROPERTY ATMEL { pin_keep OFF }; */
/* PROPERTY ATMEL { open_collector = INT_RQST }; */

/*
 * 23010C6 is an 82S100, programmed to be a bank selector MUX for routing 
 * field information to the bank registers in E108, E110, and E116.
 * An 82S100 has 16 dedicated inputs, and 8 dedicated outputs.  In this case, the inputs
 * select the destination(s), and present various bank information.
 * The outputs are the 2 bit bank numbers to be latched by the appropriate bank register(s).
*/

/*
 * The 82S100 is a tri-state device, if CE is inactive, the 
 * outputs are undriven.
*/
Pin 19 = !CE;
/*
 * The MUX_CTL bits determine which outputs are used.
 *
 * Reason	mux_ctl
 * force_0	7 ib=00 ibb=00 db=00
 * new_fld	6 ibb=sib db=sdb??
 * cif		5 ibb=f
 * cdf		4 db=f
 * lxa		3 ib=ibb=nib db=ndb
 * rts		2 ibb=nib db=ndb
 * rmf		1 ibb=sib db=sdb
*/
Pin [20..22] = [mux_ctl0..2];
/*
 * SB presents the current contents of the saved banks register.
*/
Pin [23..26] = [SB0..3];
/*
 * IB presents the current contents of the IB register.
*/
Pin [27,2] = [IBB0..1];
/*
 * BB presents the current contents of the BB register.
*/
Pin [3,4] = [BB0..1];
/*
 * BD presents the current contents of the BD register.
*/
Pin [5..9] = [BD1..5];

/* Outputs */
Pin [10,11] = [ibo0..1]; /* E110 */
Pin [12,13] = [dbo0..1]; /* E108 */
Pin [15,16] = [ibbo0..1]; /* E116 */

field mux_ctl = [mux_ctl0..2];

/*
 * Drive the new IB to E110.
 * The use of 'xx' here prevents over-specification
 * and helps with logic minimization.
*/
[ibo0..1] = mux_ctl:'b'000 & 'b'xx /* Notused */
          # mux_ctl:'b'001 & 'b'xx /* RMF */
          # mux_ctl:'b'010 & 'b'xx /* RTS */
          # mux_ctl:'b'011 & [BD1..2] /* LXA */
          # mux_ctl:'b'100 & 'b'xx /* CDF */
          # mux_ctl:'b'101 & 'b'xx /* CIF */
          # mux_ctl:'b'110 & [IBB0..1] /* New Field */
          # mux_ctl:'b'111 & 'b'00; /* Force0 */
/*
 * Drive the new DB to E108.
*/
[dbo0..1] = mux_ctl:'b'000 & 'b'xx
          # mux_ctl:'b'001 & [SB2..3]
          # mux_ctl:'b'010 & [BD3..4]
          # mux_ctl:'b'011 & [BD4..5]
          # mux_ctl:'b'100 & [BB0..1]
          # mux_ctl:'b'101 & [BB0..1]
          # mux_ctl:'b'110 & 'b'xx
          # mux_ctl:'b'111 & 'b'00;
/*
 * Drive the new IBB to E116.
*/
[ibbo0..1] = mux_ctl:'b'000 & 'b'xx
           # mux_ctl:'b'001 & [SB0..1]
           # mux_ctl:'b'010 & [BD1..2]
           # mux_ctl:'b'011 & [BD1..2]
           # mux_ctl:'b'100 & [BB0..1]
           # mux_ctl:'b'101 & [BB0..1]
           # mux_ctl:'b'110 & 'b'xx
           # mux_ctl:'b'111 & 'b'00;

/*
 * Here is where CE is implemented, though it is tied to 
 * ground in practice.
*/
[ibo0..1].oe = CE;
[dbo0..1].oe = CE;
[ibbo0..1].oe = CE;