Atmel ATF1508AS Fitter Version 1.8.7.8 ,running Thu May 17 22:49:37 2018 fit1508 C:\USERS\VINCE\DOCUMENTS\EAGLE\PROJECTS\DEC\MXXX\M8416\TOPLD\M8416V1.tt2 -CUPL -dev P1508C84 -JTAG ON ****** Initial fitting strategy and property ****** Pla_in_file = M8416V1.tt2 Pla_out_file = M8416V1.tt3 Jedec_file = M8416V1.jed Vector_file = M8416V1.tmv verilog_file = M8416V1.vt Time_file = Log_file = M8416V1.fit err_file = Device_name = PLCC84 Module_name = Package_type = PLCC Preassign_file = Property_file = Sleep_mode = Preassignment = Security_mode = OFF Pin_keep_mode = ON Dedicated_input_clock = Dedicated_input_reset = Dedicated_input_oe = supporter = CUPL optimize = ON Soft_buffer = Xor_synthesis = OFF Foldback_logic = on Expander = Cascade_logic = OFF Dedicated_input = Output_fast = OFF ******************************* Power down pin 1 = OFF Power down pin 2 = OFF power_reset = OFF JTAG = ON TDI pullup = OFF TMS pullup = OFF MC_power = OFF Open_collector = c0_low, c1_low, data00_low, data01_low, data02_low, data03_low, data04_low, data05_low, data06_low, data07_low, data08_low, data09_low, data10_low, data11_low, ema0_low, ema1_low, ema2_low, int_rqst_low, internal_io, skip_low, user_mode_low, ITD0 = ON ITD1 = ON ITD2 = ON Fast_inlatch = off ******************************* --------------------------------------------------------- Fitter_Pass 1, Preassign = KEEP, LOGIC_DOUBLING : OFF ... ## ERROR : Bad user pin assignement : 85 ## ERROR : Bad user pin assignement --------------------------------------------------------- Fitter_Pass 2, Preassign = KEEP, NODE ASSIGN : OFF ... Info: C:\USERS\VINCE\DOCUMENTS\EAGLE\PROJECTS\DEC\MXXX\M8416\TOPLD\M8416V1 uses 90% of the logic resources in device PLCC84 If you wish to have more pins available for future logic change Atmel recommends using a larger device. ## Warning : Placement fail --------------------------------------------------------- Fitter_Pass 3, Preassign = KEEP, CASCADE_LOGIC : (TRY) ... Performing global Output Enable pin assignments ... Performing global pin assignments ... -------------------------------------- Final global control pins assignment (if applicable)... ------------------------------------------------------- tp4 assigned to pin 81 p4_pclr_low assigned to pin 2 tp3 assigned to pin 83 p4_pclr assigned to pin 1 Performing input pin pre-assignments ... ------------------------------------ p4_pclr_low assigned to pin 2 tp3 assigned to pin 83 p4_pclr assigned to pin 1 p1_rr0.AR equation needs patching. p4_int_in.AR equation needs patching. p2_ifa_low.C equation needs patching. 3 control equtions need patching Attempt to place floating signals ... ------------------------------------ n_t_176x is placed at feedback node 601 (MC 1) p4_int_in is placed at feedback node 602 (MC 2) md05_low is placed at pin 12 (MC 3) XXL_517 is placed at feedback node 603 (MC 3) XXL_558 is placed at feedback node 604 (MC 4) md04_low is placed at pin 11 (MC 5) XXL_519 is placed at feedback node 605 (MC 5) key_control_low is placed at pin 10 (MC 6) Com_Ctrl_515 is placed at feedback node 606 (MC 6) XXL_554 is placed at feedback node 607 (MC 7) skip_low is placed at pin 9 (MC 8) XXL_556 is placed at feedback node 609 (MC 9) XXL_564 is placed at feedback node 610 (MC 10) data04_low is placed at pin 8 (MC 11) XXL_555 is placed at foldback expander node 311 (MC 11) XXL_530 is placed at feedback node 612 (MC 12) data02_low is placed at pin 6 (MC 13) SF551 is placed at foldback expander node 313 (MC 13) data01_low is placed at pin 5 (MC 14) XXL_518 is placed at foldback expander node 314 (MC 14) XXL_535 is placed at feedback node 615 (MC 15) user_mode_low is placed at pin 4 (MC 16) p4_rtf_low is placed at foldback expander node 316 (MC 16) ind1_low is placed at pin 22 (MC 17) gdollar_3 is placed at feedback node 617 (MC 17) p2_sf0 is placed at feedback node 618 (MC 18) ts3_low is placed at pin 21 (MC 19) p2_sf5 is placed at feedback node 619 (MC 19) XXL_520 is placed at feedback node 620 (MC 20) ts4_low is placed at pin 20 (MC 21) p2_sf4 is placed at feedback node 621 (MC 21) XXL_525 is placed at feedback node 622 (MC 22) XXL_524 is placed at feedback node 623 (MC 23) md00_low is placed at pin 18 (MC 24) p2_sf3 is placed at feedback node 624 (MC 24) pulse_la is placed at pin 17 (MC 25) p2_sf2 is placed at feedback node 625 (MC 25) XXL_523 is placed at feedback node 626 (MC 26) link_low is placed at pin 16 (MC 27) p2_sf1 is placed at feedback node 627 (MC 27) XXL_568 is placed at feedback node 628 (MC 28) internal_io is placed at pin 15 (MC 29) p4_int is placed at foldback expander node 329 (MC 29) XXL_566 is placed at feedback node 630 (MC 30) XXL_562 is placed at feedback node 631 (MC 31) TDI is placed at pin 14 (MC 32) XXL_560 is placed at feedback node 632 (MC 32) gdollar_4 is placed at feedback node 634 (MC 34) md07_low is placed at pin 31 (MC 35) p1_rr0.AR is placed at feedback node 636 (MC 36) md08_low is placed at pin 30 (MC 37) md06_low is placed at pin 29 (MC 38) p2_elar_low is placed at feedback node 639 (MC 39) md09_low is placed at pin 28 (MC 40) XXL_522 is placed at feedback node 641 (MC 41) XXL_539 is placed at feedback node 642 (MC 42) mams_ld_ctl is placed at pin 27 (MC 43) XXL_538 is placed at feedback node 644 (MC 44) c0_low is placed at pin 25 (MC 45) c1_low is placed at pin 24 (MC 46) XXL_537 is placed at feedback node 647 (MC 47) p4_int is placed at foldback expander node 347 (MC 47) TMS is placed at pin 23 (MC 48) XXL_570 is placed at feedback node 648 (MC 48) power_ok_low is placed at pin 41 (MC 49) p4_int_in.AR is placed at feedback node 649 (MC 49) XXL_571 is placed at foldback expander node 349 (MC 49) XXL_528 is placed at feedback node 650 (MC 50) XXL_569 is placed at foldback expander node 350 (MC 50) run_low is placed at pin 40 (MC 51) p2_ifa_low.C is placed at feedback node 651 (MC 51) XXL_567 is placed at foldback expander node 351 (MC 51) XXL_540 is placed at feedback node 652 (MC 52) d_low is placed at pin 39 (MC 53) n_t_168x is placed at feedback node 653 (MC 53) XXL_563 is placed at foldback expander node 353 (MC 53) XXL_541 is placed at feedback node 654 (MC 54) XXL_536 is placed at feedback node 655 (MC 55) ir0_low is placed at pin 37 (MC 56) XXL_526 is placed at feedback node 656 (MC 56) XXL_561 is placed at foldback expander node 356 (MC 56) ir1_low is placed at pin 36 (MC 57) p1_bfl1 is placed at feedback node 657 (MC 57) XXL_559 is placed at foldback expander node 357 (MC 57) XXL_533 is placed at feedback node 658 (MC 58) f_set_low is placed at pin 35 (MC 59) XXL_529 is placed at feedback node 659 (MC 59) XXL_557 is placed at foldback expander node 359 (MC 59) XXL_534 is placed at feedback node 660 (MC 60) md02_low is placed at pin 34 (MC 61) p6_usm_low is placed at feedback node 661 (MC 61) XXL_550 is placed at foldback expander node 361 (MC 61) XXL_532 is placed at feedback node 662 (MC 62) XXL_531 is placed at feedback node 663 (MC 63) f_low is placed at pin 33 (MC 64) p1_bfl2 is placed at feedback node 664 (MC 64) XXL_518 is placed at foldback expander node 364 (MC 64) md01_low is placed at pin 44 (MC 65) p1_us3 is placed at feedback node 665 (MC 65) p1_rr0 is placed at feedback node 666 (MC 66) initialize is placed at pin 45 (MC 67) p1_rr2 is placed at feedback node 667 (MC 67) p4_new_fld is placed at feedback node 668 (MC 68) pause_low is placed at pin 46 (MC 69) p1_us2 is placed at feedback node 669 (MC 69) gdollar_0 is placed at feedback node 670 (MC 70) gdollar_1 is placed at feedback node 671 (MC 71) cpma_disable_low is placed at pin 48 (MC 72) p1_us1 is placed at feedback node 672 (MC 72) p1_rr1 is placed at feedback node 673 (MC 73) gdollar_2 is placed at feedback node 674 (MC 74) md03_low is placed at pin 50 (MC 75) p1_us0 is placed at feedback node 675 (MC 75) XXL_553 is placed at feedback node 676 (MC 76) n_t_37x is placed at pin 51 (MC 77) SF551 is placed at foldback expander node 377 (MC 77) XXL_565 is placed at feedback node 678 (MC 78) p4_dfen_low is placed at feedback node 679 (MC 79) ema2_low is placed at pin 52 (MC 80) p4_lxa is placed at foldback expander node 380 (MC 80) p2_ifb_low is placed at feedback node 681 (MC 81) p2_ifa_low is placed at feedback node 682 (MC 82) data08_low is placed at pin 54 (MC 83) p2_dfc_low is placed at feedback node 684 (MC 84) data09_low is placed at pin 55 (MC 85) data10_low is placed at pin 56 (MC 86) p2_dfb_low is placed at feedback node 687 (MC 87) data11_low is placed at pin 57 (MC 88) p2_dfa_low is placed at feedback node 689 (MC 89) p4_usint_low is placed at feedback node 690 (MC 90) ema0_low is placed at pin 58 (MC 91) gdollar_17 is placed at feedback node 692 (MC 92) ema1_low is placed at pin 60 (MC 93) int_rqst_low is placed at pin 61 (MC 94) gdollar_18 is placed at feedback node 695 (MC 95) TCK is placed at pin 62 (MC 96) gdollar_16 is placed at feedback node 696 (MC 96) p4_int is placed at foldback expander node 396 (MC 96) p1_rr4 is placed at feedback node 697 (MC 97) p1_us4 is placed at feedback node 698 (MC 98) p1_rr3 is placed at feedback node 699 (MC 99) p2_ifc_low is placed at feedback node 700 (MC 100) data00_low is placed at pin 65 (MC 101) XXL_549 is placed at feedback node 702 (MC 102) p1_bfl0 is placed at feedback node 703 (MC 103) data03_low is placed at pin 67 (MC 104) data05_low is placed at pin 68 (MC 105) XXL_547 is placed at feedback node 706 (MC 106) data07_low is placed at pin 69 (MC 107) p3_e2cfrom_low is placed at feedback node 708 (MC 108) data06_low is placed at pin 70 (MC 109) p4_fatal_lp_0_rp is placed at feedback node 710 (MC 110) XXL_548 is placed at feedback node 711 (MC 111) TDO is placed at pin 71 (MC 112) XXL_552 is placed at feedback node 712 (MC 112) ind2_low is placed at pin 73 (MC 115) p4_init_en is placed at feedback node 716 (MC 116) la_en_low is placed at pin 74 (MC 117) ts1_low is placed at pin 75 (MC 118) gdollar_11 is placed at feedback node 719 (MC 119) p2_emaen_low is placed at feedback node 721 (MC 121) gdollar_10 is placed at feedback node 722 (MC 122) md10_low is placed at pin 77 (MC 123) gdollar_9 is placed at feedback node 724 (MC 124) md11_low is placed at pin 79 (MC 125) int_in_prog_low is placed at pin 80 (MC 126) p1_us5 is placed at feedback node 727 (MC 127) tp4 is placed at pin 81 (MC 128) p3_bpause is placed at feedback node 728 (MC 128) p d d d 4 a a a _ m s t t t p m m d k a a a c p d d t 0 i 0 0 0 l 4 1 1 s 4 p 4 2 1 r _ 1 0 1 _ _ _ _ _ _ p _ _ _ l l l G l l V l c t G t l V l l o o o N o o C o l p N p o C o o w w w D w w C w r 3 D 4 w C w w ------------------------------------------- / 11 9 7 5 3 1 83 81 79 77 75 \ / 10 8 6 4 2 84 82 80 78 76 \ md05_low | 12 (*) 74 | la_en_low VCC | 13 73 | ind2_low TDI | 14 72 | GND internal_io | 15 71 | TDO link_low | 16 70 | data06_low pulse_la | 17 69 | data07_low md00_low | 18 68 | data05_low GND | 19 67 | data03_low ts4_low | 20 66 | VCC ts3_low | 21 65 | data00_low ind1_low | 22 ATF1508 64 | TMS | 23 84-Lead PLCC 63 | c1_low | 24 62 | TCK c0_low | 25 61 | int_rqst_low VCC | 26 60 | ema1_low mams_ld_ctl | 27 59 | GND md09_low | 28 58 | ema0_low md06_low | 29 57 | data11_low md08_low | 30 56 | data10_low md07_low | 31 55 | data09_low GND | 32 54 | data08_low \ 34 36 38 40 42 44 46 48 50 52 / \ 33 35 37 39 41 43 45 47 49 51 53/ -------------------------------------------- f m f i i V d r p G V m i p G c m n e V _ d _ r r C _ u o N C d n a N p d _ m C l 0 s 1 0 C l n w D C 0 i u D m 0 t a C o 2 e _ _ o _ e 1 t s a 3 _ 2 w _ t l l w l r _ i e _ _ 3 _ l _ o o o _ l a _ d l 7 l o l w w w o o l l i o x o w o k w i o s w w w _ z w a l e b o l w e _ VCC = Supply Voltage pin which must be connected to (5.0V or 3.0V) GND = GND pin which must be connected to ground TMS,TDI,TDO,TDI = JTAG pins which must reserved for the JTAG interface NC = Unused I/O pins which must be unconnected on the board Universal-Interconnect-Multiplexer assignments ------------------------------------------------ FanIn assignment for block A [26] { XXL_554,XXL_522,XXL_564,XXL_565,XXL_517, data05_low, ind2_low,ind1_low, key_control_low, la_en_low, md04_low,md03_low,md05_low,md10_low,md06_low,md11_low,md08_low,md07_low,md09_low, p3_bpause,p2_sf5,p4_int_in.AR,p6_usm_low, ts3_low,ts1_low,tp3, } Multiplexer assignment for block A XXL_554 (MC2 FB) : MUX 0 Ref (A7fb) md04_low (MC12 P) : MUX 1 Ref (A5p) p3_bpause (MC10 FB) : MUX 5 Ref (H128fb) md03_low (MC20 P) : MUX 6 Ref (E75p) md05_low (MC11 P) : MUX 7 Ref (A3p) md10_low (MC24 P) : MUX 8 Ref (H123p) ts3_low (MC15 P) : MUX 9 Ref (B19p) ts1_low (MC23 P) : MUX 11 Ref (H118p) ind2_low (MC21 P) : MUX 13 Ref (H115p) key_control_low (MC13 P) : MUX 15 Ref (A6p) p2_sf5 (MC4 FB) : MUX 16 Ref (B19fb) md06_low (MC18 P) : MUX 17 Ref (C38p) md11_low (MC25 P) : MUX 18 Ref (H125p) md08_low (MC17 P) : MUX 21 Ref (C37p) p4_int_in.AR (MC6 FB) : MUX 22 Ref (D49fb) md07_low (MC16 P) : MUX 23 Ref (C35p) data05_low (MC9 P) : MUX 24 Ref (G105p) XXL_522 (MC5 FB) : MUX 25 Ref (C41fb) XXL_564 (MC3 FB) : MUX 27 Ref (A10fb) md09_low (MC19 P) : MUX 29 Ref (C40p) la_en_low (MC22 P) : MUX 31 Ref (H117p) ind1_low (MC14 P) : MUX 33 Ref (B17p) XXL_565 (MC8 FB) : MUX 35 Ref (E78fb) XXL_517 (MC1 FB) : MUX 36 Ref (A3fb) p6_usm_low (MC7 FB) : MUX 37 Ref (D61fb) tp3 (MC26 FB) : MUX 39 Ref (GCLK) FanIn assignment for block B [33] { XXL_519,XXL_553, data11_low,data09_low,data10_low, int_in_prog_low,ind2_low,internal_io, la_en_low, mams_ld_ctl,md04_low,md03_low,md05_low,md00_low,md07_low,md08_low,md09_low,md06_low, p1_bfl0,p2_dfc_low,p2_dfb_low,p1_bfl1,p4_init_en,p4_dfen_low,p4_fatal_lp_0_rp,p2_ifb_low,p2_ifa_low,p1_bfl2,p2_ifc_low,p2_dfa_low, tp4,ts1_low,ts4_low, } Multiplexer assignment for block B mams_ld_ctl (MC27 P) : MUX 0 Ref (C43p) md04_low (MC20 P) : MUX 1 Ref (A5p) p1_bfl0 (MC16 FB) : MUX 2 Ref (G103fb) data11_low (MC13 P) : MUX 3 Ref (F88p) p2_dfc_low (MC9 FB) : MUX 4 Ref (F84fb) data09_low (MC10 P) : MUX 5 Ref (F85p) md03_low (MC28 P) : MUX 6 Ref (E75p) md05_low (MC19 P) : MUX 7 Ref (A3p) p2_dfb_low (MC12 FB) : MUX 8 Ref (F87fb) md00_low (MC22 P) : MUX 9 Ref (B24p) data10_low (MC11 P) : MUX 11 Ref (F86p) p1_bfl1 (MC3 FB) : MUX 13 Ref (D57fb) p4_init_en (MC18 FB) : MUX 14 Ref (H116fb) md07_low (MC23 P) : MUX 15 Ref (C35p) int_in_prog_low (MC32 P) : MUX 16 Ref (H126p) p4_dfen_low (MC6 FB) : MUX 17 Ref (E79fb) md08_low (MC24 P) : MUX 19 Ref (C37p) tp4 (MC33 P) : MUX 20 Ref (H128p) md09_low (MC26 P) : MUX 21 Ref (C40p) p4_fatal_lp_0_rp (MC17 FB) : MUX 23 Ref (G110fb) XXL_519 (MC1 FB) : MUX 24 Ref (A5fb) md06_low (MC25 P) : MUX 25 Ref (C38p) p2_ifb_low (MC7 FB) : MUX 26 Ref (F81fb) ind2_low (MC29 P) : MUX 27 Ref (H115p) p2_ifa_low (MC8 FB) : MUX 28 Ref (F82fb) ts1_low (MC31 P) : MUX 29 Ref (H118p) la_en_low (MC30 P) : MUX 31 Ref (H117p) ts4_low (MC21 P) : MUX 33 Ref (B21p) internal_io (MC2 P) : MUX 34 Ref (B29p) XXL_553 (MC5 FB) : MUX 35 Ref (E76fb) p1_bfl2 (MC4 FB) : MUX 37 Ref (D64fb) p2_ifc_low (MC15 FB) : MUX 38 Ref (G100fb) p2_dfa_low (MC14 FB) : MUX 39 Ref (F89fb) FanIn assignment for block C [33] { XXL_519, c1_low,c0_low, data08_low,data06_low,data07_low, gdollar_18,gdollar_17,gdollar_16, ind2_low,int_in_prog_low, key_control_low, la_en_low,link_low, mams_ld_ctl,md04_low,md07_low,md11_low,md08_low,md09_low,md10_low,md05_low,md03_low,md06_low, p1_bfl0,p1_bfl1,p1_bfl2,pulse_la,p3_bpause,p4_pclr_low,p4_new_fld, tp4,ts1_low, } Multiplexer assignment for block C c1_low (MC3 P) : MUX 0 Ref (C46p) data08_low (MC7 P) : MUX 1 Ref (F83p) p1_bfl0 (MC11 FB) : MUX 2 Ref (G103fb) la_en_low (MC27 P) : MUX 3 Ref (H117p) c0_low (MC2 P) : MUX 4 Ref (C45p) p1_bfl1 (MC4 FB) : MUX 5 Ref (D57fb) data06_low (MC13 P) : MUX 6 Ref (G109p) p1_bfl2 (MC5 FB) : MUX 7 Ref (D64fb) ind2_low (MC26 P) : MUX 9 Ref (H115p) mams_ld_ctl (MC24 P) : MUX 10 Ref (C43p) gdollar_18 (MC9 FB) : MUX 11 Ref (F95fb) data07_low (MC12 P) : MUX 12 Ref (G107p) md04_low (MC16 P) : MUX 13 Ref (A5p) pulse_la (MC18 P) : MUX 14 Ref (B25p) md07_low (MC20 P) : MUX 15 Ref (C35p) md11_low (MC30 P) : MUX 18 Ref (H125p) md08_low (MC21 P) : MUX 19 Ref (C37p) tp4 (MC32 P) : MUX 20 Ref (H128p) md09_low (MC23 P) : MUX 21 Ref (C40p) gdollar_17 (MC8 FB) : MUX 23 Ref (F92fb) link_low (MC19 P) : MUX 24 Ref (B27p) ts1_low (MC28 P) : MUX 25 Ref (H118p) md10_low (MC29 P) : MUX 26 Ref (H123p) p3_bpause (MC14 FB) : MUX 27 Ref (H128fb) int_in_prog_low (MC31 P) : MUX 28 Ref (H126p) md05_low (MC15 P) : MUX 31 Ref (A3p) md03_low (MC25 P) : MUX 32 Ref (E75p) key_control_low (MC17 P) : MUX 33 Ref (A6p) p4_pclr_low (MC33 FB) : MUX 34 Ref (OE2) md06_low (MC22 P) : MUX 35 Ref (C38p) p4_new_fld (MC6 FB) : MUX 36 Ref (E68fb) XXL_519 (MC1 FB) : MUX 38 Ref (A5fb) gdollar_16 (MC10 FB) : MUX 39 Ref (F96fb) FanIn assignment for block D [33] { XXL_517,XXL_556,XXL_552,XXL_562,XXL_566,XXL_570,XXL_526,XXL_522,XXL_560,XXL_568,XXL_558, int_in_prog_low, mams_ld_ctl,md08_low,md09_low,md06_low,md11_low,md10_low,md07_low, n_t_176x, p1_rr3,p2_sf1,p2_sf3,p3_bpause,p4_new_fld,p1_rr4,p2_sf4,p6_usm_low,p2_sf0,p2_sf2, ts3_low,tp4,tp3, } Multiplexer assignment for block D mams_ld_ctl (MC28 P) : MUX 0 Ref (C43p) md08_low (MC25 P) : MUX 1 Ref (C37p) n_t_176x (MC1 FB) : MUX 2 Ref (A1fb) md09_low (MC27 P) : MUX 3 Ref (C40p) p1_rr3 (MC20 FB) : MUX 4 Ref (G99fb) p2_sf1 (MC9 FB) : MUX 5 Ref (B27fb) XXL_517 (MC2 FB) : MUX 6 Ref (A3fb) md06_low (MC26 P) : MUX 7 Ref (C38p) md11_low (MC30 P) : MUX 8 Ref (H125p) ts3_low (MC23 P) : MUX 9 Ref (B19p) XXL_556 (MC4 FB) : MUX 11 Ref (A9fb) XXL_552 (MC21 FB) : MUX 13 Ref (G112fb) md10_low (MC29 P) : MUX 14 Ref (H123p) md07_low (MC24 P) : MUX 15 Ref (C35p) int_in_prog_low (MC31 P) : MUX 16 Ref (H126p) XXL_562 (MC12 FB) : MUX 17 Ref (B31fb) XXL_566 (MC11 FB) : MUX 19 Ref (B30fb) p2_sf3 (MC7 FB) : MUX 20 Ref (B24fb) XXL_570 (MC15 FB) : MUX 21 Ref (C48fb) XXL_526 (MC16 FB) : MUX 22 Ref (D56fb) p3_bpause (MC22 FB) : MUX 23 Ref (H128fb) p4_new_fld (MC18 FB) : MUX 24 Ref (E68fb) XXL_522 (MC14 FB) : MUX 25 Ref (C41fb) p1_rr4 (MC19 FB) : MUX 28 Ref (G97fb) XXL_560 (MC13 FB) : MUX 29 Ref (B32fb) p2_sf4 (MC6 FB) : MUX 30 Ref (B21fb) XXL_568 (MC10 FB) : MUX 31 Ref (B28fb) tp4 (MC32 P) : MUX 32 Ref (H128p) p6_usm_low (MC17 FB) : MUX 33 Ref (D61fb) p2_sf0 (MC5 FB) : MUX 34 Ref (B18fb) p2_sf2 (MC8 FB) : MUX 37 Ref (B25fb) XXL_558 (MC3 FB) : MUX 38 Ref (A4fb) tp3 (MC33 FB) : MUX 39 Ref (GCLK) FanIn assignment for block E [33] { XXL_547,XXL_522, data08_low,data06_low,data09_low,data07_low,d_low, f_set_low,f_low, ind1_low,ir0_low,ir1_low,ind2_low, key_control_low, la_en_low, mams_ld_ctl,md11_low,md03_low,md02_low,md00_low,md10_low,md09_low,md01_low, n_t_168x, p3_bpause,p4_dfen_low,pulse_la,power_ok_low,p2_elar_low,p1_rr0.AR,p6_usm_low, run_low, ts1_low, } Multiplexer assignment for block E mams_ld_ctl (MC18 P) : MUX 0 Ref (C43p) data08_low (MC7 P) : MUX 1 Ref (F83p) p3_bpause (MC12 FB) : MUX 3 Ref (H128fb) data06_low (MC11 P) : MUX 4 Ref (G109p) data09_low (MC8 P) : MUX 5 Ref (F85p) data07_low (MC10 P) : MUX 6 Ref (G107p) ts1_low (MC31 P) : MUX 7 Ref (H118p) md11_low (MC33 P) : MUX 8 Ref (H125p) key_control_low (MC13 P) : MUX 9 Ref (A6p) md03_low (MC28 P) : MUX 10 Ref (E75p) p4_dfen_low (MC6 FB) : MUX 11 Ref (E79fb) f_set_low (MC24 P) : MUX 12 Ref (D59p) ind1_low (MC14 P) : MUX 13 Ref (B17p) ir0_low (MC22 P) : MUX 15 Ref (D56p) pulse_la (MC16 P) : MUX 16 Ref (B25p) d_low (MC21 P) : MUX 17 Ref (D53p) ir1_low (MC23 P) : MUX 18 Ref (D57p) XXL_547 (MC9 FB) : MUX 19 Ref (G106fb) md02_low (MC25 P) : MUX 20 Ref (D61p) la_en_low (MC30 P) : MUX 21 Ref (H117p) ind2_low (MC29 P) : MUX 23 Ref (H115p) n_t_168x (MC4 FB) : MUX 24 Ref (D53fb) md00_low (MC15 P) : MUX 25 Ref (B24p) md10_low (MC32 P) : MUX 26 Ref (H123p) run_low (MC20 P) : MUX 27 Ref (D51p) md09_low (MC17 P) : MUX 29 Ref (C40p) power_ok_low (MC19 P) : MUX 33 Ref (D49p) p2_elar_low (MC2 FB) : MUX 34 Ref (C39fb) XXL_522 (MC3 FB) : MUX 35 Ref (C41fb) p1_rr0.AR (MC1 FB) : MUX 36 Ref (C36fb) p6_usm_low (MC5 FB) : MUX 37 Ref (D61fb) f_low (MC26 P) : MUX 38 Ref (D64p) md01_low (MC27 P) : MUX 39 Ref (E65p) FanIn assignment for block F [20] { Com_Ctrl_515, XXL_548,XXL_523,XXL_549,XXL_538,XXL_531,XXL_532,XXL_524,XXL_533,XXL_520,XXL_530,XXL_539,XXL_525,XXL_537, initialize,int_in_prog_low, mams_ld_ctl, p4_new_fld,p2_ifa_low.C,p4_usint_low, } Multiplexer assignment for block F XXL_548 (MC17 FB) : MUX 1 Ref (G111fb) p4_new_fld (MC14 FB) : MUX 2 Ref (E68fb) XXL_523 (MC6 FB) : MUX 3 Ref (B26fb) XXL_549 (MC16 FB) : MUX 4 Ref (G102fb) XXL_538 (MC8 FB) : MUX 5 Ref (C44fb) XXL_531 (MC13 FB) : MUX 9 Ref (D63fb) initialize (MC19 P) : MUX 11 Ref (E67p) Com_Ctrl_515 (MC1 FB) : MUX 12 Ref (A6fb) XXL_532 (MC12 FB) : MUX 13 Ref (D62fb) XXL_524 (MC5 FB) : MUX 14 Ref (B23fb) int_in_prog_low (MC20 P) : MUX 16 Ref (H126p) mams_ld_ctl (MC18 P) : MUX 18 Ref (C43p) XXL_533 (MC11 FB) : MUX 19 Ref (D58fb) XXL_520 (MC3 FB) : MUX 20 Ref (B20fb) XXL_530 (MC2 FB) : MUX 21 Ref (A12fb) XXL_539 (MC7 FB) : MUX 23 Ref (C42fb) XXL_525 (MC4 FB) : MUX 26 Ref (B22fb) p2_ifa_low.C (MC10 FB) : MUX 34 Ref (D51fb) p4_usint_low (MC15 FB) : MUX 35 Ref (F90fb) XXL_537 (MC9 FB) : MUX 37 Ref (C47fb) FanIn assignment for block G [32] { XXL_528,XXL_535,XXL_537,XXL_529,XXL_526,XXL_540,XXL_534,XXL_541,XXL_536, data10_low,data11_low, gdollar_0,gdollar_10,gdollar_1,gdollar_11,gdollar_9,gdollar_2, md08_low,md06_low,md07_low, p2_ifa_low.C,p4_int_in,p2_elar_low,p2_ifa_low.C,p2_emaen_low,p6_usm_low,p1_rr4,p1_rr3,p4_usint_low,p1_rr2, ts4_low,tp3, } Multiplexer assignment for block G data10_low (MC19 P) : MUX 1 Ref (F86p) gdollar_0 (MC16 FB) : MUX 2 Ref (E70fb) md08_low (MC30 P) : MUX 3 Ref (C37p) XXL_528 (MC6 FB) : MUX 4 Ref (D50fb) XXL_535 (MC2 FB) : MUX 5 Ref (A15fb) md06_low (MC31 P) : MUX 7 Ref (C38p) p1_rr0.AR (MC3 FB) : MUX 8 Ref (C36fb) gdollar_10 (MC26 FB) : MUX 9 Ref (H122fb) p4_int_in (MC1 FB) : MUX 10 Ref (A2fb) XXL_537 (MC5 FB) : MUX 11 Ref (C47fb) p2_elar_low (MC4 FB) : MUX 14 Ref (C39fb) md07_low (MC29 P) : MUX 15 Ref (C35p) p2_ifa_low.C (MC7 FB) : MUX 16 Ref (D51fb) data11_low (MC20 P) : MUX 17 Ref (F88p) gdollar_1 (MC17 FB) : MUX 18 Ref (E71fb) p2_emaen_low (MC25 FB) : MUX 19 Ref (H121fb) XXL_529 (MC12 FB) : MUX 21 Ref (D59fb) XXL_526 (MC11 FB) : MUX 22 Ref (D56fb) XXL_540 (MC8 FB) : MUX 24 Ref (D52fb) p6_usm_low (MC14 FB) : MUX 25 Ref (D61fb) XXL_534 (MC13 FB) : MUX 27 Ref (D60fb) gdollar_11 (MC24 FB) : MUX 28 Ref (H119fb) gdollar_9 (MC27 FB) : MUX 29 Ref (H124fb) XXL_541 (MC9 FB) : MUX 30 Ref (D54fb) ts4_low (MC28 P) : MUX 31 Ref (B21p) p1_rr4 (MC22 FB) : MUX 32 Ref (G97fb) gdollar_2 (MC18 FB) : MUX 33 Ref (E74fb) XXL_536 (MC10 FB) : MUX 34 Ref (D55fb) p1_rr3 (MC23 FB) : MUX 36 Ref (G99fb) p4_usint_low (MC21 FB) : MUX 37 Ref (F90fb) p1_rr2 (MC15 FB) : MUX 38 Ref (E67fb) tp3 (MC32 FB) : MUX 39 Ref (GCLK) FanIn assignment for block H [10] { XXL_524,XXL_523,XXL_525, cpma_disable_low, data11_low, n_t_37x, p1_rr0.AR,pause_low,p2_emaen_low, tp3, } Multiplexer assignment for block H XXL_524 (MC2 FB) : MUX 0 Ref (B23fb) data11_low (MC6 P) : MUX 3 Ref (F88p) cpma_disable_low (MC9 P) : MUX 7 Ref (E72p) p1_rr0.AR (MC4 FB) : MUX 8 Ref (C36fb) pause_low (MC8 P) : MUX 11 Ref (E69p) n_t_37x (MC5 P) : MUX 16 Ref (E77p) tp3 (MC10 FB) : MUX 23 Ref (GCLK) XXL_523 (MC3 FB) : MUX 29 Ref (B26fb) XXL_525 (MC1 FB) : MUX 30 Ref (B22fb) p2_emaen_low (MC7 FB) : MUX 31 Ref (H121fb) Creating JEDEC file C:\USERS\VINCE\DOCUMENTS\EAGLE\PROJECTS\DEC\MXXX\M8416\TOPLD\M8416V1.jed ... PLCC84 programmed logic: ----------------------------------- !c1_low = (md03_low & md04_low & md05_low & md06_low & !md09_low & md10_low & md11_low & p3_bpause.Q & md07_low & md08_low); !c0_low = (md03_low & md04_low & md05_low & md06_low & !md09_low & md10_low & p3_bpause.Q & md07_low & md08_low); !ema1_low = XXL_549; !ema0_low = XXL_548; !ema2_low = XXL_547; gdollar_0.D = !data08_low.PIN; gdollar_1.D = !data07_low.PIN; gdollar_2.D = !data06_low.PIN; gdollar_4.D = 0; gdollar_3.D = 0; n_t_168x.D = !p6_usm_low.Q; p1_bfl0 = ((md06_low & p6_usm_low.Q) # (!md06_low & !p1_rr2.Q & !p6_usm_low.Q & XXL_529) # (!md06_low & p1_rr2.Q & XXL_528 & !p6_usm_low.Q) # (md06_low & p1_rr2.Q & XXL_529) # (md06_low & !p1_rr2.Q & XXL_528)); !n_t_37x = (!power_ok_low & run_low & !ts1_low); p1_bfl1 = (XXL_552 # (!p6_usm_low.Q & md07_low & p1_rr3.Q & md08_low)); p1_bfl2 = ((md08_low & !p6_usm_low.Q & p1_rr4.Q) # (!md08_low & !p1_rr4.Q) # (!md08_low & p6_usm_low.Q)); p1_rr0.D = data07_low.PIN; p1_rr1.D = data08_low.PIN; p1_rr2.D = data09_low.PIN; p1_rr3.D = data10_low.PIN; p1_rr4.D = data11_low.PIN; p1_us0.D = data06_low.PIN; p1_us1.D = data07_low.PIN; p1_us2.D = data08_low.PIN; p1_us3.D = data09_low.PIN; p1_us4.D = data10_low.PIN; p1_us5.D = data11_low.PIN; p2_elar_low.D = 1; p2_emaen_low.D = !cpma_disable_low; p2_sf0.D = p2_ifc_low.Q; p2_sf1.D = p2_ifb_low.Q; p2_sf2.D = p2_ifa_low.Q; p2_sf3.D = p2_dfc_low.Q; p2_sf4.D = p2_dfb_low.Q; p2_sf5.D = p2_dfa_low.Q; p3_bpause.D = 0; p3_e2cfrom_low.D = 0; p4_fatal_lp_0_rp.D = 0; p4_init_en.D = 1; p4_int_in.D = 0; !p4_int = (int_in_prog_low & mams_ld_ctl); !p4_lxa = (!key_control_low & !la_en_low); p6_usm_low.D = n_t_176x.Q; !internal_io = (md04_low & !md05_low & !md06_low & !md07_low & !md08_low & !md09_low); n_t_176x.D = !data05_low.PIN; !user_mode_low = !p6_usm_low.Q; !p4_rtf_low = (md03_low & md04_low & md05_low & md06_low & !md09_low & md10_low & !md11_low & p3_bpause.Q & p6_usm_low.Q & md07_low & md08_low); skip_low = 1; data04_low = 1; data02_low = 1; data01_low = 1; !gdollar_9.D = XXL_525; !gdollar_10.D = XXL_524; !gdollar_11.D = XXL_523; int_rqst_low = (p4_usint_low.Q & XXL_520); !p2_dfa_low.D = XXL_523; !p2_dfb_low.D = XXL_524; !p2_dfc_low.D = XXL_525; !p4_dfen_low.D = ((!d_low & p4_lxa & ir0_low) # (!d_low & p4_lxa & !ir1_low) # (!p4_dfen_low.Q & f_set_low) # (!p4_dfen_low.Q & !mams_ld_ctl)); p4_new_fld = ((p4_lxa & !d_low & !ir0_low & ir1_low) # (p4_lxa & !f_low & !md00_low & md01_low & md03_low)); p4_usint_low.D = (p4_usint_low.Q & XXL_520); data00_low = XXL_541; data03_low = XXL_540; !gdollar_16.D = XXL_539; !gdollar_17.D = XXL_538; !gdollar_18.D = XXL_537; !p2_ifa_low.D = XXL_539; !p2_ifb_low.D = XXL_538; !p2_ifc_low.D = XXL_537; data06_low = XXL_536; data05_low = XXL_535; data07_low = XXL_534; data08_low = XXL_533; data10_low = XXL_532; data09_low = XXL_531; data11_low = XXL_530; Com_Ctrl_515 = ((!tp3 & XXL_522) # (tp3 & p4_rtf_low)); XXL_517 = ((md04_low & md07_low & md08_low) # (!md04_low & XXL_518)); !XXL_518 = (md07_low & md08_low); XXL_519 = ((!key_control_low & !la_en_low) # (md03_low & md04_low & md05_low & md06_low & !md09_low & md10_low & !md11_low & p3_bpause.Q & p6_usm_low.Q & md07_low & md08_low)); XXL_520 = (md00_low # XXL_553 # (md04_low & !md05_low & !md06_low & !md07_low & !md08_low & !md09_low)); XXL_522 = (!p4_pclr_low # (int_in_prog_low & mams_ld_ctl & tp4) # (!key_control_low & !la_en_low & pulse_la)); XXL_523 = ((md04_low & !md05_low & !md06_low & !md07_low & !md08_low & !md09_low & p1_bfl2) # (p4_dfen_low.Q & !p2_ifc_low.Q & !ts4_low & p4_int) # (data11_low.PIN & XXL_519) # (!p2_dfa_low.Q & !p4_dfen_low.Q & p4_init_en.Q)); XXL_524 = ((md04_low & !md05_low & !md06_low & !md07_low & !md08_low & !md09_low & p1_bfl1) # (p4_dfen_low.Q & !p2_ifb_low.Q & !ts4_low & p4_int) # (data10_low.PIN & XXL_519) # (!p2_dfb_low.Q & !p4_dfen_low.Q & p4_init_en.Q)); XXL_525 = ((md04_low & !md05_low & !md06_low & !md07_low & !md08_low & !md09_low & !p1_bfl0) # (p4_dfen_low.Q & !p2_ifa_low.Q & !ts4_low & p4_int) # (data09_low.PIN & XXL_519) # (!p2_dfc_low.Q & !p4_dfen_low.Q & p4_init_en.Q)); XXL_526 = ((!md08_low & p1_rr4.Q) # p1_rr3.Q); XXL_528 = ((md07_low & XXL_550) # (md07_low & md08_low) # !XXL_526); XXL_529 = ((!md07_low & XXL_526) # (!md08_low & p1_rr3.Q & p1_rr4.Q)); XXL_530 = (XXL_518 # (!ts3_low & XXL_517) # XXL_554 # XXL_555 # !p6_usm_low.Q); XXL_531 = (XXL_518 # (!ts3_low & XXL_517) # XXL_556 # XXL_557 # !p6_usm_low.Q); XXL_532 = (XXL_518 # (!ts3_low & XXL_517) # XXL_558 # XXL_559 # !p6_usm_low.Q); XXL_533 = (XXL_518 # (!ts3_low & XXL_517) # XXL_560 # XXL_561 # !p6_usm_low.Q); XXL_534 = (XXL_518 # (!ts3_low & XXL_517) # XXL_562 # XXL_563 # !p6_usm_low.Q); XXL_535 = ((SF551 & XXL_518) # (md03_low & md05_low & md06_low & !md09_low & md10_low & md11_low & p3_bpause.Q & !ts3_low & XXL_517) # XXL_564 # XXL_565 # (!p6_usm_low.Q & SF551)); XXL_536 = (XXL_518 # (!ts3_low & XXL_517) # XXL_566 # XXL_567 # !p6_usm_low.Q); XXL_537 = ((md04_low & !md05_low & !md06_low & !md07_low & !md08_low & !md09_low & !p1_bfl0) # (data06_low.PIN & XXL_519) # (!gdollar_18.Q & p4_int & p4_new_fld)); XXL_538 = ((md04_low & !md05_low & !md06_low & !md07_low & !md08_low & !md09_low & p1_bfl1) # (data07_low.PIN & XXL_519) # (!gdollar_17.Q & p4_int & p4_new_fld)); XXL_539 = ((md04_low & !md05_low & !md06_low & !md07_low & !md08_low & !md09_low & p1_bfl2) # (data08_low.PIN & XXL_519) # (!gdollar_16.Q & p4_int & p4_new_fld)); XXL_540 = (XXL_518 # (!ts3_low & XXL_517) # XXL_568 # XXL_569 # !p6_usm_low.Q); XXL_541 = (XXL_518 # (!ts3_low & XXL_517) # XXL_570 # XXL_571 # !p6_usm_low.Q); XXL_547 = ((!gdollar_9.Q & !p2_emaen_low.Q) # (!gdollar_0.Q & !p2_elar_low.Q)); XXL_548 = ((!gdollar_11.Q & !p2_emaen_low.Q) # (!gdollar_2.Q & !p2_elar_low.Q)); XXL_549 = ((!gdollar_10.Q & !p2_emaen_low.Q) # (!gdollar_1.Q & !p2_elar_low.Q)); !XXL_550 = (p1_rr3.Q & p1_rr4.Q); !SF551 = (ind1_low & ind2_low & la_en_low & !p6_usm_low.Q & !ts1_low); XXL_552 = ((!md07_low & p6_usm_low.Q) # (!md07_low & !XXL_526) # (md07_low & p1_rr3.Q & !p1_rr4.Q & !p6_usm_low.Q) # (md07_low & !p1_rr3.Q & !md08_low & p1_rr4.Q & !p6_usm_low.Q) # (!md07_low & p1_rr3.Q & !md08_low & p1_rr4.Q)); XXL_553 = (!md02_low # p6_usm_low.Q # f_low # (!key_control_low & !la_en_low) # md01_low); XXL_554 = (!md03_low # !md04_low # !md05_low # !md06_low # (ind2_low & la_en_low & !ts1_low)); !XXL_555 = (!md09_low & md10_low & md11_low & !p2_sf5.Q & p3_bpause.Q); XXL_556 = (!md03_low # !md04_low # !md05_low # !md06_low # (ind2_low & la_en_low & !ts1_low)); !XXL_557 = (!md09_low & md10_low & md11_low & !p2_sf3.Q & p3_bpause.Q); XXL_558 = (!md03_low # !md04_low # !md05_low # !md06_low # (ind2_low & la_en_low & !ts1_low)); !XXL_559 = (!md09_low & md10_low & md11_low & !p2_sf4.Q & p3_bpause.Q); XXL_560 = (!md03_low # !md04_low # !md05_low # !md06_low # (ind2_low & la_en_low & !ts1_low)); !XXL_561 = (!md09_low & md10_low & md11_low & !p2_sf2.Q & p3_bpause.Q); XXL_562 = (!md03_low # !md04_low # !md05_low # !md06_low # (ind2_low & la_en_low & !ts1_low)); !XXL_563 = (!md09_low & md10_low & md11_low & !p2_sf1.Q & p3_bpause.Q); XXL_564 = ((!md03_low & SF551) # (SF551 & !md04_low) # (SF551 & !md05_low) # (SF551 & !md06_low) # (ind2_low & la_en_low & !ts1_low)); XXL_565 = ((SF551 & !md10_low) # (SF551 & !md11_low) # (SF551 & !n_t_168x.Q) # (SF551 & !p3_bpause.Q) # (md09_low & SF551)); XXL_566 = (!md03_low # !md04_low # !md05_low # !md06_low # (ind2_low & la_en_low & !ts1_low)); !XXL_567 = (!md09_low & md10_low & md11_low & !p2_sf0.Q & p3_bpause.Q); XXL_568 = (p4_fatal_lp_0_rp.Q # !md03_low # !md04_low # !md05_low # (ind2_low & la_en_low & !ts1_low)); !XXL_569 = (md06_low & !md09_low & md10_low & md11_low & p3_bpause.Q); XXL_570 = (link_low # !md03_low # !md04_low # !md05_low # (ind2_low & la_en_low & !ts1_low)); !XXL_571 = (md06_low & !md09_low & md10_low & md11_low & p3_bpause.Q); c1_low.OE = !c1_low.PIN; c0_low.OE = !c0_low.PIN; ema1_low.OE = XXL_549; ema0_low.OE = XXL_548; ema2_low.OE = XXL_547; gdollar_0.C = (!key_control_low & !la_en_low & pulse_la); gdollar_0.AR = p4_pclr; gdollar_0.OE = !p2_elar_low.Q; gdollar_1.C = (!key_control_low & !la_en_low & pulse_la); gdollar_1.AR = p4_pclr; gdollar_1.OE = !p2_elar_low.Q; gdollar_2.C = (!key_control_low & !la_en_low & pulse_la); gdollar_2.AR = p4_pclr; gdollar_2.OE = !p2_elar_low.Q; gdollar_4.C = 0; gdollar_3.C = 0; n_t_168x.C = (int_in_prog_low & mams_ld_ctl & tp4); p1_rr0.C = 0; p1_rr0.AR = ((!key_control_low & !la_en_low & pulse_la) # !p4_pclr_low); p1_rr1.C = 0; p1_rr1.AR = p1_rr0.AR; p1_rr2.C = 0; p1_rr2.AR = p1_rr0.AR; p1_rr3.C = 0; p1_rr3.AR = p1_rr0.AR; p1_rr4.C = 0; p1_rr4.AR = p1_rr0.AR; p1_us0.C = 0; p1_us0.AR = p1_rr0.AR; p1_us1.C = 0; p1_us1.AR = p1_rr0.AR; p1_us2.C = 0; p1_us2.AR = p1_rr0.AR; p1_us3.C = 0; p1_us3.AR = p1_rr0.AR; p1_us4.C = 0; p1_us4.AR = p1_rr0.AR; p1_us5.C = 0; p1_us5.AR = p1_rr0.AR; p2_elar_low.C = tp4; p2_elar_low.AR = (!key_control_low & !la_en_low & pulse_la); p2_elar_low.AP = !p4_pclr_low; p2_emaen_low.C = tp4; p2_emaen_low.AP = p1_rr0.AR; p2_sf0.C = (int_in_prog_low & mams_ld_ctl & tp4); p2_sf1.C = (int_in_prog_low & mams_ld_ctl & tp4); p2_sf2.C = (int_in_prog_low & mams_ld_ctl & tp4); p2_sf3.C = (int_in_prog_low & mams_ld_ctl & tp4); p2_sf4.C = (int_in_prog_low & mams_ld_ctl & tp4); p2_sf5.C = (int_in_prog_low & mams_ld_ctl & tp4); p3_bpause.C = 0; p3_bpause.AR = (pause_low & !tp3); p3_bpause.AP = (!pause_low & !tp3); p3_e2cfrom_low.C = 0; p3_e2cfrom_low.AR = (!tp3 & ts4_low); p3_e2cfrom_low.AP = (!tp3 & !ts4_low); p4_fatal_lp_0_rp.C = 0; p4_fatal_lp_0_rp.AR = (p4_int_in.Q & !p4_usint_low.Q); p4_fatal_lp_0_rp.AP = p4_usint_low.Q; p4_init_en.C = p4_pclr_low; p4_init_en.AR = !n_t_37x; p4_int_in.C = 0; p4_int_in.AR = ((tp3 & p4_new_fld) # XXL_522); p4_int_in.AP = (tp3 & p4_rtf_low); p6_usm_low.C = (tp3 & p4_new_fld); p6_usm_low.AP = XXL_522; internal_io.OE = internal_io.PIN; n_t_176x.C = (tp3 & p4_rtf_low); n_t_176x.AP = XXL_522; user_mode_low.OE = !p6_usm_low.Q; gdollar_9.C = tp4; gdollar_9.AR = p4_pclr; gdollar_9.OE = !p2_emaen_low.Q; gdollar_10.C = tp4; gdollar_10.AR = p4_pclr; gdollar_10.OE = !p2_emaen_low.Q; gdollar_11.C = tp4; gdollar_11.AR = p4_pclr; gdollar_11.OE = !p2_emaen_low.Q; !int_rqst_low.OE = (p4_usint_low.Q & XXL_520); p2_dfa_low.C = Com_Ctrl_515; p2_dfb_low.C = Com_Ctrl_515; p2_dfc_low.C = Com_Ctrl_515; p4_dfen_low.C = tp3; p4_dfen_low.AP = XXL_522; p4_usint_low.C = tp3; p4_usint_low.AP = initialize; !data00_low.OE = XXL_541; !data03_low.OE = XXL_540; gdollar_16.C = Com_Ctrl_515; gdollar_16.OE = (p4_int & p4_new_fld); gdollar_17.C = Com_Ctrl_515; gdollar_17.OE = (p4_int & p4_new_fld); gdollar_18.C = Com_Ctrl_515; gdollar_18.OE = (p4_int & p4_new_fld); p2_ifa_low.C = ((!tp3 & XXL_522) # (tp3 & p4_new_fld)); p2_ifb_low.C = p2_ifa_low.C; p2_ifc_low.C = p2_ifa_low.C; !data06_low.OE = XXL_536; !data05_low.OE = XXL_535; !data07_low.OE = XXL_534; !data08_low.OE = XXL_533; !data10_low.OE = XXL_532; !data09_low.OE = XXL_531; !data11_low.OE = XXL_530; PLCC84 Pin/Node Placement: ------------------------------------ Pin 1 = p4_pclr; Pin 2 = p4_pclr_low; Pin 4 = user_mode_low; /* MC 16 */ Pin 5 = data01_low; /* MC 14 */ Pin 6 = data02_low; /* MC 13 */ Pin 8 = data04_low; /* MC 11 */ Pin 9 = skip_low; /* MC 8 */ Pin 10 = key_control_low; /* MC 6 */ Pin 11 = md04_low; /* MC 5 */ Pin 12 = md05_low; /* MC 3 */ Pin 14 = TDI; /* MC 32 */ Pin 15 = internal_io; /* MC 29 */ Pin 16 = link_low; /* MC 27 */ Pin 17 = pulse_la; /* MC 25 */ Pin 18 = md00_low; /* MC 24 */ Pin 20 = ts4_low; /* MC 21 */ Pin 21 = ts3_low; /* MC 19 */ Pin 22 = ind1_low; /* MC 17 */ Pin 23 = TMS; /* MC 48 */ Pin 24 = c1_low; /* MC 46 */ Pin 25 = c0_low; /* MC 45 */ Pin 27 = mams_ld_ctl; /* MC 43 */ Pin 28 = md09_low; /* MC 40 */ Pin 29 = md06_low; /* MC 38 */ Pin 30 = md08_low; /* MC 37 */ Pin 31 = md07_low; /* MC 35 */ Pin 33 = f_low; /* MC 64 */ Pin 34 = md02_low; /* MC 61 */ Pin 35 = f_set_low; /* MC 59 */ Pin 36 = ir1_low; /* MC 57 */ Pin 37 = ir0_low; /* MC 56 */ Pin 39 = d_low; /* MC 53 */ Pin 40 = run_low; /* MC 51 */ Pin 41 = power_ok_low; /* MC 49 */ Pin 44 = md01_low; /* MC 65 */ Pin 45 = initialize; /* MC 67 */ Pin 46 = pause_low; /* MC 69 */ Pin 48 = cpma_disable_low; /* MC 72 */ Pin 50 = md03_low; /* MC 75 */ Pin 51 = n_t_37x; /* MC 77 */ Pin 52 = ema2_low; /* MC 80 */ Pin 54 = data08_low; /* MC 83 */ Pin 55 = data09_low; /* MC 85 */ Pin 56 = data10_low; /* MC 86 */ Pin 57 = data11_low; /* MC 88 */ Pin 58 = ema0_low; /* MC 91 */ Pin 60 = ema1_low; /* MC 93 */ Pin 61 = int_rqst_low; /* MC 94 */ Pin 62 = TCK; /* MC 96 */ Pin 65 = data00_low; /* MC 101 */ Pin 67 = data03_low; /* MC 104 */ Pin 68 = data05_low; /* MC 105 */ Pin 69 = data07_low; /* MC 107 */ Pin 70 = data06_low; /* MC 109 */ Pin 71 = TDO; /* MC 112 */ Pin 73 = ind2_low; /* MC 115 */ Pin 74 = la_en_low; /* MC 117 */ Pin 75 = ts1_low; /* MC 118 */ Pin 77 = md10_low; /* MC 123 */ Pin 79 = md11_low; /* MC 125 */ Pin 80 = int_in_prog_low; /* MC 126 */ Pin 81 = tp4; /* MC 128 */ Pin 83 = tp3; PINNODE 311 = XXL_555; /* MC 11 Foldback */ PINNODE 313 = SF551; /* MC 13 Foldback */ PINNODE 314 = XXL_518; /* MC 14 Foldback */ PINNODE 316 = p4_rtf_low; /* MC 16 Foldback */ PINNODE 329 = p4_int; /* MC 29 Foldback */ PINNODE 347 = p4_int; /* MC 47 Foldback */ PINNODE 349 = XXL_571; /* MC 49 Foldback */ PINNODE 350 = XXL_569; /* MC 50 Foldback */ PINNODE 351 = XXL_567; /* MC 51 Foldback */ PINNODE 353 = XXL_563; /* MC 53 Foldback */ PINNODE 356 = XXL_561; /* MC 56 Foldback */ PINNODE 357 = XXL_559; /* MC 57 Foldback */ PINNODE 359 = XXL_557; /* MC 59 Foldback */ PINNODE 361 = XXL_550; /* MC 61 Foldback */ PINNODE 364 = XXL_518; /* MC 64 Foldback */ PINNODE 377 = SF551; /* MC 77 Foldback */ PINNODE 380 = p4_lxa; /* MC 80 Foldback */ PINNODE 396 = p4_int; /* MC 96 Foldback */ PINNODE 601 = n_t_176x; /* MC 1 Feedback */ PINNODE 602 = p4_int_in; /* MC 2 Feedback */ PINNODE 603 = XXL_517; /* MC 3 Feedback */ PINNODE 604 = XXL_558; /* MC 4 Feedback */ PINNODE 605 = XXL_519; /* MC 5 Feedback */ PINNODE 606 = Com_Ctrl_515; /* MC 6 Feedback */ PINNODE 607 = XXL_554; /* MC 7 Feedback */ PINNODE 609 = XXL_556; /* MC 9 Feedback */ PINNODE 610 = XXL_564; /* MC 10 Feedback */ PINNODE 612 = XXL_530; /* MC 12 Feedback */ PINNODE 615 = XXL_535; /* MC 15 Feedback */ PINNODE 617 = gdollar_3; /* MC 17 Feedback */ PINNODE 618 = p2_sf0; /* MC 18 Feedback */ PINNODE 619 = p2_sf5; /* MC 19 Feedback */ PINNODE 620 = XXL_520; /* MC 20 Feedback */ PINNODE 621 = p2_sf4; /* MC 21 Feedback */ PINNODE 622 = XXL_525; /* MC 22 Feedback */ PINNODE 623 = XXL_524; /* MC 23 Feedback */ PINNODE 624 = p2_sf3; /* MC 24 Feedback */ PINNODE 625 = p2_sf2; /* MC 25 Feedback */ PINNODE 626 = XXL_523; /* MC 26 Feedback */ PINNODE 627 = p2_sf1; /* MC 27 Feedback */ PINNODE 628 = XXL_568; /* MC 28 Feedback */ PINNODE 630 = XXL_566; /* MC 30 Feedback */ PINNODE 631 = XXL_562; /* MC 31 Feedback */ PINNODE 632 = XXL_560; /* MC 32 Feedback */ PINNODE 634 = gdollar_4; /* MC 34 Feedback */ PINNODE 636 = p1_rr0.AR; /* MC 36 Feedback */ PINNODE 639 = p2_elar_low; /* MC 39 Feedback */ PINNODE 641 = XXL_522; /* MC 41 Feedback */ PINNODE 642 = XXL_539; /* MC 42 Feedback */ PINNODE 644 = XXL_538; /* MC 44 Feedback */ PINNODE 647 = XXL_537; /* MC 47 Feedback */ PINNODE 648 = XXL_570; /* MC 48 Feedback */ PINNODE 649 = p4_int_in.AR; /* MC 49 Feedback */ PINNODE 650 = XXL_528; /* MC 50 Feedback */ PINNODE 651 = p2_ifa_low.C; /* MC 51 Feedback */ PINNODE 652 = XXL_540; /* MC 52 Feedback */ PINNODE 653 = n_t_168x; /* MC 53 Feedback */ PINNODE 654 = XXL_541; /* MC 54 Feedback */ PINNODE 655 = XXL_536; /* MC 55 Feedback */ PINNODE 656 = XXL_526; /* MC 56 Feedback */ PINNODE 657 = p1_bfl1; /* MC 57 Feedback */ PINNODE 658 = XXL_533; /* MC 58 Feedback */ PINNODE 659 = XXL_529; /* MC 59 Feedback */ PINNODE 660 = XXL_534; /* MC 60 Feedback */ PINNODE 661 = p6_usm_low; /* MC 61 Feedback */ PINNODE 662 = XXL_532; /* MC 62 Feedback */ PINNODE 663 = XXL_531; /* MC 63 Feedback */ PINNODE 664 = p1_bfl2; /* MC 64 Feedback */ PINNODE 665 = p1_us3; /* MC 65 Feedback */ PINNODE 666 = p1_rr0; /* MC 66 Feedback */ PINNODE 667 = p1_rr2; /* MC 67 Feedback */ PINNODE 668 = p4_new_fld; /* MC 68 Feedback */ PINNODE 669 = p1_us2; /* MC 69 Feedback */ PINNODE 670 = gdollar_0; /* MC 70 Feedback */ PINNODE 671 = gdollar_1; /* MC 71 Feedback */ PINNODE 672 = p1_us1; /* MC 72 Feedback */ PINNODE 673 = p1_rr1; /* MC 73 Feedback */ PINNODE 674 = gdollar_2; /* MC 74 Feedback */ PINNODE 675 = p1_us0; /* MC 75 Feedback */ PINNODE 676 = XXL_553; /* MC 76 Feedback */ PINNODE 678 = XXL_565; /* MC 78 Feedback */ PINNODE 679 = p4_dfen_low; /* MC 79 Feedback */ PINNODE 681 = p2_ifb_low; /* MC 81 Feedback */ PINNODE 682 = p2_ifa_low; /* MC 82 Feedback */ PINNODE 684 = p2_dfc_low; /* MC 84 Feedback */ PINNODE 687 = p2_dfb_low; /* MC 87 Feedback */ PINNODE 689 = p2_dfa_low; /* MC 89 Feedback */ PINNODE 690 = p4_usint_low; /* MC 90 Feedback */ PINNODE 692 = gdollar_17; /* MC 92 Feedback */ PINNODE 695 = gdollar_18; /* MC 95 Feedback */ PINNODE 696 = gdollar_16; /* MC 96 Feedback */ PINNODE 697 = p1_rr4; /* MC 97 Feedback */ PINNODE 698 = p1_us4; /* MC 98 Feedback */ PINNODE 699 = p1_rr3; /* MC 99 Feedback */ PINNODE 700 = p2_ifc_low; /* MC 100 Feedback */ PINNODE 702 = XXL_549; /* MC 102 Feedback */ PINNODE 703 = p1_bfl0; /* MC 103 Feedback */ PINNODE 706 = XXL_547; /* MC 106 Feedback */ PINNODE 708 = p3_e2cfrom_low; /* MC 108 Feedback */ PINNODE 710 = p4_fatal_lp_0_rp; /* MC 110 Feedback */ PINNODE 711 = XXL_548; /* MC 111 Feedback */ PINNODE 712 = XXL_552; /* MC 112 Feedback */ PINNODE 716 = p4_init_en; /* MC 116 Feedback */ PINNODE 719 = gdollar_11; /* MC 119 Feedback */ PINNODE 721 = p2_emaen_low; /* MC 121 Feedback */ PINNODE 722 = gdollar_10; /* MC 122 Feedback */ PINNODE 724 = gdollar_9; /* MC 124 Feedback */ PINNODE 727 = p1_us5; /* MC 127 Feedback */ PINNODE 728 = p3_bpause; /* MC 128 Feedback */ ** Resource Usage ** DCERP Field = Summary of Allocations. ||||| |||||_Preset [p,-] == p = PT preset, - No Preset. |||| ||||__Reset [g,r,-] == g= Global AR, r = PT reset, - No reset. ||| |||___Clock Enable [e,-] == e = Product Term, - always enabled, - none. || ||____Clock [c,g,-], == c = Product term, g = Global term, - No Clock. | |_____Type [C,D,L,T], == Register type C= combin, D=dff, L=latch, T=tff. For input only = INPUT. MCell Pin# Oe PinDrive DCERP FBDrive DCERP Foldback CascadeOut TotPT output_slew MC1 0 -- n_t_176x Dc--p -- -- 3 slow MC2 0 -- p4_int_in D--rp -- -- 2 slow MC3 12 -- md05_low INPUT XXL_517 C---- -- -- 2 slow MC4 0 -- XXL_558 C---- NA -- 5 slow MC5 11 -- md04_low INPUT XXL_519 C---- -- -- 2 slow MC6 10 -- key_control_low INPUT Com_Ctrl_515 C---- -- -- 2 slow MC7 0 -- XXL_554 C---- NA -- 5 slow MC8 9 on skip_low C---- -- -- -- 0 slow MC9 0 -- XXL_556 C---- NA -- 5 slow MC10 0 -- XXL_564 C---- NA -- 5 slow MC11 8 on data04_low C---- -- XXL_555 -- 1 slow MC12 0 -- XXL_530 C---- NA -- 5 slow MC13 6 on data02_low C---- -- SF551 -- 1 slow MC14 5 on data01_low C---- -- XXL_518 -- 1 slow MC15 0 -- XXL_535 C---- NA -- 5 slow MC16 4 PT user_mode_low C---- -- p4_rtf_low -- 3 slow MC17 22 -- ind1_low INPUT gdollar_3 D---- -- -- 0 slow MC18 0 -- p2_sf0 Dc--- -- -- 2 slow MC19 21 -- ts3_low INPUT p2_sf5 Dc--- -- -- 2 slow MC20 0 -- XXL_520 C---- -- -- 3 slow MC21 20 -- ts4_low INPUT p2_sf4 Dc--- -- -- 2 slow MC22 0 -- XXL_525 C---- -- -- 4 slow MC23 0 -- XXL_524 C---- -- -- 4 slow MC24 18 -- md00_low INPUT p2_sf3 Dc--- -- -- 2 slow MC25 17 -- pulse_la INPUT p2_sf2 Dc--- -- -- 2 slow MC26 0 -- XXL_523 C---- -- -- 4 slow MC27 16 -- link_low INPUT p2_sf1 Dc--- -- -- 2 slow MC28 0 -- XXL_568 C---- NA -- 5 slow MC29 15 PT internal_io C---- -- p4_int -- 3 slow MC30 0 -- XXL_566 C---- NA -- 5 slow MC31 0 -- XXL_562 C---- NA -- 5 slow MC32 14 -- TDI INPUT XXL_560 C---- NA -- 5 slow MC33 0 -- -- -- -- 0 slow MC34 0 -- gdollar_4 D---- -- -- 0 slow MC35 31 -- md07_low INPUT -- -- -- 0 slow MC36 0 -- p1_rr0.AR C---- -- -- 2 slow MC37 30 -- md08_low INPUT -- -- -- 0 slow MC38 29 -- md06_low INPUT -- -- -- 0 slow MC39 0 -- p2_elar_low Dg-rp -- -- 2 slow MC40 28 -- md09_low INPUT -- -- -- 0 slow MC41 0 -- XXL_522 C---- -- -- 3 slow MC42 0 -- XXL_539 C---- -- -- 3 slow MC43 27 -- mams_ld_ctl INPUT -- -- -- 0 slow MC44 0 -- XXL_538 C---- -- -- 3 slow MC45 25 PT c0_low C---- -- -- -- 2 slow MC46 24 PT c1_low C---- -- -- -- 2 slow MC47 0 -- XXL_537 C---- p4_int -- 4 slow MC48 23 -- TMS INPUT XXL_570 C---- NA -- 5 slow MC49 41 -- power_ok_low INPUT p4_int_in.AR C---- XXL_571 -- 3 slow MC50 0 -- XXL_528 C---- XXL_569 -- 4 slow MC51 40 -- run_low INPUT p2_ifa_low.C C---- XXL_567 -- 3 slow MC52 0 -- XXL_540 C---- NA -- 5 slow MC53 39 -- d_low INPUT n_t_168x Dc--- XXL_563 -- 3 slow MC54 0 -- XXL_541 C---- NA -- 5 slow MC55 0 -- XXL_536 C---- NA -- 5 slow MC56 37 -- ir0_low INPUT XXL_526 C---- XXL_561 -- 3 slow MC57 36 -- ir1_low INPUT p1_bfl1 C---- XXL_559 -- 3 slow MC58 0 -- XXL_533 C---- NA -- 5 slow MC59 35 -- f_set_low INPUT XXL_529 C---- XXL_557 -- 3 slow MC60 0 -- XXL_534 C---- NA -- 5 slow MC61 34 -- md02_low INPUT p6_usm_low Dc--p XXL_550 -- 4 slow MC62 0 -- XXL_532 C---- NA -- 5 slow MC63 0 -- XXL_531 C---- NA -- 5 slow MC64 33 -- f_low INPUT p1_bfl2 C---- XXL_518 -- 4 slow MC65 44 -- md01_low INPUT p1_us3 D--r- -- -- 2 slow MC66 0 -- p1_rr0 D--r- -- -- 2 slow MC67 45 -- initialize INPUT p1_rr2 D--r- -- -- 2 slow MC68 0 -- p4_new_fld C---- -- -- 2 slow MC69 46 -- pause_low INPUT p1_us2 D--r- -- -- 2 slow MC70 0 PT -- gdollar_0 Dc-g- -- -- 3 slow MC71 0 PT -- gdollar_1 Dc-g- -- -- 3 slow MC72 48 -- cpma_disable_low INPUT p1_us1 D--r- -- -- 2 slow MC73 49 -- p1_rr1 D--r- -- -- 2 slow MC74 0 PT -- gdollar_2 Dc-g- -- -- 3 slow MC75 50 -- md03_low INPUT p1_us0 D--r- -- -- 2 slow MC76 0 -- XXL_553 C---- NA -- 5 slow MC77 51 on n_t_37x C---- -- SF551 -- 2 slow MC78 0 -- XXL_565 C---- NA -- 5 slow MC79 0 -- p4_dfen_low Dg--p NA -- 5 slow MC80 52 PT ema2_low C---- -- p4_lxa -- 3 slow MC81 0 -- p2_ifb_low Dc--- -- -- 2 slow MC82 0 -- p2_ifa_low Dc--- -- -- 2 slow MC83 54 PT data08_low C---- -- -- -- 2 slow MC84 0 -- p2_dfc_low Dc--- -- -- 2 slow MC85 55 PT data09_low C---- -- -- -- 2 slow MC86 56 PT data10_low C---- -- -- -- 2 slow MC87 0 -- p2_dfb_low Dc--- -- -- 2 slow MC88 57 PT data11_low C---- -- -- -- 2 slow MC89 0 -- p2_dfa_low Dc--- -- -- 2 slow MC90 0 -- p4_usint_low Dg--p -- -- 2 slow MC91 58 PT ema0_low C---- -- -- -- 2 slow MC92 0 PT -- gdollar_17 Dc--- -- -- 3 slow MC93 60 PT ema1_low C---- -- -- -- 2 slow MC94 61 PT int_rqst_low C---- -- -- -- 2 slow MC95 0 PT -- gdollar_18 Dc--- -- -- 3 slow MC96 62 PT TCK INPUT gdollar_16 Dc--- p4_int -- 4 slow MC97 63 -- p1_rr4 D--r- -- -- 2 slow MC98 0 -- p1_us4 D--r- -- -- 2 slow MC99 64 -- p1_rr3 D--r- -- -- 2 slow MC100 0 -- p2_ifc_low Dc--- -- -- 2 slow MC101 65 PT data00_low C---- -- -- -- 2 slow MC102 0 -- XXL_549 C---- -- -- 2 slow MC103 0 -- p1_bfl0 C---- NA -- 5 slow MC104 67 PT data03_low C---- -- -- -- 2 slow MC105 68 PT data05_low C---- -- -- -- 2 slow MC106 0 -- XXL_547 C---- -- -- 2 slow MC107 69 PT data07_low C---- -- -- -- 2 slow MC108 0 -- p3_e2cfrom_low D--rp -- -- 2 slow MC109 70 PT data06_low C---- -- -- -- 2 slow MC110 0 -- p4_fatal_lp_0_rp D--rp -- -- 2 slow MC111 0 -- XXL_548 C---- -- -- 2 slow MC112 71 -- TDO INPUT XXL_552 C---- NA -- 5 slow MC113 0 -- -- -- -- 0 slow MC114 0 -- -- -- -- 0 slow MC115 73 -- ind2_low INPUT -- -- -- 0 slow MC116 0 -- p4_init_en Dg-r- -- -- 1 slow MC117 74 -- la_en_low INPUT -- -- -- 0 slow MC118 75 -- ts1_low INPUT -- -- -- 0 slow MC119 0 PT -- gdollar_11 Dg-g- -- -- 2 slow MC120 76 -- -- -- -- 0 slow MC121 0 -- p2_emaen_low Dg--p -- -- 2 slow MC122 0 PT -- gdollar_10 Dg-g- -- -- 2 slow MC123 77 -- md10_low INPUT -- -- -- 0 slow MC124 0 PT -- gdollar_9 Dg-g- -- -- 2 slow MC125 79 -- md11_low INPUT -- -- -- 0 slow MC126 80 -- int_in_prog_low INPUT -- -- -- 0 slow MC127 0 -- p1_us5 D--r- -- -- 2 slow MC128 81 -- tp4 INPUT p3_bpause D--rp -- -- 2 slow MC0 2 p4_pclr_low INPUT -- -- -- 0 slow MC0 1 p4_pclr INPUT -- -- -- 0 slow MC0 84 -- -- -- -- 0 slow MC0 83 tp3 INPUT -- -- -- 0 slow Logic Array Block Logic Cells I/O Pins Foldbacks TotalPT FanIN Cascades A: LC1 - LC16 16/16(100%) 8/16(50%) 4/16(25%) 47/80(58%) (26) 0 B: LC17 - LC32 16/16(100%) 8/16(50%) 1/16(6%) 50/80(62%) (33) 0 C: LC33 - LC48 10/16(62%) 8/16(50%) 1/16(6%) 26/80(32%) (33) 0 D: LC49 - LC64 16/16(100%) 8/16(50%) 9/16(56%) 65/80(81%) (33) 0 E: LC65 - LC80 16/16(100%) 7/16(43%) 2/16(12%) 45/80(56%) (33) 0 F: LC81 - LC96 16/16(100%) 8/16(50%) 1/16(6%) 36/80(45%) (20) 0 G: LC97 - LC112 16/16(100%) 6/16(37%) 0/16(0%) 38/80(47%) (32) 0 H: LC113- LC128 7/16(43%) 7/16(43%) 0/16(0%) 13/80(16%) (10) 0 Total dedicated input used: 3/4 (75%) Total I/O pins used 60/64 (93%) Total Logic cells used 113/128 (88%) Total Flip-Flop used 46/128 (35%) Total Foldback logic used 18/128 (14%) Total Nodes+FB/MCells 131/128 (102%) Total cascade used 0 Total input pins 41 Total output pins 22 Total Pts 320 Creating pla file C:\USERS\VINCE\DOCUMENTS\EAGLE\PROJECTS\DEC\MXXX\M8416\TOPLD\M8416V1.tt3 with 0 inputs 0 outputs, 0 pins 0 nodes and 0 pterms... ---------------- End fitter, Design FITS $Device PLCC84 fits FIT1508 completed in 0.00 seconds