{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "Quartus II" 0 -1 1688087257661 ""} { "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II 64-Bit " "Running Quartus II 64-Bit Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition " "Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition" { } { } 0 0 "%1!s!" 0 0 "Quartus II" 0 -1 1688087257739 ""} { "Info" "IQEXE_START_BANNER_TIME" "Thu Jun 29 18:07:36 2023 " "Processing started: Thu Jun 29 18:07:36 2023" { } { } 0 0 "Processing started: %1!s!" 0 0 "Quartus II" 0 -1 1688087257739 ""} } { } 4 0 "Running %2!s! %1!s!" 0 0 "Quartus II" 0 -1 1688087257739 ""} { "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off M8650 -c M8650 " "Command: quartus_map --read_settings_files=on --write_settings_files=off M8650 -c M8650" { } { } 0 0 "Command: %1!s!" 0 0 "Quartus II" 0 -1 1688087257740 ""} { "Warning" "WQCU_PARALLEL_NO_LICENSE" "" "Parallel compilation is not licensed and has been disabled" { } { } 0 20028 "Parallel compilation is not licensed and has been disabled" 0 0 "Quartus II" 0 -1 1688087258493 ""} { "Warning" "WVRFX_L3_VERI_CONST_EVENT_EXPR" "M8650.v(305) " "Verilog HDL Event Control warning at M8650.v(305): event expression is a constant" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 305 0 0 } } } 0 10262 "Verilog HDL Event Control warning at %1!s!: event expression is a constant" 1 0 "Quartus II" 0 -1 1688087258763 ""} { "Warning" "WVRFX_L3_VERI_CONST_EVENT_EXPR" "M8650.v(427) " "Verilog HDL Event Control warning at M8650.v(427): event expression is a constant" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 427 0 0 } } } 0 10262 "Verilog HDL Event Control warning at %1!s!: event expression is a constant" 1 0 "Quartus II" 0 -1 1688087258764 ""} { "Warning" "WVRFX_L3_VERI_CONST_EVENT_EXPR" "M8650.v(447) " "Verilog HDL Event Control warning at M8650.v(447): event expression is a constant" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 447 0 0 } } } 0 10262 "Verilog HDL Event Control warning at %1!s!: event expression is a constant" 1 0 "Quartus II" 0 -1 1688087258765 ""} { "Warning" "WVRFX_L3_VERI_CONST_EVENT_EXPR" "M8650.v(596) " "Verilog HDL Event Control warning at M8650.v(596): event expression is a constant" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 596 0 0 } } } 0 10262 "Verilog HDL Event Control warning at %1!s!: event expression is a constant" 1 0 "Quartus II" 0 -1 1688087258765 ""} { "Warning" "WVRFX_L3_VERI_CONST_EVENT_EXPR" "M8650.v(692) " "Verilog HDL Event Control warning at M8650.v(692): event expression is a constant" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 692 0 0 } } } 0 10262 "Verilog HDL Event Control warning at %1!s!: event expression is a constant" 1 0 "Quartus II" 0 -1 1688087258766 ""} { "Warning" "WVRFX_L3_VERI_CONST_EVENT_EXPR" "M8650.v(1083) " "Verilog HDL Event Control warning at M8650.v(1083): event expression is a constant" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 1083 0 0 } } } 0 10262 "Verilog HDL Event Control warning at %1!s!: event expression is a constant" 1 0 "Quartus II" 0 -1 1688087258768 ""} { "Warning" "WVRFX_VERI_IGNORED_ANONYMOUS_PORT" "m8650 M8650.v(5) " "Verilog Module Declaration warning at M8650.v(5): ignored anonymous port(s) indicated by duplicate or dangling comma(s) in the port list for module \"m8650\"" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 5 0 0 } } } 0 10238 "Verilog Module Declaration warning at %2!s!: ignored anonymous port(s) indicated by duplicate or dangling comma(s) in the port list for module \"%1!s!\"" 0 0 "Quartus II" 0 -1 1688087258769 ""} { "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "M8650.v 1 1 " "Found 1 design units, including 1 entities, in source file M8650.v" { { "Info" "ISGN_ENTITY_NAME" "1 m8650 " "Found entity 1: m8650" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 5 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1688087258783 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Quartus II" 0 -1 1688087258783 ""} { "Info" "ISGN_START_ELABORATION_TOP" "m8650 " "Elaborating entity \"m8650\" for the top level hierarchy" { } { } 0 12127 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0 "Quartus II" 0 -1 1688087258998 ""} { "Warning" "WVRFX_L2_HDL_OBJECT_ASSIGNED_NOT_READ" "r_run_l M8650.v(41) " "Verilog HDL or VHDL warning at M8650.v(41): object \"r_run_l\" assigned a value but never read" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 41 0 0 } } } 0 10036 "Verilog HDL or VHDL warning at %2!s!: object \"%1!s!\" assigned a value but never read" 0 0 "Quartus II" 0 -1 1688087259005 "|m8650"} { "Warning" "WVRFX_L2_HDL_OBJECT_ASSIGNED_NOT_READ" "gdollar_3 M8650.v(133) " "Verilog HDL or VHDL warning at M8650.v(133): object \"gdollar_3\" assigned a value but never read" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 133 0 0 } } } 0 10036 "Verilog HDL or VHDL warning at %2!s!: object \"%1!s!\" assigned a value but never read" 0 0 "Quartus II" 0 -1 1688087259006 "|m8650"} { "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "ck_pulse_m M8650.v(305) " "Verilog HDL Always Construct warning at M8650.v(305): inferring latch(es) for variable \"ck_pulse_m\", which holds its previous value in one or more paths through the always construct" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 305 0 0 } } } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 1 0 "Quartus II" 0 -1 1688087259008 "|m8650"} { "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "ck_pulse M8650.v(312) " "Verilog HDL Always Construct warning at M8650.v(312): inferring latch(es) for variable \"ck_pulse\", which holds its previous value in one or more paths through the always construct" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 312 0 0 } } } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 1 0 "Quartus II" 0 -1 1688087259009 "|m8650"} { "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "rx_div2_l_m M8650.v(320) " "Verilog HDL Always Construct warning at M8650.v(320): inferring latch(es) for variable \"rx_div2_l_m\", which holds its previous value in one or more paths through the always construct" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 320 0 0 } } } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 1 0 "Quartus II" 0 -1 1688087259009 "|m8650"} { "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "rx_div2_l M8650.v(327) " "Verilog HDL Always Construct warning at M8650.v(327): inferring latch(es) for variable \"rx_div2_l\", which holds its previous value in one or more paths through the always construct" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 327 0 0 } } } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 1 0 "Quartus II" 0 -1 1688087259009 "|m8650"} { "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "rx_div4_l_m M8650.v(334) " "Verilog HDL Always Construct warning at M8650.v(334): inferring latch(es) for variable \"rx_div4_l_m\", which holds its previous value in one or more paths through the always construct" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 334 0 0 } } } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 1 0 "Quartus II" 0 -1 1688087259009 "|m8650"} { "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "rx_div4_l M8650.v(341) " "Verilog HDL Always Construct warning at M8650.v(341): inferring latch(es) for variable \"rx_div4_l\", which holds its previous value in one or more paths through the always construct" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 341 0 0 } } } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 1 0 "Quartus II" 0 -1 1688087259010 "|m8650"} { "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "n_t_2x_m M8650.v(349) " "Verilog HDL Always Construct warning at M8650.v(349): inferring latch(es) for variable \"n_t_2x_m\", which holds its previous value in one or more paths through the always construct" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 349 0 0 } } } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 1 0 "Quartus II" 0 -1 1688087259010 "|m8650"} { "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "n_t_2x M8650.v(356) " "Verilog HDL Always Construct warning at M8650.v(356): inferring latch(es) for variable \"n_t_2x\", which holds its previous value in one or more paths through the always construct" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 356 0 0 } } } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 1 0 "Quartus II" 0 -1 1688087259011 "|m8650"} { "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "n_t_5x_m M8650.v(363) " "Verilog HDL Always Construct warning at M8650.v(363): inferring latch(es) for variable \"n_t_5x_m\", which holds its previous value in one or more paths through the always construct" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 363 0 0 } } } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 1 0 "Quartus II" 0 -1 1688087259011 "|m8650"} { "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "n_t_5x M8650.v(370) " "Verilog HDL Always Construct warning at M8650.v(370): inferring latch(es) for variable \"n_t_5x\", which holds its previous value in one or more paths through the always construct" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 370 0 0 } } } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 1 0 "Quartus II" 0 -1 1688087259011 "|m8650"} { "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "gdollar_0_m M8650.v(377) " "Verilog HDL Always Construct warning at M8650.v(377): inferring latch(es) for variable \"gdollar_0_m\", which holds its previous value in one or more paths through the always construct" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 377 0 0 } } } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 1 0 "Quartus II" 0 -1 1688087259011 "|m8650"} { "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "gdollar_0 M8650.v(384) " "Verilog HDL Always Construct warning at M8650.v(384): inferring latch(es) for variable \"gdollar_0\", which holds its previous value in one or more paths through the always construct" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 384 0 0 } } } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 1 0 "Quartus II" 0 -1 1688087259012 "|m8650"} { "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "bd1745_m M8650.v(391) " "Verilog HDL Always Construct warning at M8650.v(391): inferring latch(es) for variable \"bd1745_m\", which holds its previous value in one or more paths through the always construct" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 391 0 0 } } } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 1 0 "Quartus II" 0 -1 1688087259012 "|m8650"} { "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "bd1745 M8650.v(398) " "Verilog HDL Always Construct warning at M8650.v(398): inferring latch(es) for variable \"bd1745\", which holds its previous value in one or more paths through the always construct" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 398 0 0 } } } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 1 0 "Quartus II" 0 -1 1688087259012 "|m8650"} { "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "rx_active_m M8650.v(427) " "Verilog HDL Always Construct warning at M8650.v(427): inferring latch(es) for variable \"rx_active_m\", which holds its previous value in one or more paths through the always construct" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 427 0 0 } } } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 1 0 "Quartus II" 0 -1 1688087259013 "|m8650"} { "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "rx_active M8650.v(437) " "Verilog HDL Always Construct warning at M8650.v(437): inferring latch(es) for variable \"rx_active\", which holds its previous value in one or more paths through the always construct" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 437 0 0 } } } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 1 0 "Quartus II" 0 -1 1688087259013 "|m8650"} { "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "p_pulse_l_m M8650.v(447) " "Verilog HDL Always Construct warning at M8650.v(447): inferring latch(es) for variable \"p_pulse_l_m\", which holds its previous value in one or more paths through the always construct" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 447 0 0 } } } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 1 0 "Quartus II" 0 -1 1688087259014 "|m8650"} { "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "p_pulse_l M8650.v(454) " "Verilog HDL Always Construct warning at M8650.v(454): inferring latch(es) for variable \"p_pulse_l\", which holds its previous value in one or more paths through the always construct" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 454 0 0 } } } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 1 0 "Quartus II" 0 -1 1688087259014 "|m8650"} { "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "last_unit_m M8650.v(462) " "Verilog HDL Always Construct warning at M8650.v(462): inferring latch(es) for variable \"last_unit_m\", which holds its previous value in one or more paths through the always construct" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 462 0 0 } } } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 1 0 "Quartus II" 0 -1 1688087259014 "|m8650"} { "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "last_unit M8650.v(469) " "Verilog HDL Always Construct warning at M8650.v(469): inferring latch(es) for variable \"last_unit\", which holds its previous value in one or more paths through the always construct" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 469 0 0 } } } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 1 0 "Quartus II" 0 -1 1688087259015 "|m8650"} { "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "rx_div8_m M8650.v(476) " "Verilog HDL Always Construct warning at M8650.v(476): inferring latch(es) for variable \"rx_div8_m\", which holds its previous value in one or more paths through the always construct" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 476 0 0 } } } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 1 0 "Quartus II" 0 -1 1688087259015 "|m8650"} { "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "rx_div8 M8650.v(483) " "Verilog HDL Always Construct warning at M8650.v(483): inferring latch(es) for variable \"rx_div8\", which holds its previous value in one or more paths through the always construct" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 483 0 0 } } } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 1 0 "Quartus II" 0 -1 1688087259015 "|m8650"} { "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "tx_div_m M8650.v(581) " "Verilog HDL Always Construct warning at M8650.v(581): inferring latch(es) for variable \"tx_div_m\", which holds its previous value in one or more paths through the always construct" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 581 0 0 } } } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 1 0 "Quartus II" 0 -1 1688087259017 "|m8650"} { "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "tx_div M8650.v(588) " "Verilog HDL Always Construct warning at M8650.v(588): inferring latch(es) for variable \"tx_div\", which holds its previous value in one or more paths through the always construct" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 588 0 0 } } } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 1 0 "Quartus II" 0 -1 1688087259017 "|m8650"} { "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "spike_det_l_m M8650.v(596) " "Verilog HDL Always Construct warning at M8650.v(596): inferring latch(es) for variable \"spike_det_l_m\", which holds its previous value in one or more paths through the always construct" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 596 0 0 } } } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 1 0 "Quartus II" 0 -1 1688087259018 "|m8650"} { "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "spike_det_l M8650.v(606) " "Verilog HDL Always Construct warning at M8650.v(606): inferring latch(es) for variable \"spike_det_l\", which holds its previous value in one or more paths through the always construct" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 606 0 0 } } } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 1 0 "Quartus II" 0 -1 1688087259018 "|m8650"} { "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "bd115200_m M8650.v(617) " "Verilog HDL Always Construct warning at M8650.v(617): inferring latch(es) for variable \"bd115200_m\", which holds its previous value in one or more paths through the always construct" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 617 0 0 } } } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 1 0 "Quartus II" 0 -1 1688087259018 "|m8650"} { "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "bd115200 M8650.v(624) " "Verilog HDL Always Construct warning at M8650.v(624): inferring latch(es) for variable \"bd115200\", which holds its previous value in one or more paths through the always construct" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 624 0 0 } } } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 1 0 "Quartus II" 0 -1 1688087259019 "|m8650"} { "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "bd57600_m M8650.v(631) " "Verilog HDL Always Construct warning at M8650.v(631): inferring latch(es) for variable \"bd57600_m\", which holds its previous value in one or more paths through the always construct" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 631 0 0 } } } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 1 0 "Quartus II" 0 -1 1688087259019 "|m8650"} { "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "bd57600 M8650.v(638) " "Verilog HDL Always Construct warning at M8650.v(638): inferring latch(es) for variable \"bd57600\", which holds its previous value in one or more paths through the always construct" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 638 0 0 } } } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 1 0 "Quartus II" 0 -1 1688087259019 "|m8650"} { "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "bd38400_m M8650.v(645) " "Verilog HDL Always Construct warning at M8650.v(645): inferring latch(es) for variable \"bd38400_m\", which holds its previous value in one or more paths through the always construct" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 645 0 0 } } } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 1 0 "Quartus II" 0 -1 1688087259020 "|m8650"} { "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "bd38400 M8650.v(652) " "Verilog HDL Always Construct warning at M8650.v(652): inferring latch(es) for variable \"bd38400\", which holds its previous value in one or more paths through the always construct" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 652 0 0 } } } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 1 0 "Quartus II" 0 -1 1688087259020 "|m8650"} { "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "gdollar_1_m M8650.v(659) " "Verilog HDL Always Construct warning at M8650.v(659): inferring latch(es) for variable \"gdollar_1_m\", which holds its previous value in one or more paths through the always construct" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 659 0 0 } } } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 1 0 "Quartus II" 0 -1 1688087259020 "|m8650"} { "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "gdollar_1 M8650.v(666) " "Verilog HDL Always Construct warning at M8650.v(666): inferring latch(es) for variable \"gdollar_1\", which holds its previous value in one or more paths through the always construct" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 666 0 0 } } } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 1 0 "Quartus II" 0 -1 1688087259020 "|m8650"} { "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "tx_active_l_m M8650.v(678) " "Verilog HDL Always Construct warning at M8650.v(678): inferring latch(es) for variable \"tx_active_l_m\", which holds its previous value in one or more paths through the always construct" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 678 0 0 } } } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 1 0 "Quartus II" 0 -1 1688087259021 "|m8650"} { "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "tx_active_l M8650.v(685) " "Verilog HDL Always Construct warning at M8650.v(685): inferring latch(es) for variable \"tx_active_l\", which holds its previous value in one or more paths through the always construct" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 685 0 0 } } } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 1 0 "Quartus II" 0 -1 1688087259021 "|m8650"} { "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "start_l_m M8650.v(692) " "Verilog HDL Always Construct warning at M8650.v(692): inferring latch(es) for variable \"start_l_m\", which holds its previous value in one or more paths through the always construct" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 692 0 0 } } } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 1 0 "Quartus II" 0 -1 1688087259021 "|m8650"} { "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "start_l M8650.v(699) " "Verilog HDL Always Construct warning at M8650.v(699): inferring latch(es) for variable \"start_l\", which holds its previous value in one or more paths through the always construct" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 699 0 0 } } } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 1 0 "Quartus II" 0 -1 1688087259022 "|m8650"} { "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "stp1_m M8650.v(731) " "Verilog HDL Always Construct warning at M8650.v(731): inferring latch(es) for variable \"stp1_m\", which holds its previous value in one or more paths through the always construct" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 731 0 0 } } } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 1 0 "Quartus II" 0 -1 1688087259022 "|m8650"} { "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "stp1 M8650.v(738) " "Verilog HDL Always Construct warning at M8650.v(738): inferring latch(es) for variable \"stp1\", which holds its previous value in one or more paths through the always construct" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 738 0 0 } } } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 1 0 "Quartus II" 0 -1 1688087259023 "|m8650"} { "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "gdollar_2_m M8650.v(745) " "Verilog HDL Always Construct warning at M8650.v(745): inferring latch(es) for variable \"gdollar_2_m\", which holds its previous value in one or more paths through the always construct" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 745 0 0 } } } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 1 0 "Quartus II" 0 -1 1688087259023 "|m8650"} { "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "gdollar_2 M8650.v(752) " "Verilog HDL Always Construct warning at M8650.v(752): inferring latch(es) for variable \"gdollar_2\", which holds its previous value in one or more paths through the always construct" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 752 0 0 } } } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 1 0 "Quartus II" 0 -1 1688087259023 "|m8650"} { "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "stp2_m M8650.v(759) " "Verilog HDL Always Construct warning at M8650.v(759): inferring latch(es) for variable \"stp2_m\", which holds its previous value in one or more paths through the always construct" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 759 0 0 } } } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 1 0 "Quartus II" 0 -1 1688087259024 "|m8650"} { "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "stp2 M8650.v(766) " "Verilog HDL Always Construct warning at M8650.v(766): inferring latch(es) for variable \"stp2\", which holds its previous value in one or more paths through the always construct" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 766 0 0 } } } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 1 0 "Quartus II" 0 -1 1688087259024 "|m8650"} { "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "gdollar_3_m M8650.v(773) " "Verilog HDL Always Construct warning at M8650.v(773): inferring latch(es) for variable \"gdollar_3_m\", which holds its previous value in one or more paths through the always construct" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 773 0 0 } } } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 1 0 "Quartus II" 0 -1 1688087259024 "|m8650"} { "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "n_t_60x_m M8650.v(797) " "Verilog HDL Always Construct warning at M8650.v(797): inferring latch(es) for variable \"n_t_60x_m\", which holds its previous value in one or more paths through the always construct" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 797 0 0 } } } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 1 0 "Quartus II" 0 -1 1688087259025 "|m8650"} { "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "n_t_60x M8650.v(805) " "Verilog HDL Always Construct warning at M8650.v(805): inferring latch(es) for variable \"n_t_60x\", which holds its previous value in one or more paths through the always construct" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 805 0 0 } } } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 1 0 "Quartus II" 0 -1 1688087259025 "|m8650"} { "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "n_t_62x_m M8650.v(812) " "Verilog HDL Always Construct warning at M8650.v(812): inferring latch(es) for variable \"n_t_62x_m\", which holds its previous value in one or more paths through the always construct" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 812 0 0 } } } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 1 0 "Quartus II" 0 -1 1688087259026 "|m8650"} { "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "n_t_62x M8650.v(820) " "Verilog HDL Always Construct warning at M8650.v(820): inferring latch(es) for variable \"n_t_62x\", which holds its previous value in one or more paths through the always construct" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 820 0 0 } } } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 1 0 "Quartus II" 0 -1 1688087259026 "|m8650"} { "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "n_t_56x_m M8650.v(827) " "Verilog HDL Always Construct warning at M8650.v(827): inferring latch(es) for variable \"n_t_56x_m\", which holds its previous value in one or more paths through the always construct" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 827 0 0 } } } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 1 0 "Quartus II" 0 -1 1688087259026 "|m8650"} { "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "n_t_56x M8650.v(835) " "Verilog HDL Always Construct warning at M8650.v(835): inferring latch(es) for variable \"n_t_56x\", which holds its previous value in one or more paths through the always construct" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 835 0 0 } } } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 1 0 "Quartus II" 0 -1 1688087259027 "|m8650"} { "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "n_t_61x_m M8650.v(842) " "Verilog HDL Always Construct warning at M8650.v(842): inferring latch(es) for variable \"n_t_61x_m\", which holds its previous value in one or more paths through the always construct" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 842 0 0 } } } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 1 0 "Quartus II" 0 -1 1688087259027 "|m8650"} { "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "n_t_61x M8650.v(850) " "Verilog HDL Always Construct warning at M8650.v(850): inferring latch(es) for variable \"n_t_61x\", which holds its previous value in one or more paths through the always construct" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 850 0 0 } } } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 1 0 "Quartus II" 0 -1 1688087259027 "|m8650"} { "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "serial_out_m M8650.v(858) " "Verilog HDL Always Construct warning at M8650.v(858): inferring latch(es) for variable \"serial_out_m\", which holds its previous value in one or more paths through the always construct" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 858 0 0 } } } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 1 0 "Quartus II" 0 -1 1688087259028 "|m8650"} { "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "serial_out M8650.v(868) " "Verilog HDL Always Construct warning at M8650.v(868): inferring latch(es) for variable \"serial_out\", which holds its previous value in one or more paths through the always construct" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 868 0 0 } } } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 1 0 "Quartus II" 0 -1 1688087259028 "|m8650"} { "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "enab_m M8650.v(878) " "Verilog HDL Always Construct warning at M8650.v(878): inferring latch(es) for variable \"enab_m\", which holds its previous value in one or more paths through the always construct" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 878 0 0 } } } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 1 0 "Quartus II" 0 -1 1688087259028 "|m8650"} { "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "enab M8650.v(885) " "Verilog HDL Always Construct warning at M8650.v(885): inferring latch(es) for variable \"enab\", which holds its previous value in one or more paths through the always construct" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 885 0 0 } } } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 1 0 "Quartus II" 0 -1 1688087259029 "|m8650"} { "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "n_t_63x_m M8650.v(902) " "Verilog HDL Always Construct warning at M8650.v(902): inferring latch(es) for variable \"n_t_63x_m\", which holds its previous value in one or more paths through the always construct" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 902 0 0 } } } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 1 0 "Quartus II" 0 -1 1688087259029 "|m8650"} { "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "n_t_63x M8650.v(910) " "Verilog HDL Always Construct warning at M8650.v(910): inferring latch(es) for variable \"n_t_63x\", which holds its previous value in one or more paths through the always construct" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 910 0 0 } } } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 1 0 "Quartus II" 0 -1 1688087259029 "|m8650"} { "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "n_t_65x_m M8650.v(917) " "Verilog HDL Always Construct warning at M8650.v(917): inferring latch(es) for variable \"n_t_65x_m\", which holds its previous value in one or more paths through the always construct" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 917 0 0 } } } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 1 0 "Quartus II" 0 -1 1688087259030 "|m8650"} { "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "n_t_65x M8650.v(925) " "Verilog HDL Always Construct warning at M8650.v(925): inferring latch(es) for variable \"n_t_65x\", which holds its previous value in one or more paths through the always construct" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 925 0 0 } } } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 1 0 "Quartus II" 0 -1 1688087259030 "|m8650"} { "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "n_t_66x_m M8650.v(932) " "Verilog HDL Always Construct warning at M8650.v(932): inferring latch(es) for variable \"n_t_66x_m\", which holds its previous value in one or more paths through the always construct" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 932 0 0 } } } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 1 0 "Quartus II" 0 -1 1688087259030 "|m8650"} { "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "n_t_66x M8650.v(940) " "Verilog HDL Always Construct warning at M8650.v(940): inferring latch(es) for variable \"n_t_66x\", which holds its previous value in one or more paths through the always construct" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 940 0 0 } } } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 1 0 "Quartus II" 0 -1 1688087259031 "|m8650"} { "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "tx_data_m M8650.v(947) " "Verilog HDL Always Construct warning at M8650.v(947): inferring latch(es) for variable \"tx_data_m\", which holds its previous value in one or more paths through the always construct" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 947 0 0 } } } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 1 0 "Quartus II" 0 -1 1688087259031 "|m8650"} { "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "tx_data M8650.v(955) " "Verilog HDL Always Construct warning at M8650.v(955): inferring latch(es) for variable \"tx_data\", which holds its previous value in one or more paths through the always construct" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 955 0 0 } } } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 1 0 "Quartus II" 0 -1 1688087259031 "|m8650"} { "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "tflg_l_m M8650.v(980) " "Verilog HDL Always Construct warning at M8650.v(980): inferring latch(es) for variable \"tflg_l_m\", which holds its previous value in one or more paths through the always construct" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 980 0 0 } } } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 1 0 "Quartus II" 0 -1 1688087259032 "|m8650"} { "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "tflg_l M8650.v(990) " "Verilog HDL Always Construct warning at M8650.v(990): inferring latch(es) for variable \"tflg_l\", which holds its previous value in one or more paths through the always construct" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 990 0 0 } } } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 1 0 "Quartus II" 0 -1 1688087259032 "|m8650"} { "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "int_enab_l_m M8650.v(1000) " "Verilog HDL Always Construct warning at M8650.v(1000): inferring latch(es) for variable \"int_enab_l_m\", which holds its previous value in one or more paths through the always construct" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 1000 0 0 } } } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 1 0 "Quartus II" 0 -1 1688087259032 "|m8650"} { "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "int_enab_l M8650.v(1007) " "Verilog HDL Always Construct warning at M8650.v(1007): inferring latch(es) for variable \"int_enab_l\", which holds its previous value in one or more paths through the always construct" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 1007 0 0 } } } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 1 0 "Quartus II" 0 -1 1688087259033 "|m8650"} { "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "rflg_l_m M8650.v(1069) " "Verilog HDL Always Construct warning at M8650.v(1069): inferring latch(es) for variable \"rflg_l_m\", which holds its previous value in one or more paths through the always construct" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 1069 0 0 } } } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 1 0 "Quartus II" 0 -1 1688087259034 "|m8650"} { "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "rflg_l M8650.v(1076) " "Verilog HDL Always Construct warning at M8650.v(1076): inferring latch(es) for variable \"rflg_l\", which holds its previous value in one or more paths through the always construct" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 1076 0 0 } } } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 1 0 "Quartus II" 0 -1 1688087259035 "|m8650"} { "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "r_run_l_m M8650.v(1083) " "Verilog HDL Always Construct warning at M8650.v(1083): inferring latch(es) for variable \"r_run_l_m\", which holds its previous value in one or more paths through the always construct" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 1083 0 0 } } } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 1 0 "Quartus II" 0 -1 1688087259035 "|m8650"} { "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "rflg_l M8650.v(1076) " "Inferred latch for \"rflg_l\" at M8650.v(1076)" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 1076 0 0 } } } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 1 0 "Quartus II" 0 -1 1688087259048 "|m8650"} { "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "rflg_l_m M8650.v(1069) " "Inferred latch for \"rflg_l_m\" at M8650.v(1069)" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 1069 0 0 } } } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 1 0 "Quartus II" 0 -1 1688087259048 "|m8650"} { "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "int_enab_l M8650.v(1007) " "Inferred latch for \"int_enab_l\" at M8650.v(1007)" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 1007 0 0 } } } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 1 0 "Quartus II" 0 -1 1688087259048 "|m8650"} { "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "int_enab_l_m M8650.v(1000) " "Inferred latch for \"int_enab_l_m\" at M8650.v(1000)" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 1000 0 0 } } } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 1 0 "Quartus II" 0 -1 1688087259048 "|m8650"} { "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "tflg_l M8650.v(990) " "Inferred latch for \"tflg_l\" at M8650.v(990)" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 990 0 0 } } } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 1 0 "Quartus II" 0 -1 1688087259049 "|m8650"} { "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "tflg_l_m M8650.v(980) " "Inferred latch for \"tflg_l_m\" at M8650.v(980)" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 980 0 0 } } } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 1 0 "Quartus II" 0 -1 1688087259049 "|m8650"} { "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "tx_data M8650.v(955) " "Inferred latch for \"tx_data\" at M8650.v(955)" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 955 0 0 } } } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 1 0 "Quartus II" 0 -1 1688087259049 "|m8650"} { "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "tx_data_m M8650.v(947) " "Inferred latch for \"tx_data_m\" at M8650.v(947)" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 947 0 0 } } } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 1 0 "Quartus II" 0 -1 1688087259049 "|m8650"} { "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "n_t_66x M8650.v(940) " "Inferred latch for \"n_t_66x\" at M8650.v(940)" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 940 0 0 } } } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 1 0 "Quartus II" 0 -1 1688087259050 "|m8650"} { "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "n_t_66x_m M8650.v(932) " "Inferred latch for \"n_t_66x_m\" at M8650.v(932)" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 932 0 0 } } } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 1 0 "Quartus II" 0 -1 1688087259050 "|m8650"} { "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "n_t_65x M8650.v(925) " "Inferred latch for \"n_t_65x\" at M8650.v(925)" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 925 0 0 } } } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 1 0 "Quartus II" 0 -1 1688087259050 "|m8650"} { "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "n_t_65x_m M8650.v(917) " "Inferred latch for \"n_t_65x_m\" at M8650.v(917)" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 917 0 0 } } } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 1 0 "Quartus II" 0 -1 1688087259050 "|m8650"} { "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "n_t_63x M8650.v(910) " "Inferred latch for \"n_t_63x\" at M8650.v(910)" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 910 0 0 } } } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 1 0 "Quartus II" 0 -1 1688087259050 "|m8650"} { "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "n_t_63x_m M8650.v(902) " "Inferred latch for \"n_t_63x_m\" at M8650.v(902)" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 902 0 0 } } } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 1 0 "Quartus II" 0 -1 1688087259051 "|m8650"} { "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "enab M8650.v(885) " "Inferred latch for \"enab\" at M8650.v(885)" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 885 0 0 } } } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 1 0 "Quartus II" 0 -1 1688087259051 "|m8650"} { "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "enab_m M8650.v(878) " "Inferred latch for \"enab_m\" at M8650.v(878)" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 878 0 0 } } } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 1 0 "Quartus II" 0 -1 1688087259051 "|m8650"} { "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "serial_out M8650.v(868) " "Inferred latch for \"serial_out\" at M8650.v(868)" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 868 0 0 } } } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 1 0 "Quartus II" 0 -1 1688087259051 "|m8650"} { "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "serial_out_m M8650.v(858) " "Inferred latch for \"serial_out_m\" at M8650.v(858)" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 858 0 0 } } } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 1 0 "Quartus II" 0 -1 1688087259051 "|m8650"} { "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "n_t_61x M8650.v(850) " "Inferred latch for \"n_t_61x\" at M8650.v(850)" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 850 0 0 } } } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 1 0 "Quartus II" 0 -1 1688087259052 "|m8650"} { "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "n_t_61x_m M8650.v(842) " "Inferred latch for \"n_t_61x_m\" at M8650.v(842)" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 842 0 0 } } } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 1 0 "Quartus II" 0 -1 1688087259052 "|m8650"} { "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "n_t_56x M8650.v(835) " "Inferred latch for \"n_t_56x\" at M8650.v(835)" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 835 0 0 } } } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 1 0 "Quartus II" 0 -1 1688087259052 "|m8650"} { "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "n_t_56x_m M8650.v(827) " "Inferred latch for \"n_t_56x_m\" at M8650.v(827)" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 827 0 0 } } } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 1 0 "Quartus II" 0 -1 1688087259052 "|m8650"} { "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "n_t_62x M8650.v(820) " "Inferred latch for \"n_t_62x\" at M8650.v(820)" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 820 0 0 } } } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 1 0 "Quartus II" 0 -1 1688087259052 "|m8650"} { "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "n_t_62x_m M8650.v(812) " "Inferred latch for \"n_t_62x_m\" at M8650.v(812)" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 812 0 0 } } } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 1 0 "Quartus II" 0 -1 1688087259053 "|m8650"} { "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "n_t_60x M8650.v(805) " "Inferred latch for \"n_t_60x\" at M8650.v(805)" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 805 0 0 } } } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 1 0 "Quartus II" 0 -1 1688087259053 "|m8650"} { "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "n_t_60x_m M8650.v(797) " "Inferred latch for \"n_t_60x_m\" at M8650.v(797)" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 797 0 0 } } } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 1 0 "Quartus II" 0 -1 1688087259053 "|m8650"} { "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "stp2 M8650.v(766) " "Inferred latch for \"stp2\" at M8650.v(766)" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 766 0 0 } } } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 1 0 "Quartus II" 0 -1 1688087259053 "|m8650"} { "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "stp2_m M8650.v(759) " "Inferred latch for \"stp2_m\" at M8650.v(759)" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 759 0 0 } } } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 1 0 "Quartus II" 0 -1 1688087259053 "|m8650"} { "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "gdollar_2 M8650.v(752) " "Inferred latch for \"gdollar_2\" at M8650.v(752)" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 752 0 0 } } } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 1 0 "Quartus II" 0 -1 1688087259053 "|m8650"} { "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "gdollar_2_m M8650.v(745) " "Inferred latch for \"gdollar_2_m\" at M8650.v(745)" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 745 0 0 } } } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 1 0 "Quartus II" 0 -1 1688087259054 "|m8650"} { "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "stp1 M8650.v(738) " "Inferred latch for \"stp1\" at M8650.v(738)" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 738 0 0 } } } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 1 0 "Quartus II" 0 -1 1688087259054 "|m8650"} { "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "stp1_m M8650.v(731) " "Inferred latch for \"stp1_m\" at M8650.v(731)" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 731 0 0 } } } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 1 0 "Quartus II" 0 -1 1688087259054 "|m8650"} { "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "start_l M8650.v(699) " "Inferred latch for \"start_l\" at M8650.v(699)" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 699 0 0 } } } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 1 0 "Quartus II" 0 -1 1688087259054 "|m8650"} { "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "start_l_m M8650.v(692) " "Inferred latch for \"start_l_m\" at M8650.v(692)" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 692 0 0 } } } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 1 0 "Quartus II" 0 -1 1688087259054 "|m8650"} { "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "tx_active_l M8650.v(685) " "Inferred latch for \"tx_active_l\" at M8650.v(685)" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 685 0 0 } } } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 1 0 "Quartus II" 0 -1 1688087259055 "|m8650"} { "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "tx_active_l_m M8650.v(678) " "Inferred latch for \"tx_active_l_m\" at M8650.v(678)" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 678 0 0 } } } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 1 0 "Quartus II" 0 -1 1688087259055 "|m8650"} { "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "bd38400 M8650.v(652) " "Inferred latch for \"bd38400\" at M8650.v(652)" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 652 0 0 } } } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 1 0 "Quartus II" 0 -1 1688087259055 "|m8650"} { "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "bd38400_m M8650.v(645) " "Inferred latch for \"bd38400_m\" at M8650.v(645)" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 645 0 0 } } } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 1 0 "Quartus II" 0 -1 1688087259055 "|m8650"} { "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "bd57600 M8650.v(638) " "Inferred latch for \"bd57600\" at M8650.v(638)" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 638 0 0 } } } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 1 0 "Quartus II" 0 -1 1688087259055 "|m8650"} { "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "bd57600_m M8650.v(631) " "Inferred latch for \"bd57600_m\" at M8650.v(631)" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 631 0 0 } } } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 1 0 "Quartus II" 0 -1 1688087259056 "|m8650"} { "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "bd115200 M8650.v(624) " "Inferred latch for \"bd115200\" at M8650.v(624)" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 624 0 0 } } } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 1 0 "Quartus II" 0 -1 1688087259056 "|m8650"} { "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "bd115200_m M8650.v(617) " "Inferred latch for \"bd115200_m\" at M8650.v(617)" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 617 0 0 } } } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 1 0 "Quartus II" 0 -1 1688087259056 "|m8650"} { "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "spike_det_l M8650.v(606) " "Inferred latch for \"spike_det_l\" at M8650.v(606)" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 606 0 0 } } } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 1 0 "Quartus II" 0 -1 1688087259056 "|m8650"} { "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "spike_det_l_m M8650.v(596) " "Inferred latch for \"spike_det_l_m\" at M8650.v(596)" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 596 0 0 } } } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 1 0 "Quartus II" 0 -1 1688087259056 "|m8650"} { "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "tx_div M8650.v(588) " "Inferred latch for \"tx_div\" at M8650.v(588)" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 588 0 0 } } } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 1 0 "Quartus II" 0 -1 1688087259057 "|m8650"} { "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "tx_div_m M8650.v(581) " "Inferred latch for \"tx_div_m\" at M8650.v(581)" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 581 0 0 } } } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 1 0 "Quartus II" 0 -1 1688087259057 "|m8650"} { "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "rx_div8 M8650.v(483) " "Inferred latch for \"rx_div8\" at M8650.v(483)" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 483 0 0 } } } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 1 0 "Quartus II" 0 -1 1688087259058 "|m8650"} { "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "rx_div8_m M8650.v(476) " "Inferred latch for \"rx_div8_m\" at M8650.v(476)" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 476 0 0 } } } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 1 0 "Quartus II" 0 -1 1688087259058 "|m8650"} { "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "last_unit M8650.v(469) " "Inferred latch for \"last_unit\" at M8650.v(469)" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 469 0 0 } } } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 1 0 "Quartus II" 0 -1 1688087259058 "|m8650"} { "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "last_unit_m M8650.v(462) " "Inferred latch for \"last_unit_m\" at M8650.v(462)" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 462 0 0 } } } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 1 0 "Quartus II" 0 -1 1688087259058 "|m8650"} { "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "p_pulse_l M8650.v(454) " "Inferred latch for \"p_pulse_l\" at M8650.v(454)" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 454 0 0 } } } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 1 0 "Quartus II" 0 -1 1688087259058 "|m8650"} { "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "p_pulse_l_m M8650.v(447) " "Inferred latch for \"p_pulse_l_m\" at M8650.v(447)" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 447 0 0 } } } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 1 0 "Quartus II" 0 -1 1688087259059 "|m8650"} { "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "rx_active M8650.v(437) " "Inferred latch for \"rx_active\" at M8650.v(437)" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 437 0 0 } } } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 1 0 "Quartus II" 0 -1 1688087259059 "|m8650"} { "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "rx_active_m M8650.v(427) " "Inferred latch for \"rx_active_m\" at M8650.v(427)" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 427 0 0 } } } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 1 0 "Quartus II" 0 -1 1688087259059 "|m8650"} { "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "bd1745 M8650.v(398) " "Inferred latch for \"bd1745\" at M8650.v(398)" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 398 0 0 } } } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 1 0 "Quartus II" 0 -1 1688087259059 "|m8650"} { "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "bd1745_m M8650.v(391) " "Inferred latch for \"bd1745_m\" at M8650.v(391)" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 391 0 0 } } } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 1 0 "Quartus II" 0 -1 1688087259059 "|m8650"} { "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "gdollar_0 M8650.v(384) " "Inferred latch for \"gdollar_0\" at M8650.v(384)" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 384 0 0 } } } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 1 0 "Quartus II" 0 -1 1688087259060 "|m8650"} { "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "gdollar_0_m M8650.v(377) " "Inferred latch for \"gdollar_0_m\" at M8650.v(377)" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 377 0 0 } } } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 1 0 "Quartus II" 0 -1 1688087259060 "|m8650"} { "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "n_t_5x M8650.v(370) " "Inferred latch for \"n_t_5x\" at M8650.v(370)" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 370 0 0 } } } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 1 0 "Quartus II" 0 -1 1688087259060 "|m8650"} { "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "n_t_5x_m M8650.v(363) " "Inferred latch for \"n_t_5x_m\" at M8650.v(363)" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 363 0 0 } } } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 1 0 "Quartus II" 0 -1 1688087259060 "|m8650"} { "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "n_t_2x M8650.v(356) " "Inferred latch for \"n_t_2x\" at M8650.v(356)" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 356 0 0 } } } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 1 0 "Quartus II" 0 -1 1688087259060 "|m8650"} { "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "n_t_2x_m M8650.v(349) " "Inferred latch for \"n_t_2x_m\" at M8650.v(349)" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 349 0 0 } } } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 1 0 "Quartus II" 0 -1 1688087259061 "|m8650"} { "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "rx_div4_l M8650.v(341) " "Inferred latch for \"rx_div4_l\" at M8650.v(341)" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 341 0 0 } } } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 1 0 "Quartus II" 0 -1 1688087259061 "|m8650"} { "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "rx_div4_l_m M8650.v(334) " "Inferred latch for \"rx_div4_l_m\" at M8650.v(334)" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 334 0 0 } } } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 1 0 "Quartus II" 0 -1 1688087259061 "|m8650"} { "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "rx_div2_l M8650.v(327) " "Inferred latch for \"rx_div2_l\" at M8650.v(327)" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 327 0 0 } } } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 1 0 "Quartus II" 0 -1 1688087259061 "|m8650"} { "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "rx_div2_l_m M8650.v(320) " "Inferred latch for \"rx_div2_l_m\" at M8650.v(320)" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 320 0 0 } } } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 1 0 "Quartus II" 0 -1 1688087259062 "|m8650"} { "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "ck_pulse M8650.v(312) " "Inferred latch for \"ck_pulse\" at M8650.v(312)" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 312 0 0 } } } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 1 0 "Quartus II" 0 -1 1688087259062 "|m8650"} { "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "ck_pulse_m M8650.v(305) " "Inferred latch for \"ck_pulse_m\" at M8650.v(305)" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 305 0 0 } } } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 1 0 "Quartus II" 0 -1 1688087259062 "|m8650"} { "Warning" "WMLS_OPT_INSERTED_ALWAYS_ENABLED_TRI_AFTER_LOGIC_HDR" "" "The following nodes have both tri-state and non-tri-state drivers" { { "Warning" "WMLS_OPT_INSERTED_ALWAYS_ENABLED_TRI_AFTER_LOGIC" "int_enab " "Inserted always-enabled tri-state buffer between \"int_enab\" and its non-tri-state driver." { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 26 -1 0 } } } 0 13035 "Inserted always-enabled tri-state buffer between \"%1!s!\" and its non-tri-state driver." 0 0 "Quartus II" 0 -1 1688087259435 ""} } { } 0 13034 "The following nodes have both tri-state and non-tri-state drivers" 0 0 "Quartus II" 0 -1 1688087259435 ""} { "Info" "IMLS_MLS_FANOUT_MOVED_FOR_PERMANENTLY_ENABLED_TRI_HDR" "" "One or more bidirs are fed by always enabled tri-state buffers" { { "Info" "IMLS_MLS_FANOUT_MOVED_FOR_PERMANENTLY_ENABLED_TRI_SUB" "int_enab " "Fan-out of permanently enabled tri-state buffer feeding bidir \"int_enab\" is moved to its source" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 26 -1 0 } } } 0 13061 "Fan-out of permanently enabled tri-state buffer feeding bidir \"%1!s!\" is moved to its source" 0 0 "Quartus II" 0 -1 1688087259442 ""} } { } 0 13060 "One or more bidirs are fed by always enabled tri-state buffers" 0 0 "Quartus II" 0 -1 1688087259442 ""} { "Warning" "WMLS_MLS_ENABLED_OE" "" "TRI or OPNDRN buffers permanently enabled" { { "Warning" "WMLS_MLS_NODE_NAME" "int_enab~synth " "Node \"int_enab~synth\"" { } { { "M8650.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/M8650.v" 26 -1 0 } } } 0 13010 "Node \"%1!s!\"" 0 0 "Quartus II" 0 -1 1688087259605 ""} } { } 0 13009 "TRI or OPNDRN buffers permanently enabled" 0 0 "Quartus II" 0 -1 1688087259605 ""} { "Info" "ICUT_CUT_TM_SUMMARY" "178 " "Implemented 178 device resources after synthesis - the final resource count might be different" { { "Info" "ICUT_CUT_TM_IPINS" "18 " "Implemented 18 input pins" { } { } 0 21058 "Implemented %1!d! input pins" 0 0 "Quartus II" 0 -1 1688087260156 ""} { "Info" "ICUT_CUT_TM_OPINS" "9 " "Implemented 9 output pins" { } { } 0 21059 "Implemented %1!d! output pins" 0 0 "Quartus II" 0 -1 1688087260156 ""} { "Info" "ICUT_CUT_TM_BIDIRS" "10 " "Implemented 10 bidirectional pins" { } { } 0 21060 "Implemented %1!d! bidirectional pins" 0 0 "Quartus II" 0 -1 1688087260156 ""} { "Info" "ICUT_CUT_TM_MCELLS" "118 " "Implemented 118 macrocells" { } { } 0 21063 "Implemented %1!d! macrocells" 0 0 "Quartus II" 0 -1 1688087260156 ""} { "Info" "ICUT_CUT_TM_SEXPS" "23 " "Implemented 23 shareable expanders" { } { } 0 21073 "Implemented %1!d! shareable expanders" 0 0 "Quartus II" 0 -1 1688087260156 ""} } { } 0 21057 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0 "Quartus II" 0 -1 1688087260156 ""} { "Info" "IRDB_WROTE_SUPPRESSED_MSGS" "/home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/output_files/M8650.map.smsg " "Generated suppressed messages file /home/vrs/Eagle/projects/DEC/Mxxx/M8650/pld/output_files/M8650.map.smsg" { } { } 0 144001 "Generated suppressed messages file %1!s!" 0 0 "Quartus II" 0 -1 1688087260497 ""} { "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 8 s Quartus II 64-Bit " "Quartus II 64-Bit Analysis & Synthesis was successful. 0 errors, 8 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "564 " "Peak virtual memory: 564 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Quartus II" 0 -1 1688087260536 ""} { "Info" "IQEXE_END_BANNER_TIME" "Thu Jun 29 18:07:40 2023 " "Processing ended: Thu Jun 29 18:07:40 2023" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Quartus II" 0 -1 1688087260536 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:04 " "Elapsed time: 00:00:04" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Quartus II" 0 -1 1688087260536 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:04 " "Total CPU time (on all processors): 00:00:04" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Quartus II" 0 -1 1688087260536 ""} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Quartus II" 0 -1 1688087260536 ""}