/* This file is generated by topld.pl */ /* Please don't edit it. */ Name pdp8i ; PartNo cpld ; Date 3/27/2021 ; Revision 01 ; Designer ; Company ; Assembly None ; Location E1 ; Device f1508isptqfp100; $DEFINE OPTIMIZE $UNDEF OPTIMIZE /* Input Pins */ /* Output Pins */ pin = ac00; pin = ac00_l; pin = ac01; pin = ac01_l; pin = ac02; pin = ac02_l; pin = ac03; pin = ac03_l; pin = ac04; pin = ac04_l; pin = ac05; pin = ac05_l; pin = ac06; pin = ac06_l; pin = ac07; pin = ac07_l; pin = ac08; pin = ac08_l; pin = ac09; pin = ac09_l; pin = ac10; pin = ac10_l; pin = ac11; pin = ac11_l; pin = acclr; pin = and_l; pin = b_c_l; pin = b_dc_inst; pin = b_line_hold_l; pin = b_mem_start; pin = b_mem_to_lsr; pin = b_r0_l; pin = ba; pin = ba_l; pin = bac00; pin = bac01; pin = bac02; pin = bac03; pin = bac04; pin = bac05; pin = bac06; pin = bac07; pin = bac08; pin = bac09; pin = bac10; pin = bac11; pin = badd_accepted_l; pin = bb; pin = bb_l; pin = bbreak; pin = binitialize_l; pin = biop1_l; pin = biop2_l; pin = biop4_l; pin = bma00; pin = bma01; pin = bma02; pin = bma03; pin = bma04; pin = bma05; pin = bma06; pin = bma07; pin = bma08; pin = bma09; pin = bma10; pin = bma11; pin = bmb00; pin = bmb01; pin = bmb02; pin = bmb03; pin = bmb03_l; pin = bmb04; pin = bmb04_l; pin = bmb05; pin = bmb05_l; pin = bmb06; pin = bmb06_l; pin = bmb07; pin = bmb07_l; pin = bmb08; pin = bmb08_l; pin = bmb09; pin = bmb10; pin = bmb11; pin = break_l; pin = brq; pin = brun_l; pin = bstlr; pin = btp2; pin = btp3; pin = bts1; pin = bts3; pin = btt_inst_l; pin = bwc_overflow; pin = c_i_r; pin = ca_incr_l; pin = clock; pin = clock_ac_clr_l; pin = clock_enable_l; pin = clock_iot; pin = clock_p4; pin = cr_read; pin = cr_ready; pin = current_address_l; pin = d00; pin = d01; pin = d02; pin = d03; pin = d04; pin = d05; pin = d06; pin = d07; pin = d08; pin = d09; pin = d10; pin = d11; pin = d_in_l; pin = da00; pin = da01; pin = da02; pin = da03; pin = da04; pin = da05; pin = da06; pin = da07; pin = da08; pin = da09; pin = da10; pin = da11; pin = dca_l; pin = defer_l; pin = df0_l; pin = df1_l; pin = df2_l; pin = dfsr0; pin = dfsr1; pin = dfsr2; pin = drum_down; pin = drum_up; pin = ea0; pin = ea1; pin = ea2; pin = eda0; pin = eda1; pin = eda2; pin = execute_l; pin = feed_hole; pin = fetch_l; pin = hole1; pin = hole2; pin = hole3; pin = hole4; pin = hole5; pin = hole6; pin = hole7; pin = hole8; pin = if0_l; pin = if1_l; pin = if2_l; pin = ifsr0; pin = ifsr1; pin = ifsr2; pin = in00; pin = in01; pin = in02; pin = in03; pin = in04; pin = in05; pin = in06; pin = in07; pin = in08; pin = in09; pin = in10; pin = in11; pin = index_markers; pin = initialize_l; pin = int_enable_l; pin = io_bus_in00_l; pin = io_bus_in01_l; pin = io_bus_in02_l; pin = io_bus_in03_l; pin = io_bus_in04_l; pin = io_bus_in05_l; pin = io_bus_in06_l; pin = io_bus_in07_l; pin = io_bus_in08_l; pin = io_bus_in09_l; pin = io_bus_in10_l; pin = io_bus_in11_l; pin = io_bus_in_int_l; pin = io_bus_in_skip_l; pin = io_pc_load; pin = iop1_l; pin = iop2_l; pin = iop4_l; pin = iot_l; pin = irq; pin = isz_l; pin = jmp_l; pin = jms_l; pin = key_cont_l; pin = key_dp_l; pin = key_ex_l; pin = key_la_l; pin = key_si_l; pin = key_ss_l; pin = key_st_l; pin = key_stop_l; pin = lhs_l; pin = light_pen; pin = line_in; pin = link_l; pin = load_counter; pin = ma00_l; pin = ma01_l; pin = ma02_l; pin = ma03_l; pin = ma04_l; pin = ma05_l; pin = ma06_l; pin = ma07_l; pin = ma08_l; pin = ma09_l; pin = ma10_l; pin = ma11_l; pin = mb00_l; pin = mb01_l; pin = mb02_l; pin = mb03_l; pin = mb04_l; pin = mb05; pin = mb05_l; pin = mb06_l; pin = mb07; pin = mb07_l; pin = mb08; pin = mb08_l; pin = mb09; pin = mb09_l; pin = mb10; pin = mb10_l; pin = mb11; pin = mb11_l; pin = mb_parity_odd; pin = mcbmb00_l; pin = mcbmb01_l; pin = mcbmb02_l; pin = mcbmb03_l; pin = mcbmb04_l; pin = mcbmb05_l; pin = mcbmb06_l; pin = mcbmb07_l; pin = mcbmb08_l; pin = mcbmb09_l; pin = mcbmb10_l; pin = mcbmb11_l; pin = mem00; pin = mem01; pin = mem02; pin = mem03; pin = mem04; pin = mem05; pin = mem06; pin = mem07; pin = mem08; pin = mem09; pin = mem10; pin = mem11; pin = mem_done_l; pin = mem_incr; pin = mem_p; pin = mq00_l; pin = mq01_l; pin = mq02_l; pin = mq03_l; pin = mq04_l; pin = mq05_l; pin = mq06_l; pin = mq07_l; pin = mq08_l; pin = mq09_l; pin = mq10_l; pin = mq11_l; pin = n15v; pin = n36v; pin = n3cycle; pin = n3vc01; pin = opr_l; pin = overflow; pin = pause_l; pin = pc00_l; pin = pc01_l; pin = pc02_l; pin = pc03_l; pin = pc04_l; pin = pc05_l; pin = pc06_l; pin = pc07_l; pin = pc08_l; pin = pc09_l; pin = pc10_l; pin = pc11_l; pin = pen_down; pin = pen_left; pin = pen_right; pin = pen_up; pin = pun_feed_switch_l; pin = pwr; pin = rd_hole1; pin = rd_hole2; pin = rd_hole3; pin = rd_hole4; pin = rd_hole5; pin = rd_hole6; pin = rd_hole7; pin = rd_hole8; pin = rdr_feed_switch; pin = reader_run_l; pin = run_l; pin = rx_data; pin = s_feed_hole; pin = sc0_l; pin = sc1_l; pin = sc2_l; pin = sc3_l; pin = sc4_l; pin = skipb; pin = sr00; pin = sr01; pin = sr02; pin = sr03; pin = sr04; pin = sr05; pin = sr06; pin = sr07; pin = sr08; pin = sr09; pin = sr10; pin = sr11; pin = strobe_l; pin = sync_pun; pin = tad_l; pin = tx_data; pin = word_count_l; pin = x_axis; pin = y_axis; pin = z_axis; pin = zone01_index; pin = zone02_index; pin = zone03_index; pin = zone04_index; pin = zone05_index; pin = zone06_index; pin = zone07_index; pin = zone08_index; pin = zone09_index; pin = zone10_index; pin = zone11_index; pin = zone12_index; node ub; node uf; node uint; node s_uf; node usf_l; node if_enable; node df_enable; node bf_enable; node mp_int_l; node int_inhibit_l; node if0; node if1; node if2; node ib0; node ib1; node ib2; node df0; node df1; node df2; node bf0; node bf1; node bf2; node sf0; node sf1; node sf2; node sf3; node sf4; node sf5; node sc0; node sc1; node sc2; node sc3; node sc4; node eae_end; node mq00; node mq01; node mq02; node mq03; node mq04; node mq05; node mq06; node mq07; node mq08; node mq09; node mq10; node mq11; node s_l; node c_l; node hs; node eae_ir0; node eae_ir1; node eae_ir2; node eae_on; node eae_run; node eae_tg; node ts1; node mem_idle; node run; node skip_l; node ts2; node ts3; node ts4; node iop1; node iop2; node iop4; node ir0_l; node ir1; node ir2; node brk_sync; node io_on; node defer; node word_count; node current_address; node break; node add_accepted_l; node wc_overflow_l; node int_sync; node int_delay; node link; node ma00; node ma01; node pc00; node pc01; node ma02; node ma03; node pc02; node pc03; node ma04; node ma05; node pc04; node pc05; node ma06; node ma07; node pc06; node pc07; node ma09; node pc08; node pc09; node ma10; node ma11; node pc10; node pc11; /* Internal nodes */ $IFNDEF OPTIMIZE node ac_clear; node ac_clear_l; node ac_enable; node ac_load; node ac_to_mq_enable; node ac_to_mq_enable_l; node acbar_enable; node add_l; node adder00; node adder01; node adder02; node adder03; node adder04; node adder06; node adder07; node adder08; node adder09; node adder10; node adder11_l; node adder_l; node adder_l_l; node and_enable; node and_enable_l; node and_h; node asr_enable; node asr_l_set_l; node auto_index_l; node b_eae_on; node b_execute; node b_ext_inst; node b_fetch; node b_left_shift; node b_set; node b_set_l; node bb_left_shift; node biop1; node biop2; node biop4; node break_ok; node break_ok_l; node brk_rqst; node c_no_shift_l; node c_set_l; node ca_increment; node ca_increment_l; node carry_insert_l; node carry_out0; node carry_out0_l; node carry_out6_l; node cint_l; node clear_df_l; node clear_ib_l; node clear_if_l; node clear_ifdfbf_l; node clear_x_l; node clear_y_l; node clock1; node clock_scale_2; node clr_parity_error_l; node csr_enable_l; node cuf; node cuf_l; node d_set; node d_set_l; node data00; node data01; node data02; node data03; node data04; node data05; node data06; node data07; node data08; node data09; node data10; node data11; node data_add00; node data_add01; node data_add02; node data_add03; node data_add04; node data_add05; node data_add06; node data_add07; node data_add08; node data_add09; node data_add10; node data_add11; node data_add_enable; node data_enable; node data_in; node data_in_l; node dc_inst_l; node dca; node df_enable_l; node div_last; node div_last_l; node double_left_rotate; node double_right_rotate; node dvi; node dvi_l; node e09f1; node e25d1; node e_set; node e_set_l; node eae_ac_enable_l; node eae_acbar_enable_l; node eae_begin; node eae_complete_l; node eae_e_set_l; node eae_execute_l; node eae_inst; node eae_ir_clear_l; node eae_l_disable; node eae_left_shift_enable_l; node eae_mem_enable_l; node eae_mq0_enable_l; node eae_mq0bar_enable_l; node eae_no_shift_enable; node eae_right_shift_enable_l; node eae_set_l; node eae_start_l; node eae_tp; node eae_tp_l; node enable; node enable_l; node ext_data_add0; node ext_data_add1; node ext_data_add2; node ext_go; node ext_inst; node f15f1; node f17f1; node f_set; node f_set_l; node hz880; node i_iot_l; node i_m_d; node ib_to_if; node ib_to_if_l; node if_enable_l; node if_to_sf; node in_stop_2_l; node initialize; node input_bus00; node input_bus01; node input_bus02; node input_bus03; node input_bus04; node input_bus05; node input_bus06; node input_bus07; node input_bus08; node input_bus09; node input_bus10; node input_bus11; node int_ok; node int_ok_l; node int_rqst; node int_skip_enable_l; node int_strobe; node int_strobe_l; node io_enable; node io_end; node io_end_l; node io_pc_enable_l; node io_skip; node io_start_l; node io_strobe; node iop124_l; node iop1_clr; node iop1_set_l; node iop2_clr; node iop2_set_l; node iop4_clr; node iop4_set_l; node iot; node iot632; node iot634; node iot_opr_l; node ipc_enable; node isz; node jmp; node jms; node kcc_l; node key_cont; node key_dp; node key_exdp; node key_exdp_l; node key_la; node key_laexdp; node key_laexdp_l; node key_lamfts0_l; node key_sistop; node key_ss; node key_st; node key_stexdp; node keyboard_flag_l; node l_enable; node lbar_enable; node left_shift; node left_shift_l; node lh_to_hs; node lhs; node line_hold_l; node line_l; node load_bf; node load_ib; node load_sf_l; node low_ac0; node ma08; node ma_enable0_4; node ma_enable5_11; node ma_load; node manual_preset_l; node mb00; node mb01; node mb02; node mb03; node mb04; node mb06; node mb06xmb09; node mb_load; node mb_to_ib; node mb_to_sc_enable; node me05_l; node me06_l; node me07_l; node me08_l; node me09_l; node me10_l; node me11_l; node mem_enable0_4; node mem_enable0_4_l; node mem_enable5_8; node mem_enable9_11; node mem_ext; node mem_ext_ac_load_enable_l; node mem_ext_io_enable_l; node mem_ext_l; node mem_inh9_11_l; node mem_parity_even_l; node mem_to_lsr_l; node memory_increment; node mftp0; node mftp1; node mftp2; node mfts0; node mfts1; node mfts1_l; node mfts2; node mfts2_l; node mfts3; node mid_ac0; node mp_skip_l; node mq_enable; node mq_load; node mq_low_ac0; node muy; node muy_dvi_l; node muy_l; node n0_to_int_enab_l; node n3_cycle; node n3v_lp_33_rp; node n3v_lp_49_rp; node n60hz_in; node n_t_100x; node n_t_101x; node n_t_102x; node n_t_103x; node n_t_104x; node n_t_105x; node n_t_106x; node n_t_107x; node n_t_108x; node n_t_109x; node n_t_10x; node n_t_110x; node n_t_111x; node n_t_112x; node n_t_113x; node n_t_114x; node n_t_115x; node n_t_116x; node n_t_117x; node n_t_118x; node n_t_119x; node n_t_11x; node n_t_120x; node n_t_121x; node n_t_122x; node n_t_123x; node n_t_124x; node n_t_125x; node n_t_126x; node n_t_127x; node n_t_128x; node n_t_129x; node n_t_12x; node n_t_130x; node n_t_134x; node n_t_135x; node n_t_137x; node n_t_13x; node n_t_140x; node n_t_14x; node n_t_15x; node n_t_16x; node n_t_17x; node n_t_18x; node n_t_19x; node n_t_1x; node n_t_20x; node n_t_21x; node n_t_22x; node n_t_23x; node n_t_24x; node n_t_25x; node n_t_262x; node n_t_263x; node n_t_264x; node n_t_265x; node n_t_266x; node n_t_26x; node n_t_27x; node n_t_29x; node n_t_2x; node n_t_30x; node n_t_31x; node n_t_32x; node n_t_33x; node n_t_34x; node n_t_35x; node n_t_36x; node n_t_37x; node n_t_38x; node n_t_39x; node n_t_3x; node n_t_403x; node n_t_404x; node n_t_405x; node n_t_406x; node n_t_407x; node n_t_408x; node n_t_409x; node n_t_40x; node n_t_410x; node n_t_411x; node n_t_412x; node n_t_413x; node n_t_414x; node n_t_415x; node n_t_416x; node n_t_417x; node n_t_418x; node n_t_419x; node n_t_41x; node n_t_420x; node n_t_421x; node n_t_422x; node n_t_423x; node n_t_424x; node n_t_425x; node n_t_426x; node n_t_427x; node n_t_428x; node n_t_429x; node n_t_42x; node n_t_430x; node n_t_431x; node n_t_432x; node n_t_433x; node n_t_434x; node n_t_435x; node n_t_436x; node n_t_437x; node n_t_438x; node n_t_439x; node n_t_43x; node n_t_440x; node n_t_441x; node n_t_442x; node n_t_443x; node n_t_444x; node n_t_445x; node n_t_446x; node n_t_447x; node n_t_44x; node n_t_451x; node n_t_452x; node n_t_453x; node n_t_454x; node n_t_455x; node n_t_456x; node n_t_457x; node n_t_458x; node n_t_459x; node n_t_45x; node n_t_460x; node n_t_461x; node n_t_462x; node n_t_463x; node n_t_464x; node n_t_465x; node n_t_466x; node n_t_467x; node n_t_468x; node n_t_469x; node n_t_46x; node n_t_470x; node n_t_471x; node n_t_472x; node n_t_473x; node n_t_474x; node n_t_475x; node n_t_476x; node n_t_477x; node n_t_478x; node n_t_479x; node n_t_47x; node n_t_480x; node n_t_481x; node n_t_482x; node n_t_483x; node n_t_484x; node n_t_485x; node n_t_489x; node n_t_48x; node n_t_490x; node n_t_491x; node n_t_492x; node n_t_493x; node n_t_497x; node n_t_49x; node n_t_4x; node n_t_50x; node n_t_51x; node n_t_52x; node n_t_53x; node n_t_548x; node n_t_549x; node n_t_54x; node n_t_550x; node n_t_551x; node n_t_552x; node n_t_553x; node n_t_554x; node n_t_555x; node n_t_556x; node n_t_557x; node n_t_558x; node n_t_559x; node n_t_55x; node n_t_560x; node n_t_561x; node n_t_562x; node n_t_563x; node n_t_564x; node n_t_567x; node n_t_568x; node n_t_569x; node n_t_56x; node n_t_570x; node n_t_571x; node n_t_572x; node n_t_573x; node n_t_574x; node n_t_575x; node n_t_576x; node n_t_577x; node n_t_578x; node n_t_579x; node n_t_57x; node n_t_580x; node n_t_581x; node n_t_582x; node n_t_583x; node n_t_584x; node n_t_585x; node n_t_586x; node n_t_587x; node n_t_588x; node n_t_589x; node n_t_58x; node n_t_590x; node n_t_591x; node n_t_592x; node n_t_593x; node n_t_594x; node n_t_595x; node n_t_596x; node n_t_597x; node n_t_598x; node n_t_599x; node n_t_59x; node n_t_5x; node n_t_600x; node n_t_601x; node n_t_602x; node n_t_603x; node n_t_604x; node n_t_605x; node n_t_606x; node n_t_607x; node n_t_608x; node n_t_609x; node n_t_60x; node n_t_610x; node n_t_611x; node n_t_612x; node n_t_613x; node n_t_614x; node n_t_615x; node n_t_616x; node n_t_617x; node n_t_618x; node n_t_619x; node n_t_61x; node n_t_620x; node n_t_621x; node n_t_622x; node n_t_623x; node n_t_624x; node n_t_625x; node n_t_626x; node n_t_627x; node n_t_628x; node n_t_629x; node n_t_630x; node n_t_631x; node n_t_632x; node n_t_633x; node n_t_634x; node n_t_635x; node n_t_636x; node n_t_637x; node n_t_638x; node n_t_639x; node n_t_63x; node n_t_640x; node n_t_641x; node n_t_642x; node n_t_643x; node n_t_644x; node n_t_645x; node n_t_646x; node n_t_647x; node n_t_648x; node n_t_649x; node n_t_64x; node n_t_650x; node n_t_651x; node n_t_652x; node n_t_653x; node n_t_654x; node n_t_655x; node n_t_656x; node n_t_657x; node n_t_658x; node n_t_659x; node n_t_65x; node n_t_660x; node n_t_661x; node n_t_662x; node n_t_663x; node n_t_664x; node n_t_665x; node n_t_666x; node n_t_667x; node n_t_668x; node n_t_669x; node n_t_66x; node n_t_670x; node n_t_671x; node n_t_672x; node n_t_673x; node n_t_674x; node n_t_675x; node n_t_676x; node n_t_677x; node n_t_678x; node n_t_679x; node n_t_67x; node n_t_680x; node n_t_681x; node n_t_682x; node n_t_683x; node n_t_684x; node n_t_685x; node n_t_686x; node n_t_687x; node n_t_688x; node n_t_689x; node n_t_68x; node n_t_690x; node n_t_691x; node n_t_692x; node n_t_693x; node n_t_694x; node n_t_695x; node n_t_696x; node n_t_697x; node n_t_698x; node n_t_699x; node n_t_69x; node n_t_6x; node n_t_700x; node n_t_702x; node n_t_703x; node n_t_704x; node n_t_705x; node n_t_706x; node n_t_707x; node n_t_708x; node n_t_709x; node n_t_70x; node n_t_710x; node n_t_711x; node n_t_712x; node n_t_713x; node n_t_714x; node n_t_715x; node n_t_716x; node n_t_717x; node n_t_718x; node n_t_719x; node n_t_71x; node n_t_720x; node n_t_721x; node n_t_722x; node n_t_725x; node n_t_726x; node n_t_727x; node n_t_728x; node n_t_729x; node n_t_72x; node n_t_730x; node n_t_731x; node n_t_732x; node n_t_733x; node n_t_734x; node n_t_735x; node n_t_736x; node n_t_737x; node n_t_738x; node n_t_739x; node n_t_73x; node n_t_740x; node n_t_741x; node n_t_742x; node n_t_743x; node n_t_744x; node n_t_745x; node n_t_746x; node n_t_747x; node n_t_748x; node n_t_749x; node n_t_74x; node n_t_75x; node n_t_76x; node n_t_77x; node n_t_78x; node n_t_79x; node n_t_7x; node n_t_80x; node n_t_81x; node n_t_82x; node n_t_83x; node n_t_84x; node n_t_85x; node n_t_86x; node n_t_87x; node n_t_88x; node n_t_89x; node n_t_8x; node n_t_90x; node n_t_91x; node n_t_92x; node n_t_93x; node n_t_94x; node n_t_95x; node n_t_96x; node n_t_97x; node n_t_98x; node n_t_99x; node n_t_9x; node nmi; node nmi_l; node no_shift; node norm; node norm_l; node op1; node op1_l; node op2; node opr; node osr_l; node out_stop2_l; node pc_enable; node pc_enable_l; node pc_increment; node pc_load; node pc_load_l; node pc_loadxsr_enable_l; node pen_strobe; node power_clear_l; node power_ok_l; node processor_iot_l; node pwr_low_l; node pwr_skip_l; node r0; node r0_l; node rdr_enable_l; node rdr_run_l; node rdr_shift; node rdr_shift_l; node reg_bus00; node reg_bus01; node reg_bus02; node reg_bus03; node reg_bus04; node reg_bus05; node reg_bus06; node reg_bus07; node reg_bus08; node reg_bus09; node reg_bus10; node reg_bus11; node restart; node restart_l; node rib; node right_shift; node rmf_l; node s_set_l; node sc0_3_0; node sc0_3_0_l; node sc_0_l; node sc_enable; node sc_full; node sc_load; node scl_l; node sf_enable; node shut_down_l; node sint; node skip_or; node slow_cycle; node slow_cycle_l; node special_cycle_l; node sr_enable; node stop_complete; node stop_ok; node store_l; node tad; node teleprinter_flag_l; node tp1; node tp2; node tp2e_l; node tp3; node tp4; node tt0_l; node tt1_l; node tt2_l; node tt3_l; node tt4_l; node tt5_l; node tt6_l; node tt7_l; node tt_ac_clr_l; node tt_ac_load_l; node tt_carry_insert; node tt_carry_insert_c_l; node tt_carry_insert_l; node tt_carry_insert_s; node tt_carry_insert_s_l; node tt_cycle_l; node tt_data; node tt_increment_l; node tt_inst; node tt_inst_l; node tt_int_l; node tt_io_enable_l; node tt_l_disable; node tt_line_shift_l; node tt_right_shift_enable; node tt_right_shift_enable_l; node tt_set_l; node tt_shift_enable; node tt_shift_enable_l; node tt_skip_l; node tti2; node tti_clock; node tti_data; node tti_skip_l; node tto_clock_l; node tto_skip_l; node uint_l; node wc_set; node wc_set_l; node x_strobe; node y_strobe; $ENDIF /* Code nodes */ /* Equations */ /* a04: m703 */ /* a05: m113 */ n_t_550x = !(mb10_l & mb09_l); n_t_549x = !('b'1 & n_t_548x); n_t_551x = !(n_t_549x & n_t_550x); n_t_561x = !(n_t_551x & i_iot_l); me05_l = !(rib & s_uf); n_t_563x = !(n_t_561x & uf); n_t_562x = !(cint_l & uint); n_t_564x = !(n_t_562x & n_t_563x); sint = !('b'1 & n_t_552x); /* a06: m113 */ iot = !(iot_l & 'b'1); n_t_63x = !('b'1 & osr_l); n_t_70x = !(n_t_63x & !uf); b_ext_inst = !(n_t_451x & 'b'1); mb06xmb09 = !(n_t_421x & 'b'1); n_t_420x = !(mb07_l & mb08_l); n_t_422x = !(n_t_420x & 'b'1); rmf_l = !(n_t_422x & mb06xmb09); /* a07: m162 */ /* a08: m162 */ /* a09: m162 */ /* a10: m162 */ /* a11: m113 */ n_t_490x = !(mem_ext & mb11); n_t_464x = !(n_t_459x & df0); n_t_463x = !(rib & sf0); n_t_465x = !(n_t_460x & if0); n_t_469x = !(n_t_459x & df1); n_t_462x = !(rib & sf1); n_t_466x = !(n_t_460x & if1); n_t_468x = !(n_t_459x & df2); n_t_461x = !(rib & sf2); n_t_467x = !(n_t_460x & if2); /* a12: m113 */ n_t_497x = !(ext_go & mb10); n_t_482x = !(sr_enable & dfsr0); n_t_481x = !(n_t_473x & mb06); n_t_480x = !(sf_enable & sf3); n_t_478x = !(sr_enable & dfsr1); n_t_477x = !(n_t_473x & mb07); n_t_476x = !(sf_enable & sf4); n_t_479x = !(sr_enable & dfsr2); n_t_474x = !(n_t_473x & mb08); n_t_475x = !(sf_enable & sf5); /* a13: m113 */ n_t_493x = !(mb11_l & rmf_l); ext_go = !(n_t_492x & 'b'1); n_t_492x = !(tp3 & mem_ext); n_t_473x = !('b'1 & n_t_490x); me09_l = !(rib & sf3); me06_l = !(n_t_470x & 'b'1); me10_l = !(rib & sf4); me07_l = !(n_t_471x & 'b'1); me11_l = !(rib & sf5); me08_l = !(n_t_472x & 'b'1); /* a14: m113 */ n_t_453x = !(n_t_452x & 'b'1); mem_ext_l = !(n_t_453x & iot); n_t_454x = !(mb09 & mem_ext); mem_ext = !(mem_ext_l & 'b'1); ext_inst = !('b'1 & n_t_454x); n_t_459x = !('b'1 & n_t_455x); rib = !('b'1 & n_t_456x); n_t_460x = !('b'1 & n_t_457x); mem_ext_ac_load_enable_l = !(tp3 & n_t_458x); /* a15: m113 */ ib_to_if_l = !(ib_to_if & 'b'1); pc_loadxsr_enable_l = !(pc_load & n_t_425x); n_t_426x = !(ext_go & n_t_424x); n_t_424x = !(mb10_l & rmf_l); sf_enable = !(rmf_l & 'b'1); mb_to_ib = !('b'1 & n_t_423x); n_t_423x = !(mb10 & mem_ext); n_t_421x = !(mb06 & ext_inst); /* a16: m113 */ n_t_411x = !(if_enable & if0); n_t_410x = !(df_enable & df0); n_t_409x = !(bf_enable & bf0); n_t_413x = !(if_enable & if1); n_t_414x = !(df_enable & df1); n_t_415x = !(bf_enable & bf1); n_t_416x = !(if_enable & if2); n_t_417x = !(df_enable & df2); n_t_418x = !(bf_enable & bf2); n_t_445x = !(f_set_l & e_set_l); /* a17: m113 */ ib_to_if = !(pc_loadxsr_enable_l & n_t_447x); n_t_446x = !(jmp_l & jms_l); n_t_444x = !(n_t_429x & n_t_439x); n_t_439x = !(key_lamfts0_l & ib0); n_t_443x = !(n_t_430x & n_t_440x); n_t_440x = !(key_lamfts0_l & ib1); n_t_442x = !(n_t_433x & n_t_441x); n_t_441x = !(key_lamfts0_l & ib2); n_t_489x = !(n_t_491x & pc_loadxsr_enable_l); n_t_491x = !(n_t_493x & ext_go); /* a18: m113 */ load_ib = !(pc_loadxsr_enable_l & n_t_426x); n_t_429x = !(sr_enable & ifsr0); n_t_427x = !(mb_to_ib & mb06); n_t_428x = !(sf_enable & sf0); n_t_430x = !(sr_enable & ifsr1); n_t_431x = !(mb_to_ib & mb07); n_t_432x = !(sf_enable & sf1); n_t_433x = !(sr_enable & ifsr2); n_t_434x = !(mb_to_ib & mb08); n_t_435x = !(sf_enable & sf2); /* a19: m113 */ n_t_263x = !(wc_set_l & word_count_l); n_t_403x = !('b'1 & n_t_263x); b_set_l = !('b'1 & b_set); n_t_412x = !(n_t_408x & !ts4); n_t_408x = !(key_stexdp & mftp1); n_t_407x = !(tp3 & b_set); load_bf = !('b'1 & n_t_407x); if_to_sf = !(n_t_53x & load_sf_l); n_t_264x = !(n_t_53x & load_sf_l); n_t_425x = !('b'1 & key_lamfts0_l); /* a20: m115 */ n_t_447x = !(n_t_445x & tp3) & n_t_446x; n_t_471x = !(n_t_469x & n_t_462x) & n_t_466x; n_t_455x = !(b_ext_inst & mb07_l) & mb08; n_t_457x = !(b_ext_inst & mb07) & mb08_l; n_t_470x = !(n_t_464x & n_t_463x) & n_t_465x; n_t_472x = !(n_t_468x & n_t_461x) & n_t_467x; n_t_456x = !(b_ext_inst & mb08) & mb07; n_t_458x = !(n_t_455x & n_t_456x) & n_t_457x; /* ab02: g826 */ /* ab03: g792 */ /* b04: m115 */ cint_l = !(mb07_l & mb08_l) & b_ext_inst; n_t_552x = !(mb08 & mb06xmb09) & mb07_l; n_t_569x = !tp2e_l & pc_load_l; !uint_l = !n_t_563x & !uint; n_t_548x = !(mb11_l & op2) & 'b'1; n_t_567x = !(uint & tp3) & sint; skip_or = !(usf_l & skip_l) & 'b'1; /* b05: m216 */ ub.ar = !clear_if_l; ub.d = n_t_556x; ub.ck = n_t_558x; ub.ap = !'b'1; uf.ar = !clear_if_l; uf.d = n_t_560x; uf.ck = ib_to_if; uf.ap = !'b'1; uint.ar = !initialize_l; uint.d = n_t_564x; uint.ck = tp3; uint.ap = !'b'1; s_uf.ar = !initialize_l; s_uf.d = uf; s_uf.ck = if_to_sf; s_uf.ap = !'b'1; usf_l.ap = !initialize_l; usf_l.d = 'b'1; usf_l.ck = n_t_569x; usf_l.ar = !n_t_567x; /* b06: m113 */ cuf_l = !(mb07 & mb06xmb09); n_t_553x = !(cuf_l & rmf_l); n_t_557x = !(ext_go & n_t_553x); n_t_558x = !(pc_loadxsr_enable_l & n_t_557x); cuf = !(cuf_l & 'b'1); n_t_554x = !(cuf & mb08); n_t_556x = !(n_t_554x & n_t_555x); n_t_555x = !(s_uf & sf_enable); n_t_559x = !(ub & key_lamfts0_l); n_t_560x = !(n_t_559x & 'b'1); /* b07: m115 */ n_t_693x = !(mb03_l & mb04_l) & mb05; n_t_699x = !(iop4 & 'b'1) & n_t_697x; n_t_700x = !('b'1 & initialize_l) & n_t_699x; n_t_694x = !(mb06_l & mb07_l) & mb08_l; mp_skip_l = !(n_t_697x & iop1) & mp_int_l; clr_parity_error_l = !(n_t_700x & 'b'1) & 'b'1; /* b08: m113 */ n_t_715x = !(mem03 & 'b'1); n_t_714x = !(mem02 & 'b'1); n_t_713x = !(mem01 & 'b'1); n_t_716x = !(mem00 & 'b'1); n_t_711x = !(mem07 & 'b'1); n_t_708x = !(mem06 & 'b'1); n_t_709x = !(mem05 & 'b'1); n_t_710x = !(mem04 & 'b'1); n_t_719x = !(mem11 & 'b'1); n_t_712x = !(mem10 & 'b'1); mem_p = 'b'1; /* b09: m113 */ n_t_717x = !(mem09 & 'b'1); n_t_718x = !(mem08 & 'b'1); n_t_720x = !('b'1 & mem_p); n_t_695x = !(n_t_693x & 'b'1); n_t_696x = !('b'1 & n_t_694x); n_t_698x = !(n_t_695x & n_t_696x); n_t_697x = !(n_t_698x & 'b'1); n_t_26x = !(mem_parity_even_l & 'b'1); /* b10: m720 */ /* b11: m216 */ if_enable.ap = !'b'1; if_enable.d = !if_enable_l; if_enable.ck = n_t_412x; if_enable.ar = !manual_preset_l; df_enable.ap = !'b'1; df_enable.d = !df_enable_l; df_enable.ck = n_t_412x; df_enable.ar = !manual_preset_l; bf_enable.ap = !'b'1; bf_enable.d = !b_set_l; bf_enable.ck = n_t_412x; bf_enable.ar = !manual_preset_l; mp_int_l.ar = !'b'1; mp_int_l.d = n_t_26x; mp_int_l.ck = tp3; mp_int_l.ap = !clr_parity_error_l; int_inhibit_l.ar = !'b'1; int_inhibit_l.d = 'b'0; int_inhibit_l.ck = n_t_27x; int_inhibit_l.ap = !ib_to_if_l; /* b12: m617 */ mcbmb00_l = mb00 & 'b'1 & 'b'1 & 'b'1; mcbmb02_l = mb02 & 'b'1 & 'b'1 & 'b'1; mcbmb04_l = mb04 & 'b'1 & 'b'1 & 'b'1; mcbmb01_l = mb01 & 'b'1 & 'b'1 & 'b'1; mcbmb03_l = mb03 & 'b'1 & 'b'1 & 'b'1; mcbmb05_l = mb05 & 'b'1 & 'b'1 & 'b'1; /* b13: m617 */ mcbmb06_l = mb06 & 'b'1 & 'b'1 & 'b'1; mcbmb08_l = mb08 & 'b'1 & 'b'1 & 'b'1; mcbmb10_l = mb10 & 'b'1 & 'b'1 & 'b'1; mcbmb07_l = mb07 & 'b'1 & 'b'1 & 'b'1; mcbmb09_l = mb09 & 'b'1 & 'b'1 & 'b'1; mcbmb11_l = mb11 & 'b'1 & 'b'1 & 'b'1; /* b14: m617 */ bma00 = ma00_l & 'b'1 & 'b'1 & 'b'1; bma02 = ma02_l & 'b'1 & 'b'1 & 'b'1; bma04 = ma04_l & 'b'1 & 'b'1 & 'b'1; bma01 = ma01_l & 'b'1 & 'b'1 & 'b'1; bma03 = ma03_l & 'b'1 & 'b'1 & 'b'1; bma05 = ma05_l & 'b'1 & 'b'1 & 'b'1; /* b15: m617 */ bma06 = ma06_l & 'b'1 & 'b'1 & 'b'1; bma08 = ma08_l & 'b'1 & 'b'1 & 'b'1; bma10 = ma10_l & 'b'1 & 'b'1 & 'b'1; bma07 = ma07_l & 'b'1 & 'b'1 & 'b'1; bma09 = ma09_l & 'b'1 & 'b'1 & 'b'1; bma11 = ma11_l & 'b'1 & 'b'1 & 'b'1; /* b16: m617 */ ea0 = n_t_411x & n_t_410x & n_t_409x & 'b'1; ea2 = n_t_416x & n_t_417x & n_t_418x & 'b'1; ea1 = n_t_413x & n_t_414x & n_t_415x & 'b'1; n_t_452x = b_fetch & mb03_l & mb04 & mb05_l; /* b17: m216 */ if0.ar = !clear_if_l; if0.d = n_t_444x; if0.ck = ib_to_if; if0.ap = !'b'1; if0_l = !if0; if1.ar = !clear_if_l; if1.d = n_t_443x; if1.ck = ib_to_if; if1.ap = !'b'1; if1_l = !if1; if2.ar = !clear_if_l; if2.d = n_t_442x; if2.ck = ib_to_if; if2.ap = !'b'1; if2_l = !if2; ib0.ar = !clear_ib_l; ib0.d = n_t_438x; ib0.ck = load_ib; ib0.ap = !'b'1; ib1.ar = !clear_ib_l; ib1.d = n_t_437x; ib1.ck = load_ib; ib1.ap = !'b'1; ib2.ar = !clear_ib_l; ib2.d = n_t_436x; ib2.ck = load_ib; ib2.ap = !'b'1; /* b18: m216 */ df0.ar = !clear_df_l; df0.d = n_t_483x; df0.ck = n_t_489x; df0.ap = !'b'1; df0_l = !df0; df1.ar = !clear_df_l; df1.d = n_t_484x; df1.ck = n_t_489x; df1.ap = !'b'1; df1_l = !df1; df2.ar = !clear_df_l; df2.d = n_t_485x; df2.ck = n_t_489x; df2.ap = !'b'1; df2_l = !df2; bf0.ar = !'b'1; bf0.d = ext_data_add0; bf0.ck = load_bf; bf0.ap = !'b'1; bf1.ar = !'b'1; bf1.d = ext_data_add1; bf1.ck = load_bf; bf1.ap = !'b'1; bf2.ar = !'b'1; bf2.d = ext_data_add2; bf2.ck = load_bf; bf2.ap = !'b'1; /* b19: m216 */ sf0.ar = !'b'1; sf0.d = if0; sf0.ck = if_to_sf; sf0.ap = !'b'1; sf1.ar = !'b'1; sf1.d = if1; sf1.ck = if_to_sf; sf1.ap = !'b'1; sf2.ar = !'b'1; sf2.d = if2; sf2.ck = n_t_264x; sf2.ap = !'b'1; sf3.ar = !'b'1; sf3.d = df0; sf3.ck = n_t_264x; sf3.ap = !'b'1; sf4.ar = !'b'1; sf4.d = df1; sf4.ck = n_t_264x; sf4.ap = !'b'1; sf5.ar = !'b'1; sf5.d = df2; sf5.ck = n_t_264x; sf5.ap = !'b'1; /* b20: m115 */ df_enable_l = !(jmp_l & jms_l) & defer; n_t_438x = !(n_t_429x & n_t_427x) & n_t_428x; n_t_436x = !(n_t_433x & n_t_434x) & n_t_435x; n_t_484x = !(n_t_478x & n_t_477x) & n_t_476x; if_enable_l = !(df_enable_l & n_t_403x) & b_set_l; n_t_437x = !(n_t_430x & n_t_431x) & n_t_432x; n_t_483x = !(n_t_482x & n_t_481x) & n_t_480x; n_t_485x = !(n_t_479x & n_t_474x) & n_t_475x; /* b21: m113 */ clear_ib_l = !(clear_ifdfbf_l & if_to_sf); clear_if_l = !(clear_ifdfbf_l & if_to_sf); clear_df_l = !(clear_ifdfbf_l & if_to_sf); /* c02: m040 */ /* c03: m040 */ /* c04: m040 */ /* c05: m040 */ /* c06: m040 */ /* c07: m661 */ b_line_hold_l = !'b'1 & 'b'1 & line_hold_l; b_c_l = !c_l & 'b'1 & 'b'1; bstlr = !mem_done_l & !s_l & ts1; /* c08: m660 */ btp3 = !('b'1 & tp3); b_mem_to_lsr = !('b'1 & mem_to_lsr_l); b_dc_inst = !('b'1 & dc_inst_l); /* c09: m113 */ n_t_728x = !(mem00 & !hs); n_t_729x = !(n_t_728x & 'b'1); tt_shift_enable = !(tt_line_shift_l & tt_right_shift_enable_l); tt_shift_enable_l = !(tt_shift_enable & 'b'1); mem_inh9_11_l = !(n_t_729x & n_t_727x); n_t_727x = !(n_t_726x & 'b'1); r0_l = !(r0 & 'b'1); tt_carry_insert_l = !(tt_carry_insert & 'b'1); tt_carry_insert_s = !(tt_carry_insert_s_l & 'b'1); /* c10: m113 */ tt_set_l = !(n_t_731x & 'b'1); tt_right_shift_enable_l = !('b'1 & tt_right_shift_enable); tt_inst = !('b'1 & tt_inst_l); n_t_733x = !(n_t_742x & 'b'1); n_t_744x = !('b'1 & n_t_743x); tt_cycle_l = !(tt_l_disable & tt_inst_l); tt_data = !(n_t_746x & n_t_747x); n_t_746x = !(line_l & !s_l); n_t_747x = !(!c_l & n_t_745x); n_t_745x = !(line_l & 'b'1); /* c11: m115 */ n_t_731x = !(c_set_l & 'b'1) & s_set_l; n_t_730x = !(!c_l & !hs) & ts2; tt_io_enable_l = !(ts3 & mb09) & tt_inst; n_t_742x = !(mb03 & mb04_l) & mb05_l; tt_right_shift_enable = !(n_t_730x & csr_enable_l) & tt_io_enable_l; tt_line_shift_l = !(ts2 & n_t_728x) & !s_l; tt_carry_insert_s_l = !(ts3 & !s_l) & c_set_l; n_t_743x = !(mb06_l & mb07_l) & mb08_l; /* c12: m617 */ initialize_l = 'b'1 & initialize & 'b'1 & 'b'1; mem_ext_io_enable_l = n_t_458x & ts3 & iot & iot; load_sf_l = int_ok & ts4 & int_strobe_l & 'b'1; /* c13: m310 */ /* c14: m113 */ n_t_622x = !(right_shift & adder11_l); n_t_610x = !(ac_to_mq_enable & ac00); n_t_623x = !(b_left_shift & mq01); n_t_624x = !(right_shift & mq00); n_t_611x = !(ac_to_mq_enable & ac01); n_t_625x = !(b_left_shift & mq02); n_t_626x = !(right_shift & mq01); n_t_612x = !(ac_to_mq_enable & ac02); n_t_627x = !(b_left_shift & mq03); n_t_660x = !(mb_to_sc_enable & mb07_l); /* c15: m113 */ n_t_628x = !(right_shift & mq02); n_t_613x = !(ac_to_mq_enable & ac03); n_t_629x = !(b_left_shift & mq04); n_t_630x = !(right_shift & mq03); n_t_614x = !(ac_to_mq_enable & ac04); n_t_631x = !(b_left_shift & mq05); n_t_632x = !(right_shift & mq04); n_t_615x = !(ac_to_mq_enable & ac05); n_t_633x = !(b_left_shift & mq06); n_t_674x = !(mb_to_sc_enable & mb08_l); /* c16: m113 */ n_t_634x = !(right_shift & mq05); n_t_616x = !(ac_to_mq_enable & ac06); n_t_635x = !(bb_left_shift & mq07); n_t_636x = !(right_shift & mq06); n_t_617x = !(ac_to_mq_enable & ac07); n_t_637x = !(bb_left_shift & mq08); n_t_638x = !(right_shift & mq07); n_t_618x = !(ac_to_mq_enable & ac08); n_t_639x = !(bb_left_shift & mq09); n_t_675x = !(mb_to_sc_enable & mb09_l); /* c17: m113 */ n_t_640x = !(right_shift & mq08); n_t_619x = !(ac_to_mq_enable & ac09); n_t_641x = !(bb_left_shift & mq10); n_t_642x = !(right_shift & mq09); n_t_620x = !(ac_to_mq_enable & ac10); n_t_643x = !(bb_left_shift & mq11); n_t_644x = !(right_shift & mq10); n_t_621x = !(ac_to_mq_enable & ac11); n_t_645x = !(bb_left_shift & n_t_682x); n_t_676x = !(mb_to_sc_enable & mb10_l); /* c18: m113 */ sc_full = !('b'1 & n_t_677x); n_t_679x = !('b'1 & n_t_678x); n_t_681x = !('b'1 & n_t_680x); n_t_680x = !(sc3 & sc4); norm_l = !('b'1 & norm); n_t_667x = !(n_t_662x & n_t_663x); n_t_662x = !(eae_on & sc4_l); n_t_663x = !(mb_to_sc_enable & mb11_l); sc0_3_0 = !(sc0_3_0_l & 'b'1); adder_l = !(adder_l_l & 'b'1); /* c19: m115 */ n_t_646x = !(n_t_622x & n_t_610x) & n_t_623x; n_t_648x = !(n_t_626x & n_t_612x) & n_t_627x; n_t_650x = !(n_t_630x & n_t_614x) & n_t_631x; n_t_652x = !(n_t_634x & n_t_616x) & n_t_635x; n_t_647x = !(n_t_624x & n_t_611x) & n_t_625x; n_t_649x = !(n_t_628x & n_t_613x) & n_t_629x; n_t_651x = !(n_t_632x & n_t_615x) & n_t_633x; n_t_653x = !(n_t_636x & n_t_617x) & n_t_637x; /* c20: m115 */ n_t_654x = !(n_t_638x & n_t_618x) & n_t_639x; n_t_656x = !(n_t_642x & n_t_620x) & n_t_643x; n_t_661x = !(n_t_659x & n_t_658x) & n_t_660x; n_t_665x = !(n_t_669x & n_t_672x) & n_t_675x; n_t_655x = !(n_t_640x & n_t_619x) & n_t_641x; n_t_657x = !(n_t_644x & n_t_621x) & n_t_645x; n_t_664x = !(n_t_668x & n_t_671x) & n_t_674x; n_t_666x = !(n_t_670x & n_t_673x) & n_t_676x; /* c21: m115 */ n_t_659x = !(eae_on & sc_full) & sc0_l; n_t_668x = !(eae_on & n_t_679x) & sc1_l; n_t_669x = !(eae_on & n_t_681x) & sc2_l; n_t_670x = !(sc3_l & eae_on) & sc4; n_t_658x = !(eae_on & n_t_677x) & sc0; n_t_671x = !(eae_on & n_t_678x) & sc1; n_t_672x = !(eae_on & n_t_680x) & sc2; n_t_673x = !(eae_on & sc3) & sc4_l; /* c22: m216 */ sc0.ar = !'b'1; sc0.d = n_t_661x; sc0.ck = sc_load; sc0.ap = !'b'1; sc0_l = !sc0; sc1.ar = !'b'1; sc1.d = n_t_664x; sc1.ck = sc_load; sc1.ap = !'b'1; sc1_l = !sc1; sc2.ar = !'b'1; sc2.d = n_t_665x; sc2.ck = sc_load; sc2.ap = !'b'1; sc2_l = !sc2; sc3.ar = !'b'1; sc3.d = n_t_666x; sc3.ck = sc_load; sc3.ap = !'b'1; sc3_l = !sc3; sc4.ar = !'b'1; sc4.d = n_t_667x; sc4.ck = sc_load; sc4.ap = !'b'1; sc4_l = !sc4; eae_end.ar = !'b'1; eae_end.d = eae_complete_l; eae_end.ck = eae_tp; eae_end.ap = !eae_run; /* c23: m216 */ mq00.ar = !'b'1; mq00.d = n_t_646x; mq00.ck = mq_load; mq00.ap = !'b'1; mq00_l = !mq00; mq01.ar = !'b'1; mq01.d = n_t_647x; mq01.ck = mq_load; mq01.ap = !'b'1; mq01_l = !mq01; mq02.ar = !'b'1; mq02.d = n_t_648x; mq02.ck = mq_load; mq02.ap = !'b'1; mq02_l = !mq02; mq03.ar = !'b'1; mq03.d = n_t_649x; mq03.ck = mq_load; mq03.ap = !'b'1; mq03_l = !mq03; mq04.ar = !'b'1; mq04.d = n_t_650x; mq04.ck = mq_load; mq04.ap = !'b'1; mq04_l = !mq04; mq05.ar = !'b'1; mq05.d = n_t_651x; mq05.ck = mq_load; mq05.ap = !'b'1; mq05_l = !mq05; /* c24: m216 */ mq06.ar = !'b'1; mq06.d = n_t_652x; mq06.ck = mq_load; mq06.ap = !'b'1; mq06_l = !mq06; mq07.ar = !'b'1; mq07.d = n_t_653x; mq07.ck = mq_load; mq07.ap = !'b'1; mq07_l = !mq07; mq08.ar = !'b'1; mq08.d = n_t_654x; mq08.ck = mq_load; mq08.ap = !'b'1; mq08_l = !mq08; mq09.ar = !'b'1; mq09.d = n_t_655x; mq09.ck = mq_load; mq09.ap = !'b'1; mq09_l = !mq09; mq10.ar = !'b'1; mq10.d = n_t_656x; mq10.ck = mq_load; mq10.ap = !'b'1; mq10_l = !mq10; mq11.ar = !'b'1; mq11.d = n_t_657x; mq11.ck = mq_load; mq11.ap = !'b'1; mq11_l = !mq11; /* d05: m516 */ lhs = !(!lhs_l & lhs_l & lhs_l & lhs_l); r0 = !(!b_r0_l & b_r0_l & b_r0_l & b_r0_l); /* d06: m310 */ /* d07: m113 */ c_no_shift_l = !(n_t_725x & hs); csr_enable_l = !(n_t_725x & !hs); n_t_725x = !(store_l & 'b'1); mem_to_lsr_l = !('b'1 & n_t_3x); n_t_5x = !('b'1 & lh_to_hs); n_t_3x = !('b'1 & n_t_2x); n_t_2x = !(!s_l & tp1); /* d09: m115 */ n_t_726x = !(!s_l & ts2) & mem09; dc_inst_l = !(n_t_733x & iot) & 'b'1; tt_carry_insert = !(tt_carry_insert_c_l & tt_carry_insert_s_l) & line_hold_l; n_t_732x = !(store_l & 'b'1) & tt_io_enable_l; tt_carry_insert_c_l = !(ts3 & !c_l) & mb11_l; tt_l_disable = !(c_l & tt_inst_l) & s_l; tt_ac_load_l = !(n_t_732x & tp3) & 'b'1; /* d10: m117 */ s_set_l = !(tt_inst & 'b'1) & 'b'1; tt_increment_l = !(ts2 & mem_inh9_11_l) & mem_inh9_11_l; store_l = !(r0_l & !c_l) & ts3; c_set_l = !(!s_l & 'b'1) & mb10; tt_inst_l = !(iot & n_t_733x) & n_t_744x; line_hold_l = !(r0 & !c_l) & ts3; /* d11: m216 */ s_l.ar = !'b'1; s_l.d = s_set_l; s_l.ck = tp4; s_l.ap = !manual_preset_l; c_l.ar = !'b'1; c_l.d = c_set_l; c_l.ck = tp4; c_l.ap = !manual_preset_l; hs.ar = !'b'1; hs.d = lhs; hs.ck = lh_to_hs; hs.ap = !'b'1; /* d12: m113 */ div_last_l = !(div_last & dvi); n_t_589x = !(n_t_587x & 'b'1); n_t_587x = !(div_last_l & mq10_l); left_shift_l = !(eae_right_shift_enable_l & b_eae_on); b_left_shift = !(left_shift_l & 'b'1); n_t_604x = !(n_t_608x & 'b'1); n_t_603x = !(div_last_l & eae_run); n_t_605x = !(eae_tp_l & mfts2_l); n_t_595x = !(tp3 & eae_begin); bb_left_shift = !('b'1 & left_shift_l); /* d13: m113 */ eae_ac_enable_l = !(eae_acbar_enable_l & b_eae_on); n_t_591x = !(eae_inst & mb09); n_t_588x = !(mq10 & div_last); b_eae_on = !(!eae_on & 'b'1); eae_inst = !(n_t_683x & 'b'1); eae_e_set_l = !(n_t_684x & eae_inst); eae_execute_l = !(opr & b_execute); n_t_684x = !(mb09_l & mb10_l); sc_0_l = !(sc0_3_0 & sc4_l); n_t_685x = !(sc_0_l & mq11_l); /* d14: m113 */ eae_tp_l = !(eae_run & eae_tp); n_t_607x = !(eae_tp_l & eae_start_l); n_t_602x = !(opr & b_execute); eae_set_l = !(eae_begin & scl_l); eae_begin = !(n_t_606x & n_t_602x); n_t_568x = !(ac01 & ac02_l); n_t_606x = !(norm_l & nmi); n_t_600x = !('b'1 & n_t_601x); n_t_601x = !(tp3 & eae_inst); n_t_599x = !(tp3 & nmi); /* d15: m113 */ n_t_579x = !(ac00_l & ac01); n_t_580x = !(ac01_l & ac00); mq_low_ac0 = !('b'1 & n_t_577x); muy_dvi_l = !(!eae_ir0 & eae_ir1); n_t_590x = !('b'1 & eae_complete_l); n_t_609x = !(n_t_590x & eae_run); mb_to_sc_enable = !(n_t_581x & 'b'1); ac_to_mq_enable = !('b'1 & ac_to_mq_enable_l); n_t_584x = !(mq11_l & muy); asr_enable = !(n_t_592x & 'b'1); /* d16: m113 */ n_t_574x = !('b'1 & n_t_571x); n_t_576x = !('b'1 & n_t_572x); n_t_575x = !('b'1 & n_t_573x); div_last = !(n_t_404x & n_t_405x); n_t_419x = !(ac01_l & ac02); n_t_686x = !(n_t_685x & dvi); n_t_688x = !(n_t_686x & 'b'1); muy = !(muy_l & 'b'1); dvi = !(dvi_l & 'b'1); nmi = !(nmi_l & 'b'1); /* d17: m115 */ eae_right_shift_enable_l = !(eae_ir1 & dvi_l) & b_eae_on; n_t_582x = !(sc1 & dvi) & sc2; eae_acbar_enable_l = !(b_eae_on & n_t_583x) & dvi; eae_l_disable = !(eae_acbar_enable_l & n_t_591x) & n_t_592x; norm = !(n_t_579x & n_t_578x) & n_t_580x; eae_no_shift_enable = !(div_last_l & n_t_582x) & b_eae_on; n_t_583x = !(sc0_3_0_l & n_t_585x) & n_t_588x; eae_start_l = !(scl_l & tp3) & eae_begin; /* d18: m115 */ n_t_592x = !(b_eae_on & eae_ir0) & eae_ir1; n_t_598x = !(mb11 & op2) & mb06; n_t_594x = !(mb07 & eae_inst) & tp3; eae_mq0bar_enable_l = !(b_eae_on & n_t_688x) & mq00; n_t_593x = !(mb05 & op2) & mb11; asr_l_set_l = !(ac00 & asr_enable) & !eae_ir2; eae_mq0_enable_l = !(mq00_l & n_t_686x) & b_eae_on; /* d19: m115 */ n_t_678x = !(sc2 & sc3) & sc4; n_t_404x = !(sc0_3_0 & adder_l) & sc4_l; n_t_406x = !(ac03_l & mq_low_ac0) & mid_ac0; muy_l = !(!eae_ir0 & eae_ir1) & !eae_ir2; n_t_570x = !(n_t_419x & n_t_406x) & n_t_568x; n_t_405x = !(sc1 & sc4) & sc2; scl_l = !(!eae_ir0 & !eae_ir1) & eae_ir2; dvi_l = !(!eae_ir0 & eae_ir1) & eae_ir2; /* d20: m117 */ n_t_578x = !(mq_low_ac0 & mid_ac0) & ac03_l; eae_mem_enable_l = !(!eae_ir0 & b_eae_on) & b_eae_on; n_t_683x = !(b_fetch & opr) & mb03; eae_left_shift_enable_l = !(eae_right_shift_enable_l & b_eae_on) & n_t_582x; n_t_586x = !(mq11 & sc1) & div_last; nmi_l = !(eae_ir0 & !eae_ir1) & !eae_ir2; /* d21: m117 */ n_t_577x = !(n_t_574x & n_t_576x) & n_t_575x; ac_to_mq_enable_l = !(mb11 & mb04_l) & mb04_l; n_t_572x = !(mq04_l & mq05_l) & mq06_l; n_t_581x = !(muy_dvi_l & !eae_on) & opr; n_t_571x = !(mq00_l & mq01_l) & mq02_l; n_t_573x = !(mq08_l & mq09_l) & mq10_l; /* d22: m617 */ n_t_677x = sc1 & sc2 & sc3 & sc4; mq_enable = n_t_593x & 'b'1 & 'b'1 & 'b'1; mq_load = 'b'1 & eae_tg & n_t_594x; sc0_3_0_l = eae_tp_l & sc1_l & sc2_l & sc3_l; sc_enable = n_t_598x & 'b'1 & 'b'1 & 'b'1; sc_load = eae_tg & n_t_599x & 'b'1 & n_t_595x; /* d23: m160 */ eae_complete_l = !(muy & sc1 & sc3 & sc4); #div_last&dvi #'b'0&'b'0 #sc0&sc_full #'b'1&nmi&n_t_570x; n_t_682x = !('b'1 & sc0_3_0 & sc4_l); #mq11&adder_l_l #adder_l&mq11_l #'b'1&'b'1&'b'1&dvi_l; n_t_585x = !(n_t_589x & mq11); #mq10&mq11_l; /* d24: m216 */ eae_ir0.ar = !eae_ir_clear_l; eae_ir0.d = mb08; eae_ir0.ck = n_t_600x; eae_ir0.ap = !'b'1; eae_ir1.ar = !eae_ir_clear_l; eae_ir1.d = mb09; eae_ir1.ck = n_t_600x; eae_ir1.ap = !'b'1; eae_ir2.ar = !eae_ir_clear_l; eae_ir2.d = mb10; eae_ir2.ck = n_t_600x; eae_ir2.ap = !'b'1; eae_on.ar = power_clear_l; eae_on.d = n_t_609x; eae_on.ck = n_t_607x; eae_on.ap = !'b'1; eae_run.ar = power_clear_l; eae_run.d = eae_on; eae_run.ck = n_t_608x; eae_run.ap = !eae_start_l; eae_tg.ar = power_clear_l; eae_tg.d = n_t_603x; eae_tg.ck = n_t_605x; eae_tg.ap = !n_t_604x; /* e03: empty */ /* e04: empty */ /* e05: empty */ /* e06: empty */ /* e07: empty */ /* e08: empty */ /* e09: m113 */ n_t_1x = !(s_l & tp1); e09f1 = !(n_t_5x & n_t_1x); n_t_58x = !(mem_enable5_8 & mem_inh9_11_l); biop1 = !('b'1 & iop1_l); biop2 = !('b'1 & iop2_l); biop4 = !('b'1 & iop4_l); io_pc_enable_l = !(iop124_l & io_on); /* e11: m113 */ key_la = !(key_la_l & n3v_lp_33_rp); key_st = !(key_st_l & restart_l); key_dp = !(key_dp_l & n3v_lp_33_rp); key_exdp = !(key_dp_l & key_ex_l); key_ss = !(n3v_lp_33_rp & key_ss_l); key_sistop = !(key_stop_l & key_si_l); key_exdp_l = !(key_exdp & n3v_lp_33_rp); iop124_l = !(n_t_120x & 'b'1); key_cont = !(n3v_lp_33_rp & key_cont_l); n_t_117x = !(break & memory_increment); /* e12: m113 */ n_t_16x = !(n_t_15x & n3v_lp_33_rp); n_t_15x = !(io_start_l & eae_start_l); n_t_17x = !(eae_end & io_end_l); io_end_l = !(io_end & n3v_lp_33_rp); key_laexdp = !(key_exdp_l & key_la_l); slow_cycle = !(n3v_lp_33_rp & slow_cycle_l); n_t_53x = !(restart & mftp1); tt_skip_l = !(n_t_266x & n3v_lp_33_rp); n_t_118x = !(word_count_l & n_t_117x); tt_int_l = !(n3v_lp_33_rp & n_t_265x); /* e13: m160 */ n_t_11x = !(mb10 & mb11_l & op2 & !uf); #key_sistop&f_set #key_exdp&mfts0 #power_ok_l&stop_ok #key_ss&'b'1&'b'1; /* e14: m115 */ n_t_19x = !(mem_idle & pause_l) & run; clear_ifdfbf_l = !(n_t_135x & n_t_125x) & mb10; n_t_25x = !(tp3 & eae_set_l) & slow_cycle_l; n_t_46x = !(iop4_set_l & iop2_set_l) & iop1_set_l; n_t_64x = !(restart_l & mfts1) & key_stexdp; key_stexdp = !(key_st_l & restart_l) & key_exdp_l; int_strobe = !(n_t_25x & eae_end) & io_end_l; n_t_13x = !(mfts0 & mfts1_l) & mfts2_l; /* e15: m113 */ n_t_20x = !(mftp2 & key_la_l); tp4 = !(n_t_19x & n_t_21x); n_t_21x = !(mftp2 & key_cont); tp1 = !(strobe_l & 'b'1); n_t_24x = !(tp2 & 'b'1); int_strobe_l = !(int_strobe & 'b'1); io_start_l = !(tp3 & slow_cycle); n_t_29x = !('b'1 & io_start_l); mfts3 = !(n_t_13x & 'b'1); /* e16: m310 */ /* e17: m310 */ /* e18: m216 */ ts1.ar = !strobe_l; ts1.d = 'b'1; ts1.ck = tp4; ts1.ap = !manual_preset_l; mem_idle.ar = !strobe_l; mem_idle.d = 'b'0; mem_idle.ck = 'b'0; mem_idle.ap = !mem_done_l; pause_l.ap = !strobe_l; pause_l.d = 'b'1; pause_l.ck = n_t_18x; pause_l.ar = !n_t_16x; run.ar = power_clear_l; run.d = n_t_11x; run.ck = tp3; run.ap = !'b'1; run_l = !run; skip_l.ar = power_clear_l; skip_l.d = n_t_108x; skip_l.ck = n_t_111x; skip_l.ap = !pc_load_l; /* e19: m216 */ ts2.ar = !manual_preset_l; ts2.d = 'b'0; ts2.ck = tp2; ts2.ap = !strobe_l; ts3.ar = !manual_preset_l; ts3.d = 'b'0; ts3.ck = tp3; ts3.ap = !n_t_24x; ts4.ar = !manual_preset_l; ts4.d = 'b'0; ts4.ck = tp4; ts4.ap = !int_strobe_l; iop1.ar = !initialize_l; iop1.d = 'b'0; iop1.ck = iop1_clr; iop1.ap = !iop1_set_l; iop1_l = !iop1; iop2.ar = !initialize_l; iop2.d = 'b'0; iop2.ck = iop2_clr; iop2.ap = !iop2_set_l; iop2_l = !iop2; iop4.ar = !initialize_l; iop4.d = 'b'0; iop4.ck = iop4_clr; iop4.ap = !iop4_set_l; iop4_l = !iop4; /* e20: m216 */ ir0_l.ar = !n_t_6x; ir0_l.d = n_t_50x; ir0_l.ck = n_t_51x; ir0_l.ap = !'b'1; ir1.ar = !n_t_6x; ir1.d = mem01; ir1.ck = n_t_51x; ir1.ap = !'b'1; ir2.ar = !n_t_6x; ir2.d = mem02; ir2.ck = n_t_51x; ir2.ap = !'b'1; brk_sync.ar = !manual_preset_l; brk_sync.d = brk_rqst; brk_sync.ck = tp1; brk_sync.ap = !'b'1; io_on.ar = !manual_preset_l; io_on.d = 'b'0; io_on.ck = io_end; io_on.ap = !io_start_l; /* e21: m115 */ tad_l = !(ir0_l & !ir1) & ir2; isz_l = !(ir0_l & ir1) & !ir2; jms_l = !(!ir0_l & !ir1) & !ir2; jmp_l = !(!ir0_l & !ir1) & ir2; and_l = !(ir0_l & !ir1) & !ir2; dca_l = !(ir0_l & ir1) & ir2; i_iot_l = !(!ir0_l & ir1) & !ir2; opr_l = !(!ir0_l & ir1) & ir2; /* e22: m113 */ and_h = !(and_l & 'b'1); tad = !(tad_l & 'b'1); isz = !(isz_l & 'b'1); jms = !(jms_l & 'b'1); dca = !(dca_l & 'b'1); eae_ir_clear_l = !(tp2 & b_fetch); jmp = !(jmp_l & 'b'1); n_t_51x = !(eae_ir_clear_l & 'b'1); opr = !(opr_l & 'b'1); /* e23: m216 */ fetch_l.ap = !manual_preset_l; fetch_l.d = !f_set; fetch_l.ck = tp4; fetch_l.ar = !n_t_52x; defer.ar = !manual_preset_l; defer.d = d_set; defer.ck = tp4; defer.ap = !'b'1; defer_l = !defer; execute_l.ap = !manual_preset_l; execute_l.d = !e_set; execute_l.ck = tp4; execute_l.ar = !'b'1; word_count.ar = !manual_preset_l; word_count.d = wc_set; word_count.ck = tp4; word_count.ap = !'b'1; word_count_l = !word_count; current_address.ar = !manual_preset_l; current_address.d = word_count; current_address.ck = tp4; current_address.ap = !'b'1; current_address_l = !current_address; break.ar = !manual_preset_l; break.d = b_set; break.ck = tp4; break.ap = !'b'1; break_l = !break; /* e24: m113 */ n_t_140x = !(!eae_on & adder_l_l); n_t_54x = !(defer & jmp_l); iot_opr_l = !(!ir0_l & ir1); special_cycle_l = !(n_t_59x & 'b'1); n_t_6x = !(tp4 & int_ok); n_t_104x = !(ac00 & mb05); n_t_103x = !(n_t_100x & 'b'1); mid_ac0 = !('b'1 & n_t_99x); low_ac0 = !('b'1 & n_t_98x); n_t_102x = !(link & mb07); /* e25: m115 */ e25d1 = !(n_t_140x & eae_mq0bar_enable_l) & eae_mq0_enable_l; n_t_59x = !(tt_set_l & current_address_l) & word_count_l; n_t_105x = !(n_t_104x & n_t_101x) & n_t_102x; n_t_111x = !(n_t_113x & tp2e_l) & n_t_115x; int_ok_l = !(int_sync & int_inhibit_l) & int_delay; d_set_l = !(iot_opr_l & b_fetch) & mb03; n_t_107x = !(mb11_l & n_t_105x) & op2; n_t_113x = !(tp3 & b_fetch) & opr; /* e26: m160 */ n_t_96x = !(tp3 & jmp & mb03_l & b_fetch); #tp1&pc_increment #tp3&tt_carry_insert #key_laexdp&mftp2 #tp3&defer&jmp; n_t_95x = !('b'1 & tp3 & n_t_93x & b_execute); #mftp2&key_st #io_strobe&iot #'b'1&tp3&b_fetch&opr; n0_to_int_enab_l = !(tp1 & int_ok); #mftp2&key_st; /* e27: m160 */ n_t_82x = !(ts2 & b_execute & 'b'1 & isz); #ts1&pc_increment #op1&mb11 #skip_or&n_t_80x #ts3&b_execute&jms; n_t_81x = !(word_count & 'b'1 & 'b'1 & 'b'1); #mfts2&key_exdp #ca_increment¤t_address #'b'1&ts2&memory_increment&break; /* e28: m160 */ l_enable = !('b'1 & mb05_l & op1 & mb07); #mfts2&key_st #'b'1&tt_l_disable #eae_l_disable&'b'1 #mb05&op1&mb07_l; n_t_108x = !(ts2 & b_execute & carry_out0 & isz); #io_enable&io_skip #n_t_106x&mb08_l #n_t_107x&op2&mb08&mb11_l; /* e29: m160 */ n_t_57x = !(ts3 & 'b'1 & defer & jmp); #ts2&n_t_68x #'b'1&'b'0 #current_address&ts4 #ts4&defer&jmp_l; n_t_68x = !(b_execute & 'b'1 & jms & 'b'1); #dca&b_execute #break&data_in #mfts3&'b'1&'b'1&key_dp; /* e30: m160 */ #ts1&pc_increment #ts4&word_count #key_exdp&mfts2 #ts3&b_execute&jms; n_t_79x = !(op2 & 'b'1 & ac_to_mq_enable_l & mb04_l); #io_enable&ac_clear_l #op1&n_t_84x #'b'1&ts2&b_execute&dca; n_t_84x = !(mb04_l & mb06); #mb04&mb06_l; /* e31: m617 */ double_right_rotate = n_t_94x & 'b'1 & 'b'1 & 'b'1; right_shift = 'b'1 & tt_right_shift_enable_l & n_t_91x & eae_right_shift_enable_l; no_shift = n_t_88x & n_t_83x & tt_carry_insert_l & c_no_shift_l; double_left_rotate = 'b'1 & 'b'1 & n_t_90x; left_shift = 'b'1 & n_t_92x & eae_left_shift_enable_l; and_enable = and_enable_l & 'b'1 & 'b'1 & 'b'1; /* e32: m617 */ ma_load = n_t_110x & 'b'1 & 'b'1 & n_t_109x; mb_load = 'b'1 & n_t_112x; ac_enable = and_enable_l & n_t_79x & add_l & eae_ac_enable_l; pc_load = 'b'1 & n_t_10x & n_t_96x & n_t_97x; ac_load = eae_tp_l & n_t_95x & tt_ac_load_l & mem_ext_ac_load_enable_l; acbar_enable = 'b'1 & n_t_72x & eae_acbar_enable_l; /* e33: m216 */ add_accepted_l.ar = !'b'1; add_accepted_l.d = break_ok_l; add_accepted_l.ck = tp4; add_accepted_l.ap = !n_t_116x; wc_overflow_l.ar = !'b'1; wc_overflow_l.d = n_t_119x; wc_overflow_l.ck = tp2; wc_overflow_l.ap = !mem_done_l; int_sync.ap = !'b'1; int_sync.d = !n_t_23x; int_sync.ck = int_strobe; int_sync.ar = !manual_preset_l; int_delay.ap = !'b'1; int_delay.d = !int_enable_l; int_delay.ck = n_t_122x; int_delay.ar = int_enable_l; int_enable_l.ar = !'b'1; int_enable_l.d = mb11_l; int_enable_l.ck = n_t_123x; int_enable_l.ap = !n0_to_int_enab_l; link.ar = !'b'1; link.d = n_t_128x; link.ck = ac_load; link.ap = !'b'1; link_l = !link; /* ef01: m706 */ /* ef02: m707 */ /* ef10: m700 */ /* ef34: m220 */ !reg_bus00 = right_shift & adder_l_l # no_shift & adder00 # adder01 & left_shift # double_right_rotate & carry_insert_l # mb00_l & and_enable # adder02 & double_left_rotate # adder_l_l & !tt_line_shift_l; !reg_bus01 = adder02 & left_shift # adder01 & no_shift # adder00 & right_shift # double_right_rotate & adder_l_l # mb01_l & and_enable # adder03 & double_left_rotate # adder01 & !tt_line_shift_l; ma00.d = reg_bus00; ma00.ck = ma_load; ma00_l = !ma00; ma01.d = reg_bus01; ma01.ck = ma_load; ma01_l = !ma01; mb00.d = reg_bus00; mb00.ck = mb_load; mb00_l = !mb00; mb01.d = reg_bus01; mb01.ck = mb_load; mb01_l = !mb01; pc00.d = reg_bus00; pc00.ck = pc_load; pc00_l = !pc00; pc01.d = reg_bus01; pc01.ck = pc_load; pc01_l = !pc01; ac00.d = reg_bus00; ac00.ck = ac_load; ac00_l = !ac00; ac01.d = reg_bus01; ac01.ck = ac_load; ac01_l = !ac01; !gdollar_2 = ac01 & ac_enable # ac01_l & acbar_enable # mq01 & mq_enable # sr_enable & sr01 # data01 & data_enable # input_bus01 & io_enable; gdollar_0 = adder01 & gdollar_2 # gdollar_2 & gdollar_4 # adder01 & gdollar_4; carry_out0_l = gdollar_0 & adder00 # adder00 & gdollar_1 # gdollar_1 & gdollar_0; !gdollar_1 = sr_enable & sr00 # data00 & data_enable # input_bus00 & io_enable # ac00 & ac_enable # ac00_l & acbar_enable # mq00 & mq_enable; !adder00 = ma_enable0_4 & ma00 # pc00 & pc_enable # mem00 & mem_enable0_4 # data_add00 & data_add_enable; !gdollar_4 = ma_enable0_4 & ma01 # pc01 & pc_enable # mem01 & mem_enable0_4 # & data_add_enable; /* ef35: m220 */ !reg_bus02 = right_shift & adder01 # no_shift & adder02 # adder03 & left_shift # double_right_rotate & adder00 # mb02_l & and_enable # adder04 & double_left_rotate # adder02 & !tt_line_shift_l; !reg_bus03 = adder04 & left_shift # adder03 & no_shift # adder02 & right_shift # double_right_rotate & adder01 # mb03_l & and_enable # carry_out6_l & double_left_rotate # adder03 & !tt_line_shift_l; ma02.d = reg_bus02; ma02.ck = ma_load; ma02_l = !ma02; ma03.d = reg_bus03; ma03.ck = ma_load; ma03_l = !ma03; mb02.d = reg_bus02; mb02.ck = mb_load; mb02_l = !mb02; mb03.d = reg_bus03; mb03.ck = mb_load; mb03_l = !mb03; pc02.d = reg_bus02; pc02.ck = pc_load; pc02_l = !pc02; pc03.d = reg_bus03; pc03.ck = pc_load; pc03_l = !pc03; ac02.d = reg_bus02; ac02.ck = ac_load; ac02_l = !ac02; ac03.d = reg_bus03; ac03.ck = ac_load; ac03_l = !ac03; !gdollar_7 = ac03 & ac_enable # ac03_l & acbar_enable # mq03 & mq_enable # sr_enable & sr03 # data03 & data_enable # input_bus03 & io_enable; gdollar_5 = adder03 & gdollar_7 # gdollar_7 & gdollar_9 # adder03 & gdollar_9; adder01 = gdollar_5 & adder02 # adder02 & gdollar_6 # gdollar_6 & gdollar_5; !gdollar_6 = sr_enable & sr02 # data02 & data_enable # input_bus02 & io_enable # ac02 & ac_enable # ac02_l & acbar_enable # mq02 & mq_enable; !adder02 = ma_enable0_4 & ma02 # pc02 & pc_enable # mem02 & mem_enable0_4 # data_add02 & data_add_enable; !gdollar_9 = ma_enable0_4 & ma03 # pc03 & pc_enable # mem03 & mem_enable0_4 # & data_add_enable; /* ef36: m220 */ !reg_bus04 = right_shift & adder03 # no_shift & adder04 # carry_out6_l & left_shift # double_right_rotate & adder02 # mb04_l & and_enable # adder06 & double_left_rotate # adder04 & !tt_line_shift_l; !reg_bus05 = adder06 & left_shift # carry_out6_l & no_shift # adder04 & right_shift # double_right_rotate & adder03 # mb05_l & and_enable # adder07 & double_left_rotate # carry_out6_l & !tt_line_shift_l; ma04.d = reg_bus04; ma04.ck = ma_load; ma04_l = !ma04; ma05.d = reg_bus05; ma05.ck = ma_load; ma05_l = !ma05; mb04.d = reg_bus04; mb04.ck = mb_load; mb04_l = !mb04; mb05.d = reg_bus05; mb05.ck = mb_load; mb05_l = !mb05; pc04.d = reg_bus04; pc04.ck = pc_load; pc04_l = !pc04; pc05.d = reg_bus05; pc05.ck = pc_load; pc05_l = !pc05; ac04.d = reg_bus04; ac04.ck = ac_load; ac04_l = !ac04; ac05.d = reg_bus05; ac05.ck = ac_load; ac05_l = !ac05; !gdollar_12 = ac05 & ac_enable # ac05_l & acbar_enable # mq05 & mq_enable # sr_enable & sr05 # data05 & data_enable # input_bus05 & io_enable; gdollar_10 = carry_out6_l & gdollar_12 # gdollar_12 & gdollar_14 # carry_out6_l & gdollar_14; adder03 = gdollar_10 & adder04 # adder04 & gdollar_11 # gdollar_11 & gdollar_10; !gdollar_11 = sr_enable & sr04 # data04 & data_enable # input_bus04 & io_enable # ac04 & ac_enable # ac04_l & acbar_enable # mq04 & mq_enable; !adder04 = ma_enable0_4 & ma04 # pc04 & pc_enable # mem04 & mem_enable0_4 # data_add04 & data_add_enable; !gdollar_14 = ma_enable5_11 & ma05 # pc05 & pc_enable # mem05 & mem_enable5_8 # & data_add_enable; /* ef37: m220 */ !reg_bus06 = right_shift & carry_out6_l # no_shift & adder06 # adder07 & left_shift # double_right_rotate & adder04 # mb06_l & and_enable # adder08 & double_left_rotate # adder06 & !tt_line_shift_l; !reg_bus07 = adder08 & left_shift # adder07 & no_shift # adder06 & right_shift # double_right_rotate & carry_out6_l # mb07_l & and_enable # adder09 & double_left_rotate # adder07 & !tt_line_shift_l; ma06.d = reg_bus06; ma06.ck = ma_load; ma06_l = !ma06; ma07.d = reg_bus07; ma07.ck = ma_load; ma07_l = !ma07; mb06.d = reg_bus06; mb06.ck = mb_load; mb06_l = !mb06; mb07.d = reg_bus07; mb07.ck = mb_load; mb07_l = !mb07; pc06.d = reg_bus06; pc06.ck = pc_load; pc06_l = !pc06; pc07.d = reg_bus07; pc07.ck = pc_load; pc07_l = !pc07; ac06.d = reg_bus06; ac06.ck = ac_load; ac06_l = !ac06; ac07.d = reg_bus07; ac07.ck = ac_load; ac07_l = !ac07; !gdollar_17 = ac07 & ac_enable # ac07_l & acbar_enable # mq07 & mq_enable # sr_enable & sr07 # sc0 & sc_enable # data07 & data_enable # input_bus07 & io_enable; gdollar_15 = adder07 & gdollar_17 # gdollar_17 & gdollar_19 # adder07 & gdollar_19; carry_out6_l = gdollar_15 & adder06 # adder06 & gdollar_16 # gdollar_16 & gdollar_15; !gdollar_16 = sr_enable & sr06 # data06 & data_enable # input_bus06 & io_enable # ac06 & ac_enable # ac06_l & acbar_enable # mq06 & mq_enable; !adder06 = ma_enable5_11 & ma06 # pc06 & pc_enable # mem06 & mem_enable5_8 # data_add06 & data_add_enable; !gdollar_19 = ma_enable5_11 & ma07 # pc07 & pc_enable # mem07 & mem_enable5_8 # & data_add_enable; /* ef38: m220 */ !reg_bus08 = right_shift & adder07 # no_shift & adder08 # adder09 & left_shift # double_right_rotate & adder06 # mb08_l & and_enable # adder10 & double_left_rotate # adder08 & !tt_line_shift_l; !reg_bus09 = adder10 & left_shift # adder09 & no_shift # adder08 & right_shift # double_right_rotate & adder07 # mb09_l & and_enable # carry_insert_l & double_left_rotate # adder09 & !tt_line_shift_l; ma08.d = reg_bus08; ma08.ck = ma_load; ma08_l = !ma08; ma09.d = reg_bus09; ma09.ck = ma_load; ma09_l = !ma09; mb08.d = reg_bus08; mb08.ck = mb_load; mb08_l = !mb08; mb09.d = reg_bus09; mb09.ck = mb_load; mb09_l = !mb09; pc08.d = reg_bus08; pc08.ck = pc_load; pc08_l = !pc08; pc09.d = reg_bus09; pc09.ck = pc_load; pc09_l = !pc09; ac08.d = reg_bus08; ac08.ck = ac_load; ac08_l = !ac08; ac09.d = reg_bus09; ac09.ck = ac_load; ac09_l = !ac09; !gdollar_22 = ac09 & ac_enable # ac09_l & acbar_enable # mq09 & mq_enable # sr_enable & sr09 # sc2 & sc_enable # data09 & data_enable # input_bus09 & io_enable; gdollar_20 = adder09 & gdollar_22 # gdollar_22 & gdollar_24 # adder09 & gdollar_24; adder07 = gdollar_20 & adder08 # adder08 & gdollar_21 # gdollar_21 & gdollar_20; !gdollar_21 = sr_enable & sr08 # sc1 & sc_enable # data08 & data_enable # input_bus08 & io_enable # ac08 & ac_enable # ac08_l & acbar_enable # mq08 & mq_enable; !adder08 = ma_enable5_11 & ma08 # pc08 & pc_enable # mem08 & mem_enable5_8 # data_add08 & data_add_enable; !gdollar_24 = ma_enable5_11 & ma09 # pc09 & pc_enable # mem09 & mem_enable9_11 # & data_add_enable; /* ef39: m220 */ !reg_bus10 = right_shift & adder09 # no_shift & adder10 # carry_insert_l & left_shift # double_right_rotate & adder08 # mb10_l & and_enable # e25d1 & double_left_rotate # adder10 & !tt_line_shift_l; !reg_bus11 = e25d1 & left_shift # carry_insert_l & no_shift # adder10 & right_shift # double_right_rotate & adder09 # mb11_l & and_enable # adder00 & double_left_rotate # carry_insert_l & !tt_line_shift_l; ma10.d = reg_bus10; ma10.ck = ma_load; ma10_l = !ma10; ma11.d = reg_bus11; ma11.ck = ma_load; ma11_l = !ma11; mb10.d = reg_bus10; mb10.ck = mb_load; mb10_l = !mb10; mb11.d = reg_bus11; mb11.ck = mb_load; mb11_l = !mb11; pc10.d = reg_bus10; pc10.ck = pc_load; pc10_l = !pc10; pc11.d = reg_bus11; pc11.ck = pc_load; pc11_l = !pc11; ac10.d = reg_bus10; ac10.ck = ac_load; ac10_l = !ac10; ac11.d = reg_bus11; ac11.ck = ac_load; ac11_l = !ac11; !gdollar_27 = tt_carry_insert_s # ac11 & ac_enable # ac11_l & acbar_enable # mq11 & mq_enable # sr_enable & sr11 # sc4 & sc_enable # data11 & data_enable # input_bus11 & io_enable; gdollar_25 = carry_insert_l & gdollar_27 # gdollar_27 & gdollar_29 # carry_insert_l & gdollar_29; adder09 = gdollar_25 & adder10 # adder10 & gdollar_26 # gdollar_26 & gdollar_25; !gdollar_26 = sr_enable & sr10 # sc3 & sc_enable # data10 & data_enable # input_bus10 & io_enable # ac10 & ac_enable # ac10_l & acbar_enable # mq10 & mq_enable; !adder10 = ma_enable5_11 & ma10 # pc10 & pc_enable # mem10 & mem_enable9_11 # data_add10 & data_add_enable; !gdollar_29 = ma_enable5_11 & ma11 # pc11 & pc_enable # mem11 & mem_enable9_11 # & data_add_enable; /* f03: m452 */ /* f04: empty */ /* f05: empty */ /* f06: empty */ /* f07: empty */ /* f08: m660 */ b_mem_start = !(n_t_20x & n_t_19x); btp2 = !(n_t_24x & 'b'1); /* f09: m119 */ n_t_451x = !(b_fetch & mb03_l) & mb04; ipc_enable = !'b'1 & 'b'1; /* f11: m117 */ iot_l = !(!ir0_l & ir1) & !ir2; n_t_120x = !('b'1 & iop2_l) & iop2_l; n_t_80x = !(int_skip_enable_l & io_pc_enable_l) & pc_enable_l; n_t_27x = !n_t_497x & cuf_l; mem_enable9_11 = !(n_t_58x & eae_mem_enable_l) & n_t_61x; n_t_23x = !(int_rqst & 'b'1) & key_laexdp_l; /* f12: m310 */ /* f13: m310 */ /* f14: m310 */ /* f15: m310 */ /* f16: m310 */ /* f17: m310 */ /* f18: m310 */ /* f19: m117 */ slow_cycle_l = !(n_t_12x & mem_ext_l) & tt_inst_l; n_t_127x = !(int_strobe & n_t_125x) & n_t_125x; n_t_265x = !(pwr_low_l & uint_l) & keyboard_flag_l; n_t_7x = !(key_la_l & key_st_l) & key_exdp_l; n_t_266x = !(tti_skip_l & tto_skip_l) & pwr_skip_l; n_t_126x = !(iot & b_fetch) & mb03_l; /* f20: m113 */ n_t_116x = !('b'1 & n_t_114x); n_t_114x = !(strobe_l & manual_preset_l); iop1_set_l = !(n_t_36x & mb11); iop2_set_l = !(n_t_39x & mb10); iop4_set_l = !(n_t_45x & mb09); n_t_12x = !(n_t_9x & 'b'1); n_t_749x = !(ipc_enable & 'b'1); n_t_9x = !(b_fetch & iot); initialize = !(n_t_8x & !power_clear_l); n_t_8x = !(mftp0 & key_st); /* f21: m113 */ n_t_119x = !(n_t_118x & carry_out0); key_laexdp_l = !(key_laexdp & run_l); n_t_122x = !(n_t_121x & 'b'1); n_t_121x = !(int_strobe & b_fetch); n_t_123x = !(n_t_127x & 'b'1); int_ok = !('b'1 & int_ok_l); n_t_124x = !(mb10_l & mb11_l); n_t_125x = !(n_t_126x & 'b'1); n_t_135x = !('b'1 & n_t_134x); processor_iot_l = !(n_t_125x & n_t_135x); /* f22: m113 */ n_t_50x = !('b'1 & mem00); f_set = !(f_set_l & 'b'1); n_t_52x = !(mftp2 & key_st); e_set_l = !(e_set & 'b'1); d_set = !(d_set_l & 'b'1); break_ok = !(break_ok_l & 'b'1); wc_set = !(wc_set_l & 'b'1); n_t_56x = !(break_ok & wc_set_l); b_set = !(n_t_56x & current_address_l); wc_set_l = !(n3_cycle & break_ok); /* f23: m117 */ n_t_101x = !(n_t_103x & mid_ac0) & low_ac0; n_t_55x = !(iot_opr_l & jmp_l) & jmp_l; f_set_l = !(special_cycle_l & break_ok_l) & e_set_l; e_set = !(int_ok_l & n_t_54x) & n_t_55x; break_ok_l = !(e_set_l & brk_sync) & special_cycle_l; n_t_134x = !(mb05_l & mb06_l) & mb07_l; /* f24: m117 */ n_t_83x = !(op1_l & tt_shift_enable_l) & eae_no_shift_enable; n_t_77x = !(ma04_l & ma06_l) & ma06_l; n_t_99x = !(ac04_l & ac05_l) & ac06_l; n_t_78x = !(ma00_l & ma01_l) & ma02_l; n_t_100x = !(ac00_l & ac01_l) & ac02_l; n_t_98x = !(ac08_l & ac09_l) & ac10_l; /* f25: m113 */ op1 = !(op1_l & 'b'1); ca_increment = !(ca_increment_l & 'b'1); n_t_87x = !(n_t_78x & tt_increment_l); n_t_86x = !(n_t_77x & tt_increment_l); n_t_85x = !(n_t_75x & tt_increment_l); n_t_75x = !(ma08 & defer); n_t_106x = !(n_t_107x & 'b'1); pc_load_l = !(pc_load & 'b'1); tp2e_l = !(tp2 & b_execute); n_t_115x = !(io_strobe & skip_l); /* f26: m115 */ n_t_90x = !(mb09 & op1) & mb10; n_t_91x = !(mb08 & op1) & mb10_l; n_t_88x = !(mb08_l & op1) & mb09_l; and_enable_l = !(and_h & ts3) & b_execute; n_t_94x = !(mb08 & op1) & mb10; n_t_92x = !(mb09 & op1) & mb10_l; n_t_97x = !(tp3 & b_execute) & jms; n_t_93x = !(and_l & tad_l) & dca_l; /* f27: m117 */ n_t_61x = !(ts3 & jmp) & b_fetch; n_t_76x = !(opr & b_fetch) & b_fetch; auto_index_l = !(n_t_87x & n_t_86x) & n_t_85x; n_t_73x = !(ts4 & n_t_60x) & int_ok_l; n_t_89x = !(auto_index_l & n_t_82x) & n_t_81x; op1_l = !(opr & ts3) & b_fetch; /* f28: m115 */ add_l = !(tad & ts3) & b_execute; int_skip_enable_l = !(ts2 & b_execute) & jms; n_t_67x = !(ts2 & break) & data_in; n_t_130x = !(adder11_l & !eae_on) & tt_inst_l; n_t_74x = !(mem_enable5_8 & mem_enable0_4_l) & mb04; n_t_65x = !(f_set_l & eae_e_set_l) & tt_set_l; osr_l = !(op2 & mb11_l) & mb09; pc_increment = !(fetch_l & eae_execute_l) & tt_cycle_l; /* f29: m113 */ mem_enable0_4_l = !(mem_enable0_4 & 'b'1); n_t_60x = !(d_set_l & e_set_l); data_in = !(data_in_l & 'b'1); op2 = !('b'1 & n_t_76x); ac_clear_l = !('b'1 & ac_clear); n_t_69x = !(ts4 & break_ok); lbar_enable = !(n_t_66x & eae_acbar_enable_l); n_t_71x = !(key_dp & mfts3); key_lamfts0_l = !(key_la & mfts0); n_t_66x = !(op1 & mb07); /* f30: m617 */ pc_enable = n_t_749x & 'b'1 & 'b'1 & 'b'1; data_enable = n_t_67x & 'b'1 & 'b'1 & 'b'1; sr_enable = n_t_71x & n_t_70x & key_lamfts0_l & 'b'1; io_enable = iop124_l & mem_ext_io_enable_l & 'b'1 & tt_io_enable_l; data_add_enable = n_t_69x & 'b'1 & 'b'1 & 'b'1; manual_preset_l = 'b'1 & mftp0; /* f31: m617 */ mem_enable0_4 = add_l & n_t_57x & store_l & eae_mem_enable_l; ma_enable0_4 = n_t_74x & 'b'1 & 'b'1 & 'b'1; b_fetch = fetch_l & 'b'1 & 'b'1 & 'b'1; mem_enable5_8 = eae_mem_enable_l & n_t_61x & mem_enable0_4_l & n_t_73x; ma_enable5_11 = 'b'1 & 'b'1 & 'b'1 & 'b'1; b_execute = execute_l & 'b'1 & 'b'1 & 'b'1; /* f32: m113 */ carry_insert_l = !(n_t_89x & 'b'1); n_t_110x = !(mftp1 & key_stexdp); n_t_109x = !(tp4 & 'b'1); n_t_112x = !('b'1 & tp2); n_t_72x = !(op1 & mb06); pc_enable_l = !(ts4 & n_t_65x); n_t_10x = !(io_pc_load & 'b'1); adder11_l = !(carry_insert_l & 'b'1); n_t_129x = !('b'1 & n_t_137x); carry_out0 = !('b'1 & carry_out0_l); /* f33: m160 */ n_t_128x = !(n_t_130x & asr_l_set_l & 'b'1 & right_shift); #adder10&double_right_rotate #adder_l_l&no_shift #left_shift&adder00 #adder01&double_left_rotate&'b'1; n_t_137x = !('b'1 & tt_shift_enable & tt_inst_l & tt_data); #link&l_enable #link_l&lbar_enable #ac00&b_eae_on&asr_enable&!eae_ir2; adder_l_l = !(n_t_137x & carry_out0); #n_t_129x&carry_out0_l; /* h06: empty */ /* h07: m650 */ bac00 = !n3v_lp_49_rp & ac00 & n3v_lp_49_rp; bac01 = !n3v_lp_49_rp & ac01 & n3v_lp_49_rp; bac02 = !n3v_lp_49_rp & ac02 & n3v_lp_49_rp; /* h08: m650 */ bac03 = !n3v_lp_49_rp & ac03 & n3v_lp_49_rp; bac04 = !n3v_lp_49_rp & ac04 & n3v_lp_49_rp; bac05 = !n3v_lp_49_rp & ac05 & n3v_lp_49_rp; /* h09: m650 */ bac06 = !'b'1 & ac06 & 'b'1; bac07 = !'b'1 & ac07 & 'b'1; bac08 = !'b'1 & ac08 & 'b'1; /* h10: m650 */ bac09 = !'b'1 & ac09 & 'b'1; bac10 = !'b'1 & ac10 & 'b'1; bac11 = !'b'1 & ac11 & 'b'1; /* h11: m650 */ biop1_l = !'b'1 & iop1_l & 'b'1; biop2_l = !'b'1 & iop2_l & 'b'1; biop4_l = !'b'1 & iop4_l & 'b'1; /* h12: m650 */ bts3 = !'b'1 & !ts3 & 'b'1; bts1 = !'b'1 & !ts1 & 'b'1; binitialize_l = !'b'1 & initialize_l & 'b'1; /* h13: m650 */ bmb00 = !'b'1 & mb00 & 'b'1; bmb01 = !'b'1 & mb01 & 'b'1; bmb02 = !'b'1 & mb02 & 'b'1; /* h14: m650 */ bmb03_l = !'b'1 & mb03_l & 'b'1; bmb03 = !'b'1 & mb03 & 'b'1; bmb04_l = !'b'1 & mb04_l & 'b'1; /* h15: m650 */ bmb04 = !'b'1 & mb04 & 'b'1; bmb05_l = !'b'1 & mb05_l & 'b'1; bmb05 = !'b'1 & mb05 & 'b'1; /* h16: m650 */ bmb06_l = !'b'1 & mb06_l & 'b'1; bmb06 = !'b'1 & mb06 & 'b'1; bmb07_l = !'b'1 & mb07_l & 'b'1; /* h17: m650 */ bmb07 = !'b'1 & mb07 & 'b'1; bmb08_l = !'b'1 & mb08_l & 'b'1; bmb08 = !'b'1 & mb08 & 'b'1; /* h18: m650 */ bmb09 = !'b'1 & mb09 & 'b'1; bmb10 = !'b'1 & mb10 & 'b'1; bmb11 = !'b'1 & mb11 & 'b'1; /* h19: m650 */ brun_l = !'b'1 & run_l & 'b'1; btt_inst_l = !'b'1 & tt_inst_l & 'b'1; bwc_overflow = !'b'1 & wc_overflow_l & 'b'1; /* h20: m650 */ bbreak = !'b'1 & break_l & 'b'1; badd_accepted_l = !'b'1 & add_accepted_l & 'b'1; /* h21: empty */ /* h22: empty */ /* h33: empty */ /* h35: empty */ /* h36: empty */ /* h37: empty */ /* h38: empty */ /* h39: empty */ /* h40: empty */ /* hj23: m701 */ /* hj24: a607 */ /* hj25: a607 */ /* hj26: m705 */ /* hj27: m715 */ /* hj28: m710 */ /* hj29: m704 */ /* hj32: m716 */ /* j13: m506 */ input_bus00 = !(!in00 & io_bus_in00_l & 'b'1 & 'b'1); input_bus02 = !(!in02 & io_bus_in02_l & 'b'1 & 'b'1); input_bus04 = !(!in04 & io_bus_in04_l & tt0_l & 'b'1); input_bus01 = !(!in01 & io_bus_in01_l & 'b'1 & 'b'1); input_bus03 = !(!in03 & io_bus_in03_l & 'b'1 & 'b'1); input_bus05 = !(!in05 & io_bus_in05_l & tt1_l & me05_l); /* j14: m506 */ input_bus06 = !(!in06 & io_bus_in06_l & tt2_l & me06_l); input_bus08 = !(!in08 & io_bus_in08_l & tt4_l & me08_l); input_bus10 = !(!in10 & io_bus_in10_l & tt6_l & me10_l); input_bus07 = !(!in07 & io_bus_in07_l & tt3_l & me07_l); input_bus09 = !(!in09 & io_bus_in09_l & tt5_l & me09_l); input_bus11 = !(!in11 & io_bus_in11_l & tt7_l & me11_l); /* j15: m506 */ io_skip = !(!skipb & io_bus_in_skip_l & tt_skip_l & mp_skip_l); ac_clear = !(!acclr & io_bus_in_ac_clr_l & tt_ac_clr_l & clock_ac_clr_l); brk_rqst = !(!brq & 'b'1 & 'b'1 & 'b'1); int_rqst = !(!irq & io_bus_in_int_l & tt_int_l & mp_int_l); line_l = !(!line_in & 'b'1 & 'b'1 & 'b'1); data_in_l = !(!d_in_l & 'b'1 & 'b'1 & 'b'1); /* j16: m506 */ data_add00 = !(!da00 & 'b'1 & 'b'1 & 'b'1); data_add02 = !(!da02 & 'b'1 & 'b'1 & 'b'1); data_add04 = !(!da04 & 'b'1 & 'b'1 & 'b'1); data_add01 = !(!da01 & 'b'1 & 'b'1 & 'b'1); data_add03 = !(!da03 & 'b'1 & 'b'1 & 'b'1); data_add05 = !(!da05 & 'b'1 & 'b'1 & 'b'1); /* j17: m506 */ data_add06 = !(!da06 & 'b'1 & 'b'1 & 'b'1); data_add08 = !(!da08 & 'b'1 & 'b'1 & 'b'1); data_add10 = !(!da10 & 'b'1 & 'b'1 & 'b'1); data_add07 = !(!da07 & 'b'1 & 'b'1 & 'b'1); data_add09 = !(!da09 & 'b'1 & 'b'1 & 'b'1); data_add11 = !(!da11 & 'b'1 & 'b'1 & 'b'1); /* j18: m506 */ data00 = !(!d00 & 'b'1 & 'b'1 & 'b'1); data02 = !(!d02 & 'b'1 & 'b'1 & 'b'1); data04 = !(!d04 & 'b'1 & 'b'1 & 'b'1); data01 = !(!d01 & 'b'1 & 'b'1 & 'b'1); data03 = !(!d03 & 'b'1 & 'b'1 & 'b'1); data05 = !(!d05 & 'b'1 & 'b'1 & 'b'1); /* j19: m506 */ data06 = !(!d06 & 'b'1 & 'b'1 & 'b'1); data08 = !(!d08 & 'b'1 & 'b'1 & 'b'1); data10 = !(!d10 & 'b'1 & 'b'1 & 'b'1); data07 = !(!d07 & 'b'1 & 'b'1 & 'b'1); data09 = !(!d09 & 'b'1 & 'b'1 & 'b'1); data11 = !(!d11 & 'b'1 & 'b'1 & 'b'1); /* j20: m506 */ memory_increment = !(!mem_incr & 'b'1 & 'b'1 & 'b'1); ca_increment_l = !(!ca_incr_l & 'b'1 & 'b'1 & 'b'1); ext_data_add1 = !(!eda1 & 'b'1 & 'b'1 & 'b'1); n3_cycle = !(!n3cycle & 'b'1 & 'b'1 & 'b'1); ext_data_add0 = !(!eda0 & 'b'1 & 'b'1 & 'b'1); ext_data_add2 = !(!eda2 & 'b'1 & 'b'1 & 'b'1); /* j21: empty */ /* j22: empty */ /* j30: m401 */ /* j33: m714 */ /* j35: empty */ /* j36: empty */ /* j37: empty */ /* j38: empty */ /* j39: empty */ /* j40: empty */ /* Open collector 'wire-or'!s_l */