JTAG - ISP RX ADDR TX ADDR Alan's frequently used manually inputted parts Quad-Height DEC board A B C D E F H J K L M N P R S T U V D1 !DATA11 !DATA10 GND !DATA9 !DATA8 !MD11 GND !MD10 !MD9 !MD8 !MA11 !MA10 GND !MA9 !MA8 GND N.C. N.C. A B C D E F H J K L M N P R S T U V C1 A B C D E F H J K L M N P R S T U V B1 A B C D E F H J K L M N P R S T U V A1 !DATA3 !DATA2 GND !DATA1 !DATA0 !MD3 GND !MD2 !MD1 !MD0 !MA3 !MA2 GND !MA1 !MA0 SP GND N.C. N.C. !DATA7 !DATA6 GND !DATA5 !DATA4 !MD7 GND !MD6 !MD5 !MD4 !MA7 !MA6 GND !MA5 !MA4 GND N.C. N.C. A B C D E F H J K L M N P R S T U V D2 !IND2 !IND1 GND !LINK LOAD !LINK DATA !TS4 GND !TS3 !TS2 !TS1 !TP4 !TP3 GND !TP2 !TP1 GND -15V +15V A B C D E F H J K L M N P R S T U V C2 A B C D E F H J K L M N P R S T U V B2 A B C D E F H J K L M N P R S T U V A2 >VALUE >NAME 84 CAPACITOR grid 5 mm, outline 2.5 x 7.5 mm >NAME >VALUE >VALUE >NAME 1 ON 2 3 4 5 6 >VALUE >NAME <B>LED</B><p> 3 mm, round >NAME >VALUE <b>RESISTOR</b><p> type 0204, grid 7.5 mm >NAME >VALUE >NAME >VALUE >NAME >NAME >VALUE <b>EAGLE Design Rules</b> <p> Die Standard-Design-Rules sind so gewählt, dass sie für die meisten Anwendungen passen. Sollte ihre Platine besondere Anforderungen haben, treffen Sie die erforderlichen Einstellungen hier und speichern die Design Rules unter einem neuen Namen ab. <b>EAGLE Design Rules</b> <p> The default Design Rules have been set to cover a wide range of applications. Your particular design may have different requirements, so please make the necessary adjustments and save your customized design rules under a new name. <b>Seeed Studio EAGLE Design Rules</b>