~/Verilog/bin/topld.pl M040E
info: 1n4003 ne 1n4004
warning: making d1/1n4003/ a connector
info: 1n4003 ne 1n4004
warning: making d2/1n4003/ a connector
info: mps6534 ne _pnp_to39_ebc
warning: making q1/mps6534/ a connector
info: dec3494 ne _pnp_to39_ebc
warning: making q2/dec3494/ a connector
info: 2n3790 ne _pnp_to3
warning: making q3/2n3790/ a connector
info: mps6534 ne _pnp_to39_ebc
warning: making q4/mps6534/ a connector
info: dec3494 ne _pnp_to39_ebc
warning: making q5/dec3494/ a connector
info: 2n3790 ne _pnp_to3
warning: making q6/2n3790/ a connector
info: edge_1 ne edge_con1
warning: making u$2/edge_1/ a connector
~/Verilog/bin/smaller.pl M040E.PLD >vv || (rm vv; exit 1)
0 signals were removed:
~/Verilog/bin/smaller.pl vv >M040EX.PLD || (rm M040EX.PLD; exit 1)
0 signals were removed:
~/Verilog/bin/cupl2v.pl M040EX.PLD >vv || (rm vv; exit 1)
mv vv M040E.v
rm M040EX.PLD