// this file is generated by topld.pl 
// please don't edit it. 
// input pins 
// output pins 
// internal nodes 
// code nodes 
// equations 
// c1: c_us 
// e1: sn7420 
module m040x (n15v, n_t_11x, n_t_16x, n_t_18x, n_t_19x, n_t_1x, n_t_2x, n_t_3x, n_t_4x, n_t_5x, n_t_6x, n_t_7x, n_t_8x, n_t_9x);
output n15v;
output n_t_11x;
output n_t_16x;
output n_t_18x;
output n_t_19x;
input n_t_1x;
input n_t_2x;
input n_t_3x;
input n_t_4x;
input n_t_5x;
input n_t_6x;
input n_t_7x;
input n_t_8x;
output n_t_9x;


assign n_t_11x = ~(n_t_5x & n_t_6x & n_t_7x & n_t_8x);
assign n_t_9x = ~(n_t_4x & n_t_1x & n_t_2x & n_t_3x);
// open collector 'wire-or's 
endmodule