~/Verilog/bin/topld.pl M101X
info: 1n4154 ne 1n4148do35_10
warning: making d1/1n4154/ a connector
info: 1n4154 ne 1n4148do35_10
warning: making d10/1n4154/ a connector
info: 1n4154 ne 1n4148do35_10
warning: making d11/1n4154/ a connector
info: 1n4154 ne 1n4148do35_10
warning: making d12/1n4154/ a connector
info: 1n4154 ne 1n4148do35_10
warning: making d13/1n4154/ a connector
info: 1n4154 ne 1n4148do35_10
warning: making d14/1n4154/ a connector
info: 1n4154 ne 1n4148do35_10
warning: making d15/1n4154/ a connector
info: 1n4154 ne 1n4148do35_10
warning: making d2/1n4154/ a connector
info: 1n4154 ne 1n4148do35_10
warning: making d3/1n4154/ a connector
info: 1n4154 ne 1n4148do35_10
warning: making d4/1n4154/ a connector
info: 1n4154 ne 1n4148do35_10
warning: making d5/1n4154/ a connector
info: 1n4154 ne 1n4148do35_10
warning: making d6/1n4154/ a connector
info: 1n4154 ne 1n4148do35_10
warning: making d7/1n4154/ a connector
info: 1n4154 ne 1n4148do35_10
warning: making d8/1n4154/ a connector
info: 1n4154 ne 1n4148do35_10
warning: making d9/1n4154/ a connector
info: 7400n ne dil14
info: 7400n ne dil14
info: 7400n ne dil14
info: 7400n ne dil14
info: single ne edge_con2
warning: making u$1/single/ a connector
~/Verilog/bin/smaller.pl M101X.PLD >vv || (rm vv; exit 1)
0 signals were removed:
~/Verilog/bin/smaller.pl vv >M101XX.PLD || (rm M101XX.PLD; exit 1)
0 signals were removed:
~/Verilog/bin/cupl2v.pl M101XX.PLD >vv || (rm vv; exit 1)
mv vv M101X.v
rm M101XX.PLD