~/Verilog/bin/topld.pl M104D
info: 100ns ne rc_l_22
warning: making dl1/100ns/ a connector
info: 100ns ne rc_l_22
warning: making dl2/100ns/ a connector
info: 7400n ne dil14
info: 74h40n ne 7420n
info: 2n3009b ne _npn_to39_ebc
warning: making q1/2n3009b/ a connector
info: 68 ne 1/2w
warning: making r5/68/ a connector
info: single ne edge_con2
warning: making u$8/single/ a connector
warning: non-bypass capacitor deleted: c7
warning: non-bypass capacitor deleted: c8
warning: non-bypass capacitor deleted: c9
~/Verilog/bin/smaller.pl M104D.PLD >vv || (rm vv; exit 1)
2 signals were removed:
  n_t_7x: !n_t_6x
  n_t_9x: !n_t_8x
~/Verilog/bin/smaller.pl vv >M104DX.PLD || (rm M104DX.PLD; exit 1)
0 signals were removed:
~/Verilog/bin/cupl2v.pl M104DX.PLD >vv || (rm vv; exit 1)
mv vv M104D.v
rm M104DX.PLD