// this file is generated by topld.pl 
// please don't edit it. 
// input pins 
// output pins 
// internal nodes 
// code nodes 
// equations 
// c1: c_us 
// c2: c_us 
// c3: c_us 
// c4: c_us 
// c5: c_us 
// c6: c_us 
// c7: cpol_use 
// e1: sp380n 
module m109x (bit13, bit14, bit15, bit16, bit17, n_t_10x, n_t_11x, n_t_12x, n_t_13x, n_t_14x, n_t_15x, n_t_16x, n_t_17x, n_t_18x, n_t_19x, n_t_1x, n_t_20x, n_t_21x, n_t_22x, n_t_23x, n_t_24x, n_t_25x, n_t_26x, n_t_27x, n_t_28x, n_t_29x, n_t_2x, n_t_30x, n_t_31x, n_t_32x, n_t_33x, n_t_34x, n_t_35x, n_t_37x, n_t_38x, n_t_3x, n_t_4x, n_t_5x, n_t_6x, n_t_7x, n_t_8x, n_t_9x);
input bit13;
input bit14;
input bit15;
input bit16;
input bit17;
input n_t_10x;
input n_t_11x;
output n_t_12x;
input n_t_13x;
input n_t_14x;
input n_t_15x;
output n_t_16x;
input n_t_17x;
input n_t_18x;
input n_t_19x;
input n_t_1x;
output n_t_20x;
output n_t_21x;
output n_t_22x;
output n_t_23x;
output n_t_24x;
output n_t_25x;
input n_t_26x;
input n_t_27x;
output n_t_28x;
input n_t_29x;
input n_t_2x;
input n_t_30x;
input n_t_31x;
output n_t_32x;
output n_t_33x;
input n_t_34x;
output n_t_35x;
output n_t_37x;
input n_t_38x;
output n_t_3x;
output n_t_4x;
input n_t_5x;
output n_t_6x;
output n_t_7x;
output n_t_8x;
output n_t_9x;


assign n_t_3x = ~n_t_1x;
assign n_t_4x = ~n_t_18x;
assign n_t_22x = ~n_t_19x;
assign n_t_23x = ~n_t_17x;
// e2: sp380n 
assign n_t_6x = ~n_t_27x;
assign n_t_25x = ~n_t_26x;
assign n_t_24x = ~n_t_5x;
assign n_t_7x = ~n_t_2x;
// e3: sp380n 
assign n_t_32x = ~n_t_38x;
assign n_t_12x = ~n_t_10x;
assign n_t_28x = ~n_t_30x;
assign n_t_8x = ~n_t_29x;
// e4: sp380n 
assign n_t_21x = ~n_t_13x;
assign n_t_33x = ~n_t_31x;
// e5: sp314n 
assign n_t_37x = ~(bit13
                    | bit14
                    | bit15
                    | bit17
                    | bit16);
// e6: sp380n 
assign n_t_35x = ~n_t_34x;
assign n_t_16x = ~n_t_11x;
assign n_t_9x = ~n_t_15x;
assign n_t_20x = ~n_t_14x;
// open collector 'wire-or's 
endmodule