~/Verilog/bin/topld.pl M1103A info: 7408n ne dil14 info: 7408n ne dil14 info: 7408n ne dil14 info: single ne edge_con2 warning: making u$1/single/ a connector ~/Verilog/bin/smaller.pl M1103A.PLD >vv || (rm vv; exit 1) 0 signals were removed: ~/Verilog/bin/smaller.pl vv >M1103AX.PLD || (rm M1103AX.PLD; exit 1) 0 signals were removed: ~/Verilog/bin/cupl2v.pl M1103AX.PLD >vv || (rm vv; exit 1) mv vv M1103A.v rm M1103AX.PLD