~/Verilog/bin/topld.pl M1125A
info: 7486n ne dil14
info: 7486n ne dil14
info: 7486n ne dil14
info: single ne edge_con2
warning: making u$2/single/ a connector
~/Verilog/bin/smaller.pl M1125A.PLD >vv || (rm vv; exit 1)
0 signals were removed:
~/Verilog/bin/smaller.pl vv >M1125AX.PLD || (rm M1125AX.PLD; exit 1)
0 signals were removed:
~/Verilog/bin/cupl2v.pl M1125AX.PLD >vv || (rm vv; exit 1)
mv vv M1125A.v
rm M1125AX.PLD