~/Verilog/bin/topld.pl M127X
info: 74h53n ne dil14
info: 74h53n ne dil14
info: 74h53n ne dil14
info: single ne edge_con2
warning: making u$4/single/ a connector
~/Verilog/bin/smaller.pl M127X.PLD >vv || (rm vv; exit 1)
6 signals were removed:
  gdollar_0: j2
  gdollar_1: !gdollar_0
  gdollar_2: p2
  gdollar_3: !gdollar_2
  gdollar_4: v2
  gdollar_5: !gdollar_4
~/Verilog/bin/smaller.pl vv >M127XX.PLD || (rm M127XX.PLD; exit 1)
1 signals were removed:
  gdollar_2: p2
~/Verilog/bin/cupl2v.pl M127XX.PLD >vv || (rm vv; exit 1)
mv vv M127X.v
rm M127XX.PLD