~/Verilog/bin/topld.pl M139A info: cpol_use ne cpol_use20_8axial info: 74h30n ne 7430n info: 74h30n ne 7430n info: 74h30n ne 7430n info: single ne edge_con2 warning: making u$2/single/ a connector ~/Verilog/bin/smaller.pl M139A.PLD >vv || (rm vv; exit 1) 0 signals were removed: ~/Verilog/bin/smaller.pl vv >M139AX.PLD || (rm M139AX.PLD; exit 1) 0 signals were removed: ~/Verilog/bin/cupl2v.pl M139AX.PLD >vv || (rm vv; exit 1) mv vv M139A.v rm M139AX.PLD