~/Verilog/bin/topld.pl M141X
info: single ne edge_con2
warning: making u$4/single/ a connector
~/Verilog/bin/smaller.pl M141X.PLD >vv || (rm vv; exit 1)
0 signals were removed:
~/Verilog/bin/smaller.pl vv >M141XX.PLD || (rm M141XX.PLD; exit 1)
0 signals were removed:
~/Verilog/bin/cupl2v.pl M141XX.PLD >vv || (rm vv; exit 1)
mv vv M141X.v
rm M141XX.PLD