~/Verilog/bin/topld.pl M149X
info: 7400n ne dil14
info: single ne edge_con2
warning: making u$1/single/ a connector
warning: non-bypass capacitor deleted: c9
~/Verilog/bin/smaller.pl M149X.PLD >vv || (rm vv; exit 1)
0 signals were removed:
~/Verilog/bin/smaller.pl vv >M149XX.PLD || (rm M149XX.PLD; exit 1)
0 signals were removed:
~/Verilog/bin/cupl2v.pl M149XX.PLD >vv || (rm vv; exit 1)
mv vv M149X.v
rm M149XX.PLD