// this file is generated by topld.pl 
// please don't edit it. 
// input pins 
// output pins 
// internal nodes 
// code nodes 
// equations 
// c1: cpol_use 
// c2: c_us 
// c3: c_us 
// e1: sn74154 
module m155x (n_t_10x, n_t_11x, n_t_12x, n_t_13x, n_t_14x, n_t_15x, n_t_16x, n_t_17x, n_t_18x, n_t_19x, n_t_1x, n_t_20x, n_t_21x, n_t_22x, n_t_2x, n_t_3x, n_t_4x, n_t_5x, n_t_6x, n_t_7x, n_t_8x, n_t_9x);
input n_t_10x;
input n_t_11x;
input n_t_12x;
input n_t_13x;
output n_t_14x;
input n_t_15x;
output n_t_16x;
output n_t_17x;
output n_t_18x;
output n_t_19x;
output n_t_1x;
output n_t_20x;
output n_t_21x;
output n_t_22x;
output n_t_2x;
output n_t_3x;
output n_t_4x;
output n_t_5x;
output n_t_6x;
output n_t_7x;
input n_t_8x;
output n_t_9x;


assign n_t_9x = n_t_15x
                 | n_t_13x
                 | ~(~n_t_11x & ~n_t_12x & ~n_t_10x & ~n_t_8x);
assign n_t_6x = n_t_15x
                 | n_t_13x
                 | ~(~n_t_11x & ~n_t_12x & ~n_t_10x & n_t_8x);
assign n_t_5x = n_t_15x
                 | n_t_13x
                 | ~(~n_t_11x & ~n_t_12x & n_t_10x & ~n_t_8x);
assign n_t_4x = n_t_15x
                 | n_t_13x
                 | ~(~n_t_11x & ~n_t_12x & n_t_10x & n_t_8x);
assign n_t_3x = n_t_15x
                 | n_t_13x
                 | ~(~n_t_11x & n_t_12x & ~n_t_10x & ~n_t_8x);
assign n_t_2x = n_t_15x
                 | n_t_13x
                 | ~(~n_t_11x & n_t_12x & ~n_t_10x & n_t_8x);
assign n_t_14x = n_t_15x
                  | n_t_13x
                  | ~(~n_t_11x & n_t_12x & n_t_10x & ~n_t_8x);
assign n_t_1x = n_t_15x
                 | n_t_13x
                 | ~(~n_t_11x & n_t_12x & n_t_10x & n_t_8x);
assign n_t_22x = n_t_15x
                  | n_t_13x
                  | ~(n_t_11x & ~n_t_12x & ~n_t_10x & ~n_t_8x);
assign n_t_7x = n_t_15x
                 | n_t_13x
                 | ~(n_t_11x & ~n_t_12x & ~n_t_10x & n_t_8x);
assign n_t_21x = n_t_15x
                  | n_t_13x
                  | ~(n_t_11x & ~n_t_12x & n_t_10x & ~n_t_8x);
assign n_t_20x = n_t_15x
                  | n_t_13x
                  | ~(n_t_11x & ~n_t_12x & n_t_10x & n_t_8x);
assign n_t_19x = n_t_15x
                  | n_t_13x
                  | ~(n_t_11x & n_t_12x & ~n_t_10x & ~n_t_8x);
assign n_t_18x = n_t_15x
                  | n_t_13x
                  | ~(n_t_11x & n_t_12x & ~n_t_10x & n_t_8x);
assign n_t_17x = n_t_15x
                  | n_t_13x
                  | ~(n_t_11x & n_t_12x & n_t_10x & ~n_t_8x);
assign n_t_16x = n_t_15x
                  | n_t_13x
                  | ~(n_t_11x & n_t_12x & n_t_10x & n_t_8x);
// open collector 'wire-or's 
endmodule