// this file is generated by topld.pl // please don't edit it. // input pins // output pins // internal nodes // code nodes // equations // c1: c_us // c2: c_us // c3: c_us // c4: c_us // c5: c_us // c6: c_us // c7: c_us // c8: c_us // c9: c_us // c10: c_us // c11: c_us // c12: c_us // e1: sn7400 module m161c (n3v, d1, d2, e1, e2, f1, f2, h1, h2, j1, j2, l1, l2, m1, m2, n1, n2, p1, p2, r1, r2, s1, s2, t2, u1, u2, v1, v2); input n3v; inout d1; output d2; inout e1; output e2; inout f1; output f2; inout h1; output h2; inout j1; output j2; inout l1; output l2; inout m1; output m2; inout n1; output n2; inout p1; output p2; inout r1; output r2; input s1; input s2; input t2; input u1; input u2; input v1; input v2; wire n_t_10x; wire n_t_11x; wire n_t_12x; wire n_t_24x; wire n_t_25x; wire n_t_2x; wire n_t_4x; wire n_t_5x; wire n_t_6x; wire n_t_7x; wire n_t_8x; wire n_t_9x; assign h2 = ~(n3v & h1); assign f2 = ~(n3v & f1); assign e2 = ~(e1 & n3v); assign d2 = ~(d1 & n3v); // e2: sn7420 assign e1 = ~(n_t_25x & n_t_8x & n_t_9x & n_t_5x); assign d1 = ~(n_t_5x & n_t_9x & n_t_8x & n_t_10x); // e3: sn7420 assign m1 = ~(n_t_25x & n_t_11x & n_t_9x & n_t_5x); assign f1 = ~(n_t_5x & n_t_9x & n_t_11x & n_t_10x); // e4: sn7420 assign l1 = ~(n_t_25x & n_t_11x & n_t_24x & n_t_5x); assign h1 = ~(n_t_5x & n_t_24x & n_t_11x & n_t_10x); // e5: sn7400 assign n2 = ~(n3v & n1); assign m2 = ~(n3v & m1); assign l2 = ~(l1 & n3v); assign j2 = ~(j1 & n3v); // e6: sn7420 assign n1 = ~(n_t_25x & n_t_8x & n_t_24x & n_t_5x); assign j1 = ~(n_t_5x & n_t_24x & n_t_8x & n_t_10x); // e7: sn7420 assign p1 = ~(n_t_10x & n3v & n_t_4x & n_t_12x); assign r1 = ~(n_t_12x & n_t_4x & n_t_25x & n3v); // e8: sn7420 assign n_t_6x = ~(n_t_7x & s2 & s1 & t2); assign n_t_2x = ~(t2 & s1 & s2 & n3v); // e9: sn7400 assign n_t_7x = ~(n3v & u1); assign n_t_10x = ~(n3v & v1); assign n_t_8x = ~(v2 & n3v); assign n_t_9x = ~(u2 & n3v); // e10: sn7400 assign n_t_5x = ~(n3v & n_t_6x); assign n_t_4x = ~(n3v & n_t_2x); assign r2 = ~(r1 & n3v); assign p2 = ~(p1 & n3v); // e11: sn7400 assign n_t_24x = ~(n3v & n_t_9x); assign n_t_25x = ~(n3v & n_t_10x); assign n_t_11x = ~(n_t_8x & n3v); assign n_t_12x = ~(n_t_7x & n3v); // open collector 'wire-or's endmodule