// this file is generated by topld.pl // please don't edit it. // input pins // output pins // internal nodes // code nodes // equations // c1: c_us // c2: c_us // c3: c_us // e1: sn7485 module m168a (a1, b1, c1, d1, d2, e1, e2, f1, f2, h1, h2, j1, j2, k1, k2, l1, l2, m1, m2, n1, n2, p1, p2, r1, r2, s1, s2, t2, u2, v2); output a1; input b1; output c1; input d1; input d2; input e1; input e2; input f1; input f2; input h1; input h2; input j1; input j2; input k1; input k2; input l1; input l2; input m1; input m2; input n1; input n2; input p1; input p2; input r1; input r2; input s1; input s2; output t2; output u2; output v2; wire gdollar_0; wire gdollar_1; wire gdollar_2; wire gdollar_3; wire gdollar_4; wire gdollar_5; wire gdollar_6; wire gdollar_7; wire gdollar_8; wire gdollar_9; wire gdollar_10; wire gdollar_11; wire in; wire n_t_32x; wire n_t_46x; wire out; assign gdollar_0 = h2 & ~h1 | ~h2 & h1; assign gdollar_1 = f2 & ~f1 | ~f2 & f1; assign gdollar_2 = e2 & ~e1 | ~e2 & e1; assign gdollar_3 = d2 & ~d1 | ~d2 & d1; assign n_t_32x = b1 & ~gdollar_0 & ~gdollar_1 & ~gdollar_2 & ~gdollar_3; assign out = ~b1 & ~in & ~gdollar_0 & ~gdollar_1 & ~gdollar_2 & ~gdollar_3 | ~d2 & ~gdollar_0 & ~gdollar_1 & ~gdollar_2 & gdollar_3 | ~e2 & ~gdollar_0 & ~gdollar_1 & gdollar_2 | ~f2 & ~gdollar_0 & gdollar_1 | ~h2 & gdollar_0; assign out = ~b1 & ~in & ~gdollar_0 & ~gdollar_1 & ~gdollar_2 & ~gdollar_3 | d2 & ~gdollar_0 & ~gdollar_1 & ~gdollar_2 & gdollar_3 | e2 & ~gdollar_0 & ~gdollar_1 & gdollar_2 | f2 & ~gdollar_0 & gdollar_1 | h2 & gdollar_0; // e2: sn7485 assign gdollar_4 = m2 & ~m1 | ~m2 & m1; assign gdollar_5 = l2 & ~l1 | ~l2 & l1; assign gdollar_6 = k2 & ~k1 | ~k2 & k1; assign gdollar_7 = j2 & ~j1 | ~j2 & j1; assign n_t_46x = n_t_32x & ~gdollar_4 & ~gdollar_5 & ~gdollar_6 & ~gdollar_7; assign out = ~n_t_32x & ~in & ~gdollar_4 & ~gdollar_5 & ~gdollar_6 & ~gdollar_7 | ~j2 & ~gdollar_4 & ~gdollar_5 & ~gdollar_6 & gdollar_7 | ~k2 & ~gdollar_4 & ~gdollar_5 & gdollar_6 | ~l2 & ~gdollar_4 & gdollar_5 | ~m2 & gdollar_4; assign out = ~n_t_32x & ~in & ~gdollar_4 & ~gdollar_5 & ~gdollar_6 & ~gdollar_7 | j2 & ~gdollar_4 & ~gdollar_5 & ~gdollar_6 & gdollar_7 | k2 & ~gdollar_4 & ~gdollar_5 & gdollar_6 | l2 & ~gdollar_4 & gdollar_5 | m2 & gdollar_4; // e3: sn7485 assign gdollar_8 = s2 & ~s1 | ~s2 & s1; assign gdollar_9 = r2 & ~r1 | ~r2 & r1; assign gdollar_10 = p2 & ~p1 | ~p2 & p1; assign gdollar_11 = n2 & ~n1 | ~n2 & n1; assign u2 = n_t_46x & ~gdollar_8 & ~gdollar_9 & ~gdollar_10 & ~gdollar_11; assign out = ~n_t_46x & ~in & ~gdollar_8 & ~gdollar_9 & ~gdollar_10 & ~gdollar_11 | ~n2 & ~gdollar_8 & ~gdollar_9 & ~gdollar_10 & gdollar_11 | ~p2 & ~gdollar_8 & ~gdollar_9 & gdollar_10 | ~r2 & ~gdollar_8 & gdollar_9 | ~s2 & gdollar_8; assign out = ~n_t_46x & ~in & ~gdollar_8 & ~gdollar_9 & ~gdollar_10 & ~gdollar_11 | n2 & ~gdollar_8 & ~gdollar_9 & ~gdollar_10 & gdollar_11 | p2 & ~gdollar_8 & ~gdollar_9 & gdollar_10 | r2 & ~gdollar_8 & gdollar_9 | s2 & gdollar_8; // open collector 'wire-or's endmodule