// this file is generated by topld.pl 
// please don't edit it. 
// input pins 
// output pins 
// internal nodes 
// code nodes 
// equations 
// c1: cpol_use 
// c2: c_us 
// c3: c_us 
// e1: sn74150 
module m1713a (n_t_10x, n_t_11x, n_t_12x, n_t_13x, n_t_14x, n_t_15x, n_t_16x, n_t_17x, n_t_18x, n_t_19x, n_t_1x, n_t_20x, n_t_21x, n_t_22x, n_t_2x, n_t_3x, n_t_4x, n_t_5x, n_t_6x, n_t_7x, n_t_8x, n_t_9x);
output n_t_10x;
output n_t_11x;
output n_t_12x;
output n_t_13x;
output n_t_14x;
output n_t_15x;
output n_t_16x;
output n_t_17x;
output n_t_18x;
output n_t_19x;
output n_t_1x;
output n_t_20x;
output n_t_21x;
output n_t_22x;
output n_t_2x;
output n_t_3x;
output n_t_4x;
output n_t_5x;
output n_t_6x;
output n_t_7x;
output n_t_8x;
output n_t_9x;


assign n_t_7x = ~([n_t_1x,n_t_22x,n_t_21x,n_t_20x,n_t_19x,n_t_18x]:'b'100000
                   | [n_t_14x,n_t_22x,n_t_21x,n_t_20x,n_t_19x,n_t_18x]:'b'100001
                   | [n_t_2x,n_t_22x,n_t_21x,n_t_20x,n_t_19x,n_t_18x]:'b'100010
                   | [n_t_3x,n_t_22x,n_t_21x,n_t_20x,n_t_19x,n_t_18x]:'b'100011
                   | [n_t_4x,n_t_22x,n_t_21x,n_t_20x,n_t_19x,n_t_18x]:'b'100100
                   | [n_t_5x,n_t_22x,n_t_21x,n_t_20x,n_t_19x,n_t_18x]:'b'100101
                   | [n_t_6x,n_t_22x,n_t_21x,n_t_20x,n_t_19x,n_t_18x]:'b'100110
                   | [n_t_9x,n_t_22x,n_t_21x,n_t_20x,n_t_19x,n_t_18x]:'b'100111
                   | [n_t_8x,n_t_22x,n_t_21x,n_t_20x,n_t_19x,n_t_18x]:'b'101000
                   | [n_t_10x,n_t_22x,n_t_21x,n_t_20x,n_t_19x,n_t_18x]:'b'101001
                   | [n_t_12x,n_t_22x,n_t_21x,n_t_20x,n_t_19x,n_t_18x]:'b'101010
                   | [n_t_11x,n_t_22x,n_t_21x,n_t_20x,n_t_19x,n_t_18x]:'b'101011
                   | [n_t_13x,n_t_22x,n_t_21x,n_t_20x,n_t_19x,n_t_18x]:'b'101100
                   | [n_t_15x,n_t_22x,n_t_21x,n_t_20x,n_t_19x,n_t_18x]:'b'101101
                   | [n_t_16x,n_t_22x,n_t_21x,n_t_20x,n_t_19x,n_t_18x]:'b'101110
                   | [n_t_17x,n_t_22x,n_t_21x,n_t_20x,n_t_19x,n_t_18x]:'b'101111);
// open collector 'wire-or's 
endmodule