~/Verilog/bin/topld.pl M182X
info: 74h20n ne 7420n
info: 74h20n ne 7420n
info: 74h20n ne 7420n
info: 74h20n ne 7420n
info: 74h30n ne 7430n
info: 74h20n ne 7420n
info: 74h20n ne 7420n
info: 74h20n ne 7420n
info: 74h20n ne 7420n
info: 74h20n ne 7420n
info: 74h30n ne 7430n
info: edge_2connector ne edge_con2
warning: making u$2/edge_2connector/ a connector
~/Verilog/bin/smaller.pl M182X.PLD >vv || (rm vv; exit 1)
0 signals were removed:
~/Verilog/bin/smaller.pl vv >M182XX.PLD || (rm M182XX.PLD; exit 1)
0 signals were removed:
~/Verilog/bin/cupl2v.pl M182XX.PLD >vv || (rm vv; exit 1)
mv vv M182X.v
rm M182XX.PLD