// this file is generated by topld.pl 
// please don't edit it. 
// input pins 
// output pins 
// internal nodes 
// code nodes 
// equations 
// c1: c_us 
// c2: c_us 
// c3: c_us 
// c4: cpol_use 
// e1: sn74182 
module m191x (n_t_10x, n_t_11x, n_t_12x, n_t_13x, n_t_14x, n_t_15x, n_t_16x, n_t_17x, n_t_18x, n_t_19x, n_t_1x, n_t_20x, n_t_21x, n_t_22x, n_t_23x, n_t_24x, n_t_25x, n_t_26x, n_t_27x, n_t_28x, n_t_2x, n_t_3x, n_t_4x, n_t_5x, n_t_6x, n_t_7x, n_t_8x, n_t_9x);
output n_t_10x;
output n_t_11x;
output n_t_12x;
inout n_t_13x;
inout n_t_14x;
input n_t_15x;
input n_t_16x;
input n_t_17x;
input n_t_18x;
input n_t_19x;
input n_t_1x;
input n_t_20x;
input n_t_21x;
input n_t_22x;
input n_t_23x;
output n_t_24x;
output n_t_25x;
output n_t_26x;
inout n_t_27x;
inout n_t_28x;
input n_t_2x;
input n_t_3x;
input n_t_4x;
input n_t_5x;
input n_t_6x;
input n_t_7x;
input n_t_8x;
input n_t_9x;


assign n_t_14x = n_t_8x & (n_t_7x
                            | n_t_9x);
assign n_t_13x = n_t_6x & (n_t_2x
                            | n_t_14x);
assign n_t_12x = n_t_5x & (n_t_4x
                            | n_t_13x);
assign n_t_11x = n_t_3x & (n_t_1x
                            | n_t_5x) & (n_t_1x
                                    
                                       | n_t_4x
                                    
                                       | n_t_6x) & (n_t_1x
                                    
                                               
                                    
                                               
                                    
                                                  | n_t_4x
                                    
                                               
                                    
                                               
                                    
                                                  | n_t_2x
                                    
                                               
                                    
                                               
                                    
                                                  | n_t_8x);
assign n_t_10x = n_t_1x
                  | n_t_4x
                  | n_t_2x
                  | n_t_7x;
// e2: sn74182 
assign n_t_28x = n_t_16x & (n_t_17x
                             | n_t_15x);
assign n_t_27x = n_t_18x & (n_t_19x
                             | n_t_28x);
assign n_t_26x = n_t_21x & (n_t_20x
                             | n_t_27x);
assign n_t_25x = n_t_23x & (n_t_22x
                             | n_t_21x) & (n_t_22x
                                      
                                         | n_t_20x
                                      
                                         | n_t_18x) & (n_t_22x
                                      
                                                  
                                      
                                                  
                                      
                                                     | n_t_20x
                                      
                                                  
                                      
                                                  
                                      
                                                     | n_t_19x
                                      
                                                  
                                      
                                                  
                                      
                                                     | n_t_16x);
assign n_t_24x = n_t_22x
                  | n_t_20x
                  | n_t_19x
                  | n_t_17x;
// open collector 'wire-or's 
endmodule