~/Verilog/bin/topld.pl M202B
info: 7472n ne dil14
info: 7472n ne dil14
info: 7472n ne dil14
info: single ne edge_con2
warning: making u$2/single/ a connector
~/Verilog/bin/smaller.pl M202B.PLD >vv || (rm vv; exit 1)
0 signals were removed:
~/Verilog/bin/smaller.pl vv >M202BX.PLD || (rm M202BX.PLD; exit 1)
0 signals were removed:
~/Verilog/bin/cupl2v.pl M202BX.PLD >vv || (rm vv; exit 1)
mv vv M202B.v
rm M202BX.PLD