Exported from /home/vrs/Eagle/projects/DEC/Mxxx/M208/M208C.sch Part Pad Pin Dir Net C1 1 1 pas VCC 2 2 pas GND C2 1 1 pas VCC 2 2 pas GND C3 1 1 pas VCC 2 2 pas GND C4 1 1 pas VCC 2 2 pas GND C5 1 1 pas VCC 2 2 pas GND C6 1 1 pas VCC 2 2 pas GND C7 1 1 pas VCC 2 2 pas GND C8 1 1 pas VCC 2 2 pas GND C9 1 1 pas VCC 2 2 pas GND C10 1 1 pas VCC 2 2 pas GND C11 1 1 pas VCC 2 2 pas GND E1 1 CLR in N$29 2 D in N$7 3 CLK in N$27 4 PRE in N$32 5 Q out E1 6 !Q out F2 8 !Q out D2 9 Q out C1 10 PRE in N$32 11 CLK in N$27 12 D in N$8 13 CLR in N$29 E2 1 I4 in N$9 2 I1 in N$9 3 I2 in F1 4 I3 in J2 5 I4 in N$14 6 O out N$7 8 O out N$8 9 I2 in H2 10 I1 in N$14 13 I3 in D1 E3 1 CLR in N$29 2 D in N$5 3 CLK in N$27 4 PRE in N$32 5 Q out K1 6 !Q out L2 8 !Q out J2 9 Q out H1 10 PRE in N$32 11 CLK in N$27 12 D in N$6 13 CLR in N$29 E4 1 I4 in N$9 2 I1 in N$9 3 I2 in L1 4 I3 in P2 5 I4 in N$14 6 O out N$5 8 O out N$6 9 I2 in L2 10 I1 in N$14 13 I3 in J1 E5 1 I0 in +3V3 2 I1 in B1 3 O out N$31 4 I0 in K2 5 I1 in +3V3 6 O out N$14 8 O out N$9 9 I0 in M2 10 I1 in +3V3 11 O out N$32 12 I0 in +3V3 13 I1 in B1 E6 1 I0 in GND 2 I1 in GND 4 I2 in GND 5 I3 in GND 6 O out N$29 8 O out N$27 9 I0 in N$29 10 I1 in N$29 12 I2 in A1 13 I3 in U2 E7 1 CLR in N$29 2 D in N$1 3 CLK in N$27 4 PRE in N$31 5 Q out U1 6 !Q out V2 8 !Q out T2 9 Q out S2 10 PRE in N$31 11 CLK in N$27 12 D in N$2 13 CLR in N$29 E8 1 I4 in N$9 2 I1 in N$9 3 I2 in V1 4 I3 in E2 5 I4 in N$14 6 O out N$1 8 O out N$2 9 I2 in V2 10 I1 in N$14 13 I3 in S1 E9 1 CLR in N$29 2 D in N$3 3 CLK in N$27 4 PRE in N$31 5 Q out P1 6 !Q out R2 8 !Q out N2 9 Q out M1 10 PRE in N$31 11 CLK in N$27 12 D in N$4 13 CLR in N$29 E10 1 I4 in N$9 2 I1 in N$9 3 I2 in R1 4 I3 in T2 5 I4 in N$14 6 O out N$3 8 O out N$4 9 I2 in R2 10 I1 in N$14 13 I3 in N1 R1 1 1 pas +3V3 2 2 pas VCC R2 1 1 pas GND 2 2 pas +3V3 U$1 A1 1 io A1 A2 1 io VCC B1 1 io B1 C1 1 io C1 C2 1 io GND D1 1 io D1 D2 1 io D2 E1 1 io E1 E2 1 io E2 F1 1 io F1 F2 1 io F2 H1 1 io H1 H2 1 io H2 J1 1 io J1 J2 1 io J2 K1 1 io K1 K2 1 io K2 L1 1 io L1 L2 1 io L2 M1 1 io M1 M2 1 io M2 N1 1 io N1 N2 1 io N2 P1 1 io P1 P2 1 io P2 R1 1 io R1 R2 1 io R2 S1 1 io S1 S2 1 io S2 T1 1 io GND T2 1 io T2 U1 1 io U1 U2 1 io U2 V1 1 io V1 V2 1 io V2