/* This file is generated by topld.pl!! */
/* Please don't edit it. */

Name     M212B ;
PartNo   cpld ;
Date     XX/XX/XXXX ;
Revision 01 ;
Designer  ;
Company   ;
Assembly None ;
Location E1 ;
Device   f1508isptqfp100;

$DEFINE OPTIMIZE

$UNDEF  OPTIMIZE

/* Input Pins */
pin = n3v3;

/* Output Pins */
pin = clear_reg_l;
pin = clock;
pin = enable_a;
pin = enable_b;
pin = ina0_l;
pin = ina1_l;
pin = ina2_l;
pin = ina3_l;
pin = ina4_l;
pin = ina5_l;
pin = inb0_l;
pin = inb1_l;
pin = inb2_l;
pin = inb3_l;
pin = inb4_l;
pin = inb5_l;
pin = left_shift;
pin = n_t_10x;
pin = n_t_11x;
pin = n_t_12x;
pin = n_t_13x;
pin = n_t_14x;
pin = n_t_15x;
pin = n_t_16x;
pin = n_t_17x;
pin = n_t_18x;
pin = n_t_7x;
pin = n_t_8x;
pin = n_t_9x;
pin = right_shift;
pin = sl_insert;
pin = sr_insert;

/* Internal nodes */
$IFNDEF OPTIMIZE
node n_t_1x;
node n_t_2x;
node n_t_3x;
node n_t_4x;
node n_t_5x;
node n_t_6x;
$ENDIF

/* Code nodes */

/* Equations */

/* c1: c_us */

/* c2: c_us */

/* c3: c_us */

/* c4: c_us */

/* c5: c_us */

/* c6: c_us */

/* c7: c_us */

/* c8: c_us */

/* c9: c_us */

/* c10: c_us */

/* e1: sn7453 */
/* gdollar_0 = !(sr_insert & right_shift
          # ina0_l & enable_a
          # inb0_l & enable_b
          # n_t_10x & left_shift); */
/* gdollar_1 = !gdollar_0; */
n_t_1x = gdollar_0;

/* e2: sn7453 */
/* gdollar_2 = !(n_t_8x & right_shift
          # ina1_l & enable_a
          # inb1_l & enable_b
          # n_t_12x & left_shift); */
/* gdollar_3 = !gdollar_2; */
n_t_2x = gdollar_2;

/* e3: sn7474 */
n_t_7x.ar = !n3v3;
n_t_7x.d = n_t_1x;
n_t_7x.ck = clock;
n_t_7x.ap = !clear_reg_l;
n_t_8x = !n_t_7x;
n_t_9x.ar = !n3v3;
n_t_9x.d = n_t_2x;
n_t_9x.ck = clock;
n_t_9x.ap = !clear_reg_l;
n_t_10x = !n_t_9x;

/* e4: sn7453 */
/* gdollar_4 = !(n_t_10x & right_shift
          # ina2_l & enable_a
          # inb2_l & enable_b
          # n_t_14x & left_shift); */
/* gdollar_5 = !gdollar_4; */
n_t_3x = gdollar_4;

/* e5: sn7453 */
/* gdollar_6 = !(n_t_12x & right_shift
          # ina3_l & enable_a
          # inb3_l & enable_b
          # n_t_16x & left_shift); */
/* gdollar_7 = !gdollar_6; */
n_t_4x = gdollar_6;

/* e6: sn7474 */
n_t_11x.ar = !n3v3;
n_t_11x.d = n_t_3x;
n_t_11x.ck = clock;
n_t_11x.ap = !clear_reg_l;
n_t_12x = !n_t_11x;
n_t_13x.ar = !n3v3;
n_t_13x.d = n_t_4x;
n_t_13x.ck = clock;
n_t_13x.ap = !clear_reg_l;
n_t_14x = !n_t_13x;

/* e7: sn7453 */
/* gdollar_8 = !(n_t_14x & right_shift
          # ina4_l & enable_a
          # inb4_l & enable_b
          # n_t_18x & left_shift); */
/* gdollar_9 = !gdollar_8; */
n_t_5x = gdollar_8;

/* e8: sn7453 */
/* gdollar_10 = !(n_t_16x & right_shift
           # ina5_l & enable_a
           # inb5_l & enable_b
           # sl_insert & left_shift); */
/* gdollar_11 = !gdollar_10; */
n_t_6x = gdollar_10;

/* e9: sn7474 */
n_t_15x.ar = !n3v3;
n_t_15x.d = n_t_5x;
n_t_15x.ck = clock;
n_t_15x.ap = !clear_reg_l;
n_t_16x = !n_t_15x;
n_t_17x.ar = !n3v3;
n_t_17x.d = n_t_6x;
n_t_17x.ck = clock;
n_t_17x.ap = !clear_reg_l;
n_t_18x = !n_t_17x;

/* Open collector 'wire-or's */
!gdollar_0 = (sr_insert & right_shift
          # ina0_l & enable_a
          # inb0_l & enable_b
          # n_t_10x & left_shift);
!gdollar_1 = gdollar_0;
!gdollar_10 = (n_t_16x & right_shift
           # ina5_l & enable_a
           # inb5_l & enable_b
           # sl_insert & left_shift);
!gdollar_11 = gdollar_10;
!gdollar_2 = (n_t_8x & right_shift
          # ina1_l & enable_a
          # inb1_l & enable_b
          # n_t_12x & left_shift);
!gdollar_3 = gdollar_2;
!gdollar_4 = (n_t_10x & right_shift
          # ina2_l & enable_a
          # inb2_l & enable_b
          # n_t_14x & left_shift);
!gdollar_5 = gdollar_4;
!gdollar_6 = (n_t_12x & right_shift
          # ina3_l & enable_a
          # inb3_l & enable_b
          # n_t_16x & left_shift);
!gdollar_7 = gdollar_6;
!gdollar_8 = (n_t_14x & right_shift
          # ina4_l & enable_a
          # inb4_l & enable_b
          # n_t_18x & left_shift);
!gdollar_9 = gdollar_8;