~/Verilog/bin/topld.pl M215A info: cpol_use ne cpol_use20_8axial info: 7482n ne dil14 info: 7482n ne dil14 info: single ne edge_con2 warning: making u$2/single/ a connector ~/Verilog/bin/smaller.pl M215A.PLD >vv || (rm vv; exit 1) 0 signals were removed: ~/Verilog/bin/smaller.pl vv >M215AX.PLD || (rm M215AX.PLD; exit 1) 0 signals were removed: ~/Verilog/bin/cupl2v.pl M215AX.PLD >vv || (rm vv; exit 1) mv vv M215A.v rm M215AX.PLD