~/Verilog/bin/topld.pl M220C
info: cpol_use ne cpol_use15_5axial
info: cpol_use ne cpol_use15_5axial
info: cpol_use ne cpol_use15_5axial
info: cpol_use ne cpol_use15_5axial
info: cpol_use ne cpol_use15_5axial
info: cpol_use ne cpol_use15_5axial
info: cpol_use ne cpol_use15_5axial
info: cpol_use ne cpol_use15_5axial
info: cpol_use ne cpol_use15_5axial
info: 7453n ne dil14
info: 7440n ne 7420n
info: 7453n ne dil14
info: 7482n ne dil14
info: 7453n ne dil14
info: 7453n ne dil14
info: 7453n ne dil14
info: 7453n ne dil14
info: 7453n ne dil14
info: 7453n ne dil14
info: 7460n ne dil14
info: 7460n ne dil14
info: 7460n ne dil14
info: 7440n ne 7420n
info: 2n3009b ne 2n1613
warning: making t1/2n3009b/ a connector
info: double ne edge_con4
warning: making u$1/double/ a connector
warning: non-bypass capacitor deleted: c9
~/Verilog/bin/smaller.pl M220C.PLD >vv || (rm vv; exit 1)
10 signals were removed:
  gdollar_2: !gdollar_1
  gdollar_4: !gdollar_3
  mb2_l: !mb2_h
  mb3_l: !mb3_h
  n_t_11x: ak2
  n_t_12x: gdollar_1
  n_t_13x: aj1
  n_t_14x: gdollar_3
  n_t_5x: n_t_6x
  n_t_8x: n_t_4x
~/Verilog/bin/smaller.pl vv >M220CX.PLD || (rm M220CX.PLD; exit 1)
0 signals were removed:
~/Verilog/bin/cupl2v.pl M220CX.PLD >vv || (rm vv; exit 1)
mv vv M220C.v
rm M220CX.PLD