~/Verilog/bin/topld.pl M221X
info: 7453n ne dil14
info: 7460n ne dil14
info: 7453n ne dil14
info: 7460n ne dil14
info: 7453n ne dil14
info: 7453n ne dil14
info: 74h00n ne 7400n
info: 7453n ne dil14
info: 7453n ne dil14
info: 7453n ne dil14
info: 74h00n ne 7400n
info: 7453n ne dil14
info: 7453n ne dil14
info: 7482n ne dil14
info: 7453n ne dil14
info: 7453n ne dil14
info: 7400n ne dil14
info: double ne edge_con4
warning: making u$1/double/ a connector
~/Verilog/bin/smaller.pl M221X.PLD >vv || (rm vv; exit 1)
21 signals were removed:
  ac2_l: !ac2_h
  ac3_l: !ac3_h
  gdollar_0: reg_bus2
  gdollar_1: !gdollar_0
  gdollar_10: !gdollar_9
  gdollar_2: addr_match
  gdollar_3: !gdollar_2
  gdollar_5: reg_bus3
  gdollar_6: !gdollar_5
  gdollar_7: carry_ok_l
  gdollar_8: !gdollar_7
  mb2_l: !mb2_h
  mb3_l: !mb3_h
  n_t_10x: !lsw3
  n_t_19x: !ps_2
  n_t_1x: ps_left_3
  n_t_20x: !ps_3
  n_t_3x: ps_2
  n_t_6x: ps_left_2
  n_t_8x: ps_3
  n_t_9x: !lsw2
~/Verilog/bin/smaller.pl vv >M221XX.PLD || (rm M221XX.PLD; exit 1)
1 signals were removed:
  gdollar_0: reg_bus2
~/Verilog/bin/cupl2v.pl M221XX.PLD >vv || (rm vv; exit 1)
mv vv M221X.v
rm M221XX.PLD