~/Verilog/bin/topld.pl M222B
info: d662 ne 1n4148do35_10
warning: making d1/d662/ a connector
info: d662 ne 1n4148do35_10
warning: making d2/d662/ a connector
info: d662 ne 1n4148do35_10
warning: making d3/d662/ a connector
info: d662 ne 1n4148do35_10
warning: making d4/d662/ a connector
info: d662 ne 1n4148do35_10
warning: making d5/d662/ a connector
info: 7453n ne dil14
info: 7400n ne dil14
info: 7453n ne dil14
info: 7450n ne dil14
info: 7400n ne dil14
info: 7453n ne dil14
info: 7453n ne dil14
info: 7453n ne dil14
info: 7453n ne dil14
info: 7453n ne dil14
info: 7482n ne dil14
info: double ne edge_con4
warning: making u$1/double/ a connector
~/Verilog/bin/smaller.pl M222B.PLD >vv || (rm vv; exit 1)
11 signals were removed:
  n_t_10x: bn1
  n_t_12x: !n_t_13x
  n_t_13x: bb1
  n_t_15x: !phase
  n_t_1x: !tape_bus3
  n_t_2x: !tape_bus2
  n_t_4x: bb2
  n_t_5x: an2
  rwb2_l: !rwb2_h
  tb2_l: !tb2_h
  tb3_l: !tb3_h
~/Verilog/bin/smaller.pl vv >M222BX.PLD || (rm M222BX.PLD; exit 1)
1 signals were removed:
  n_t_13x: bb1
~/Verilog/bin/cupl2v.pl M222BX.PLD >vv || (rm vv; exit 1)
mv vv M222B.v
rm M222BX.PLD