~/Verilog/bin/topld.pl M227B
info: cpol_use ne cpol_use20_8axial
info: 74h62 ne 7462
info: 74h53n ne dil14
info: 74h62 ne 7462
info: 74h53n ne dil14
info: 74h62 ne 7462
info: 74h53n ne dil14
info: 74h62 ne 7462
info: 74h53n ne dil14
info: 74h53n ne dil14
info: 74h62 ne 7462
info: 74h53n ne dil14
info: 74h62 ne 7462
info: 74h62 ne 7462
info: 74h53n ne dil14
info: 74h53n ne dil14
info: 74h62 ne 7462
info: 74h53n ne dil14
info: 74h62 ne 7462
info: double ne edge_con4
warning: making u$3/double/ a connector
warning: non-bypass capacitor deleted: c25
warning: non-bypass capacitor deleted: c26
warning: non-bypass capacitor deleted: c27
~/Verilog/bin/smaller.pl M227B.PLD >vv || (rm vv; exit 1)
9 signals were removed:
  n_t_17x: bc1
  n_t_19x: bd1
  n_t_21x: bd2
  n_t_22x: bk1
  n_t_25x: bm1
  n_t_27x: bs2
  n_t_2x: av1
  n_t_4x: ar2
  n_t_6x: aj2
~/Verilog/bin/smaller.pl vv >M227BX.PLD || (rm M227BX.PLD; exit 1)
0 signals were removed:
~/Verilog/bin/cupl2v.pl M227BX.PLD >vv || (rm vv; exit 1)
mv vv M227B.v
rm M227BX.PLD