~/Verilog/bin/topld.pl M240X
info: 74h40 ne 7420n
info: 74h40 ne 7420n
info: 74h40 ne 7420n
info: 74h40 ne 7420n
info: 74h40 ne 7420n
info: 74h40 ne 7420n
info: single ne edge_con2
warning: making u$4/single/ a connector
~/Verilog/bin/smaller.pl M240X.PLD >vv || (rm vv; exit 1)
0 signals were removed:
~/Verilog/bin/smaller.pl vv >M240XX.PLD || (rm M240XX.PLD; exit 1)
0 signals were removed:
~/Verilog/bin/cupl2v.pl M240XX.PLD >vv || (rm vv; exit 1)
mv vv M240X.v
rm M240XX.PLD