// this file is generated by topld.pl 
// please don't edit it. 
// input pins 
// output pins 
// internal nodes 
// code nodes 
// equations 
// c1: c_us 
// c2: c_us 
// c3: c_us 
// c4: c_us 
// c5: c_us 
// c6: c_us 
// c7: c_us 
// c8: c_us 
// c9: c_us 
// c10: c_us 
// c11: c_us 
// c12: c_us 
// c13: c_us 
// c14: c_us 
// c15: c_us 
// c16: c_us 
// c17: c_us 
// e1: sn7440 
module m304a (n_t_17x, n_t_22x, n_t_29x, n_t_2x, n_t_34x, n_t_41x, n_t_46x, n_t_8x, n_t_12x, n_t_13x, n_t_14x, n_t_19x, n_t_20x, n_t_25x, n_t_26x, n_t_27x, n_t_31x, n_t_32x, n_t_37x, n_t_38x, n_t_39x, n_t_43x, n_t_44x, n_t_49x, n_t_4x, n_t_50x, n_t_51x, n_t_6x);
input n_t_17x;
input n_t_22x;
input n_t_29x;
input n_t_2x;
input n_t_34x;
input n_t_41x;
input n_t_46x;
input n_t_8x;
output n_t_12x;
inout n_t_13x;
inout n_t_14x;
input n_t_19x;
input n_t_20x;
output n_t_25x;
inout n_t_26x;
inout n_t_27x;
input n_t_31x;
input n_t_32x;
output n_t_37x;
inout n_t_38x;
inout n_t_39x;
input n_t_43x;
input n_t_44x;
output n_t_49x;
input n_t_4x;
inout n_t_50x;
inout n_t_51x;
input n_t_6x;


wire n_t_10x;
wire n_t_18x;
wire n_t_23x;
wire n_t_30x;
wire n_t_35x;
wire n_t_3x;
wire n_t_42x;
wire n_t_47x;
assign n_t_14x = ~(n_t_2x & n_t_13x & n_t_13x);
assign n_t_13x = ~(n_t_14x & n_t_8x & n_t_8x);
// e2: sn7400 
assign n_t_18x = ~(n_t_19x & n_t_20x);
assign n_t_3x = ~(n_t_6x & n_t_4x);
// e3: sn7440 
assign n_t_27x = ~(n_t_17x & n_t_26x & n_t_26x);
assign n_t_26x = ~(n_t_27x & n_t_22x & n_t_22x);
// e4: sn7402 
assign n_t_35x = ~(n_t_30x
                    | n_t_38x);
assign n_t_47x = ~(n_t_42x
                    | n_t_50x);
assign n_t_23x = ~(n_t_26x
                    | n_t_18x);
assign n_t_10x = ~(n_t_13x
                    | n_t_3x);
// e5: sn7440 
assign n_t_39x = ~(n_t_29x & n_t_38x & n_t_38x);
assign n_t_38x = ~(n_t_39x & n_t_34x & n_t_34x);
// e6: sn7440 
assign n_t_50x = ~(n_t_46x & n_t_51x & n_t_51x);
assign n_t_51x = ~(n_t_50x & n_t_41x & n_t_41x);
// e7: sn7400 
assign n_t_30x = ~(n_t_31x & n_t_32x);
assign n_t_42x = ~(n_t_43x & n_t_44x);
// open collector 'wire-or's 
endmodule