// this file is generated by topld.pl 
// please don't edit it. 
// input pins 
// output pins 
// internal nodes 
// code nodes 
// equations 
// c2: c_us 
// c3: c_us 
// c4: c_us 
// c5: c_us 
// c6: c_us 
// c8: c_us 
// c10: cpol_use 
// c11: c_us 
// c12: cpol_use 
// c13: c_us 
// e1: sn7400 
module m402b (n_t_17x, n_t_3x, l2, m2, n2, n_t_16x, n_t_1x, n_t_2x, n_t_4x, n_t_5x, n_t_6x, n_t_7x);
input n_t_17x;
input n_t_3x;
output l2;
output m2;
output n2;
output n_t_16x;
inout n_t_1x;
output n_t_2x;
input n_t_4x;
input n_t_5x;
inout n_t_6x;
output n_t_7x;


assign n_t_6x = ~(n_t_5x & n_t_4x);
assign n_t_2x = ~n_t_1x;
assign n_t_1x = ~n_t_3x;
assign n_t_16x = ~(n_t_17x & n_t_6x);
// open collector 'wire-or's 
endmodule