~/Verilog/bin/topld.pl M405X
info: c_us150_054x183 ne c150_054x183
warning: making c2/c_us150_054x183/ a connector
info: crystalhc13u_h ne hc13u_h
warning: making cr1/crystalhc13u_h/ a connector
info: 1n914 ne 1n4148do35_10
warning: making d1/1n914/ a connector
info: 1n914 ne 1n4148do35_10
warning: making d2/1n914/ a connector
info: 1n4154 ne 1n4148do35_10
warning: making d3/1n4154/ a connector
info: 1n914 ne 1n4148do35_10
warning: making d4/1n914/ a connector
info: 1n914 ne 1n4148do35_10
warning: making d5/1n914/ a connector
info: 1n914 ne 1n4148do35_10
warning: making d6/1n914/ a connector
info: 1n914 ne 1n4148do35_10
warning: making d7/1n914/ a connector
info: 1n4154 ne 1n4148do35_10
warning: making d8/1n4154/ a connector
info: 7400n ne dil14
info: mount_pad_round2.8 ne 2,8_pad
warning: making h1/mount_pad_round2.8/ a connector
info: mount_pad_round2.8 ne 2,8_pad
warning: making h2/mount_pad_round2.8/ a connector
info: mount_pad_round2.8 ne 2,8_pad
warning: making h3/mount_pad_round2.8/ a connector
info: mount_pad_round2.8 ne 2,8_pad
warning: making h4/mount_pad_round2.8/ a connector
info: mount_pad_round2.8 ne 2,8_pad
warning: making h5/mount_pad_round2.8/ a connector
info: l_us0207/12 ne 0207/12
warning: making l1/l_us0207/ a connector
info: pn4250a ne _pnp_to39_ebc
warning: making q1/pn4250a/ a connector
info: pn4250a ne _pnp_to39_ebc
warning: making q2/pn4250a/ a connector
info: pn3569 ne _npn_to39_ebc
warning: making q3/pn3569/ a connector
info: pn3569 ne _npn_to39_ebc
warning: making q4/pn3569/ a connector
info: edge_1 ne edge_con1
warning: making u$2/edge_1/ a connector
warning: non-bypass capacitor deleted: c1
warning: non-bypass capacitor deleted: c3
warning: non-bypass capacitor deleted: c4
warning: non-bypass capacitor deleted: c5
warning: non-bypass capacitor deleted: c6
warning: non-bypass capacitor deleted: c7
~/Verilog/bin/smaller.pl M405X.PLD >vv || (rm vv; exit 1)
1 signals were removed:
  n_t_14x: !n_t_11x
~/Verilog/bin/smaller.pl vv >M405XX.PLD || (rm M405XX.PLD; exit 1)
0 signals were removed:
~/Verilog/bin/cupl2v.pl M405XX.PLD >vv || (rm vv; exit 1)
mv vv M405X.v
rm M405XX.PLD