~/Verilog/bin/topld.pl M506C
info: 1n3606 ne 1n4148do35_10
warning: making d1/1n3606/ a connector
info: 1n645 ne 1n4148do35_10
warning: making d10/1n645/ a connector
info: 1n3606 ne 1n4148do35_10
warning: making d11/1n3606/ a connector
info: 1n3606 ne 1n4148do35_10
warning: making d12/1n3606/ a connector
info: 1n3606 ne 1n4148do35_10
warning: making d13/1n3606/ a connector
info: 1n3606 ne 1n4148do35_10
warning: making d14/1n3606/ a connector
info: 1n3606 ne 1n4148do35_10
warning: making d15/1n3606/ a connector
info: 1n3606 ne 1n4148do35_10
warning: making d16/1n3606/ a connector
info: 1n3606 ne 1n4148do35_10
warning: making d17/1n3606/ a connector
info: 1n3606 ne 1n4148do35_10
warning: making d18/1n3606/ a connector
info: 1n3606 ne 1n4148do35_10
warning: making d19/1n3606/ a connector
info: 1n3606 ne 1n4148do35_10
warning: making d2/1n3606/ a connector
info: 1n3606 ne 1n4148do35_10
warning: making d20/1n3606/ a connector
info: 1n3606 ne 1n4148do35_10
warning: making d21/1n3606/ a connector
info: 1n3606 ne 1n4148do35_10
warning: making d22/1n3606/ a connector
info: 1n3606 ne 1n4148do35_10
warning: making d3/1n3606/ a connector
info: 1n3606 ne 1n4148do35_10
warning: making d4/1n3606/ a connector
info: 1n3606 ne 1n4148do35_10
warning: making d5/1n3606/ a connector
info: 1n3606 ne 1n4148do35_10
warning: making d6/1n3606/ a connector
info: 1n645 ne 1n4148do35_10
warning: making d7/1n645/ a connector
info: 1n645 ne 1n4148do35_10
warning: making d8/1n645/ a connector
info: 1n645 ne 1n4148do35_10
warning: making d9/1n645/ a connector
info: 2n3009 ne 2n3019
warning: making q1/2n3009/ a connector
info: 2n3009 ne 2n3019
warning: making q2/2n3009/ a connector
info: 2n3009 ne 2n3019
warning: making q3/2n3009/ a connector
info: 2n3009 ne 2n3019
warning: making q4/2n3009/ a connector
info: 2n3009 ne 2n3019
warning: making q5/2n3009/ a connector
info: 2n3009 ne 2n3019
warning: making q6/2n3009/ a connector
info: single ne edge_con2
warning: making u$2/single/ a connector
warning: non-bypass capacitor deleted: c4
warning: non-bypass capacitor deleted: c5
~/Verilog/bin/smaller.pl M506C.PLD >vv || (rm vv; exit 1)
0 signals were removed:
~/Verilog/bin/smaller.pl vv >M506CX.PLD || (rm M506CX.PLD; exit 1)
0 signals were removed:
~/Verilog/bin/cupl2v.pl M506CX.PLD >vv || (rm vv; exit 1)
mv vv M506C.v
rm M506CX.PLD