~/Verilog/bin/topld.pl M506X
info: 1n4154 ne 1n4148do35_10
warning: making d1/1n4154/ a connector
info: 1n914 ne 1n4148do35_10
warning: making d10/1n914/ a connector
info: 1n4154 ne 1n4148do35_10
warning: making d11/1n4154/ a connector
info: 1n4154 ne 1n4148do35_10
warning: making d12/1n4154/ a connector
info: 1n4154 ne 1n4148do35_10
warning: making d13/1n4154/ a connector
info: 1n4154 ne 1n4148do35_10
warning: making d14/1n4154/ a connector
info: 1n4154 ne 1n4148do35_10
warning: making d15/1n4154/ a connector
info: 1n4154 ne 1n4148do35_10
warning: making d16/1n4154/ a connector
info: 1n4154 ne 1n4148do35_10
warning: making d17/1n4154/ a connector
info: 1n4154 ne 1n4148do35_10
warning: making d18/1n4154/ a connector
info: 1n4154 ne 1n4148do35_10
warning: making d19/1n4154/ a connector
info: 1n4154 ne 1n4148do35_10
warning: making d2/1n4154/ a connector
info: 1n4154 ne 1n4148do35_10
warning: making d20/1n4154/ a connector
info: 1n4154 ne 1n4148do35_10
warning: making d21/1n4154/ a connector
info: 1n4154 ne 1n4148do35_10
warning: making d22/1n4154/ a connector
info: 1n4154 ne 1n4148do35_10
warning: making d3/1n4154/ a connector
info: 1n4154 ne 1n4148do35_10
warning: making d4/1n4154/ a connector
info: 1n4154 ne 1n4148do35_10
warning: making d5/1n4154/ a connector
info: 1n4154 ne 1n4148do35_10
warning: making d6/1n4154/ a connector
info: 1n914 ne 1n4148do35_10
warning: making d7/1n914/ a connector
info: 1n914 ne 1n4148do35_10
warning: making d8/1n914/ a connector
info: 1n914 ne 1n4148do35_10
warning: making d9/1n914/ a connector
info: pn3569 ne 2n3019
warning: making q1/pn3569/ a connector
info: pn3569 ne 2n3019
warning: making q2/pn3569/ a connector
info: pn3569 ne 2n3019
warning: making q3/pn3569/ a connector
info: pn3569 ne 2n3019
warning: making q4/pn3569/ a connector
info: pn3569 ne 2n3019
warning: making q5/pn3569/ a connector
info: pn3569 ne 2n3019
warning: making q6/pn3569/ a connector
info: single ne edge_con2
warning: making u$2/single/ a connector
warning: non-bypass capacitor deleted: c4
warning: non-bypass capacitor deleted: c5
~/Verilog/bin/smaller.pl M506X.PLD >vv || (rm vv; exit 1)
0 signals were removed:
~/Verilog/bin/smaller.pl vv >M506XX.PLD || (rm M506XX.PLD; exit 1)
0 signals were removed:
~/Verilog/bin/cupl2v.pl M506XX.PLD >vv || (rm vv; exit 1)
mv vv M506X.v
rm M506XX.PLD