// this file is generated by topld.pl 
// please don't edit it. 
// input pins 
// output pins 
// internal nodes 
// code nodes 
// equations 
// c1: c_us 
// c2: c_us 
// c3: c_us 
// c4: c_us 
// c5: c_us 
// c6: cpol_use 
// c7: c_us 
// e1: sn74h00 
module m510a (n_t_12x, n_t_15x, n_t_27x, n_t_34x, n_t_41x, n_t_50x, n_t_58x, n_t_6x, n3v, n_t_16x, n_t_1x, n_t_20x, n_t_21x, n_t_23x, n_t_28x, n_t_30x, n_t_35x, n_t_37x, n_t_42x, n_t_44x, n_t_48x, n_t_49x, n_t_4x, n_t_52x, n_t_54x, n_t_59x, n_t_61x, n_t_65x, n_t_66x, n_t_67x, n_t_68x, n_t_7x, n_t_9x);
input n_t_12x;
input n_t_15x;
input n_t_27x;
input n_t_34x;
input n_t_41x;
input n_t_50x;
input n_t_58x;
input n_t_6x;
output n3v;
inout n_t_16x;
output n_t_1x;
output n_t_20x;
inout n_t_21x;
output n_t_23x;
inout n_t_28x;
output n_t_30x;
inout n_t_35x;
output n_t_37x;
inout n_t_42x;
output n_t_44x;
output n_t_48x;
output n_t_49x;
inout n_t_4x;
inout n_t_52x;
output n_t_54x;
inout n_t_59x;
output n_t_61x;
output n_t_65x;
output n_t_66x;
output n_t_67x;
output n_t_68x;
output n_t_7x;
output n_t_9x;


assign n_t_16x = ~n_t_15x;
assign n_t_20x = ~n_t_16x;
assign n_t_9x = ~n_t_4x;
assign n_t_4x = ~n_t_6x;
// e2: sn74h00 
assign n_t_21x = ~n_t_12x;
assign n_t_23x = ~n_t_21x;
assign n_t_30x = ~n_t_28x;
assign n_t_28x = ~n_t_27x;
// e3: sn74h00 
assign n_t_35x = ~n_t_34x;
assign n_t_37x = ~n_t_35x;
assign n_t_44x = ~n_t_42x;
assign n_t_42x = ~n_t_41x;
// e4: sn74h00 
assign n_t_52x = ~n_t_50x;
assign n_t_54x = ~n_t_52x;
assign n_t_61x = ~n_t_59x;
assign n_t_59x = ~n_t_58x;
// open collector 'wire-or's 
endmodule