~/Verilog/bin/topld.pl M510A
info: cpol_use ne cpol_use20_8axial
info: 1n3606 ne 1n4148do35_10
warning: making d1/1n3606/ a connector
info: 1n645 ne 1n4148do35_10
warning: making d10/1n645/ a connector
info: 1n645 ne 1n4148do35_10
warning: making d11/1n645/ a connector
info: 1n645 ne 1n4148do35_10
warning: making d12/1n645/ a connector
info: 1n3606 ne 1n4148do35_10
warning: making d2/1n3606/ a connector
info: 1n3606 ne 1n4148do35_10
warning: making d3/1n3606/ a connector
info: 1n3606 ne 1n4148do35_10
warning: making d4/1n3606/ a connector
info: 1n3606 ne 1n4148do35_10
warning: making d5/1n3606/ a connector
info: 1n3606 ne 1n4148do35_10
warning: making d6/1n3606/ a connector
info: 1n3606 ne 1n4148do35_10
warning: making d7/1n3606/ a connector
info: 1n3606 ne 1n4148do35_10
warning: making d8/1n3606/ a connector
info: 1n645 ne 1n4148do35_10
warning: making d9/1n645/ a connector
info: 74h00n ne 7400n
info: 74h00n ne 7400n
info: 74h00n ne 7400n
info: 74h00n ne 7400n
info: edge_2connector ne edge_con2
warning: making edge1/edge_2connector/ a connector
info: 2n3009 ne 2n3019
warning: making q1/2n3009/ a connector
info: 2n3009 ne 2n3019
warning: making q10/2n3009/ a connector
info: 2n3009 ne 2n3019
warning: making q11/2n3009/ a connector
info: 2n3009 ne 2n3019
warning: making q12/2n3009/ a connector
info: 2n3009 ne 2n3019
warning: making q13/2n3009/ a connector
info: 2n3009 ne 2n3019
warning: making q14/2n3009/ a connector
info: 2n3009 ne 2n3019
warning: making q15/2n3009/ a connector
info: 2n3009 ne 2n3019
warning: making q16/2n3009/ a connector
info: 2n3009 ne 2n3019
warning: making q2/2n3009/ a connector
info: 2n3009 ne 2n3019
warning: making q3/2n3009/ a connector
info: 2n3009 ne 2n3019
warning: making q4/2n3009/ a connector
info: 2n3009 ne 2n3019
warning: making q5/2n3009/ a connector
info: 2n3009 ne 2n3019
warning: making q6/2n3009/ a connector
info: 2n3009 ne 2n3019
warning: making q7/2n3009/ a connector
info: 2n3009 ne 2n3019
warning: making q8/2n3009/ a connector
info: 2n3009 ne 2n3019
warning: making q9/2n3009/ a connector
~/Verilog/bin/smaller.pl M510A.PLD >vv || (rm vv; exit 1)
0 signals were removed:
~/Verilog/bin/smaller.pl vv >M510AX.PLD || (rm M510AX.PLD; exit 1)
0 signals were removed:
~/Verilog/bin/cupl2v.pl M510AX.PLD >vv || (rm vv; exit 1)
mv vv M510A.v
rm M510AX.PLD