~/Verilog/bin/topld.pl M622X
info: cpol_use ne cpol_use20_8axial
info: 74h50n ne 7450n
info: 74h50n ne 7450n
info: 74h50n ne 7450n
info: 74h50n ne 7450n
info: pn3569 ne 2n2102
warning: making q1/pn3569/ a connector
info: pn3569 ne 2n2102
warning: making q2/pn3569/ a connector
info: pn3569 ne 2n2102
warning: making q3/pn3569/ a connector
info: pn3569 ne 2n2102
warning: making q4/pn3569/ a connector
info: pn3569 ne 2n2102
warning: making q5/pn3569/ a connector
info: pn3569 ne 2n2102
warning: making q6/pn3569/ a connector
info: pn3569 ne 2n2102
warning: making q7/pn3569/ a connector
info: pn3569 ne 2n2102
warning: making q8/pn3569/ a connector
info: single ne edge_con2
warning: making u$1/single/ a connector
~/Verilog/bin/smaller.pl M622X.PLD >vv || (rm vv; exit 1)
0 signals were removed:
~/Verilog/bin/smaller.pl vv >M622XX.PLD || (rm M622XX.PLD; exit 1)
0 signals were removed:
~/Verilog/bin/cupl2v.pl M622XX.PLD >vv || (rm vv; exit 1)
mv vv M622X.v
rm M622XX.PLD