// this file is generated by topld.pl 
// please don't edit it. 
// input pins 
// output pins 
// internal nodes 
// code nodes 
// equations 
// c1: c_us 
// c2: c_us 
// c3: c_us 
// c4: c_us 
// c5: c_us 
// e1: sn7410 
module m650d (n15v, n_t_10x, n_t_11x, n_t_12x, n_t_14x, n_t_15x, n_t_16x, n_t_19x, n_t_1x, n_t_21x, n_t_22x, n_t_23x, n_t_24x, n_t_26x, n_t_29x, n_t_2x, n_t_4x, n_t_7x, n_t_9x);
output n15v;
input n_t_10x;
input n_t_11x;
output n_t_12x;
input n_t_14x;
input n_t_15x;
output n_t_16x;
output n_t_19x;
input n_t_1x;
input n_t_21x;
input n_t_22x;
input n_t_23x;
output n_t_24x;
output n_t_26x;
output n_t_29x;
output n_t_2x;
output n_t_4x;
output n_t_7x;
input n_t_9x;


assign n_t_4x = ~(n_t_14x & n_t_1x & n_t_15x);
assign n_t_24x = ~(n_t_21x & n_t_23x & n_t_22x);
assign n_t_12x = ~(n_t_9x & n_t_11x & n_t_10x);
// open collector 'wire-or's 
endmodule